74LVTH16245BDL,118 - NEXPERIA - Datasheet.Directory

74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

Rev. 11 — 31 October 2018 Product data sheet

1. General description

The 74LVT16245B; 74LVTH16245B is a high-performance BiCMOS product designed for VCC

operation at 3.3 V.

This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both

send and receive directions. The control function implementation minimizes external timing

requirements. The device features an output enable input (nOE) for easy cascading and a direction

input (nDIR) for direction control.

2. Features and benefits

•16-bit bidirectional bus interface

•3-state buffers

•Output capability: +64 mA and -32 mA

•TTL input and output switching levels

•Input and output interface capability to systems at 5 V supply

•Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

•Live insertion and extraction permitted

•Power-up 3-state

•No bus current loading when output is tied to 5 V bus

•Latch-up protection:

•JESD78B Class II exceeds 500 mA

•ESD protection:

•HBM JESD22-A114F exceeds 2000 V

•MM JESD22-A115-A exceeds 200 V

3. Ordering information

Table 1. Ordering information

PackageType number

Temperature range Name Description Version

74LVT16245BDL

74LVTH16245BDL

-40 °C to +85 °C SSOP48 plastic shrink small outline package; 48 leads;

body width 7.5 mm

SOT370-1

74LVT16245BDGG

74LVTH16245BDGG

-40 °C to +85 °C TSSOP48 plastic thin shrink small outline package; 48 leads;

body width 6.1 mm

SOT362-1

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

4. Functional diagram

1DIR

1B0

1B1

1B2

1B3

1B4

1B5

1B6

1B7

2B0

2B1

2B2

2B3

2B4

2B5

2B6

2B7

1A0

1A1

1A2

1A3

1A4

1A5

1A6

1A7

2A0

2A1

2A2

2A3

2A4

2A5

2A6

2A7

1OE

2DIR

2OE

001aaa789

Fig. 1. Logic symbol

Product data sheet Rev. 11 — 31 October 2018 2 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

3EN1[BA]

6EN4[BA]

3EN2[AB]

6EN5[AB]

1A0

2A1

2A0

2A2

2A3

2A4

2A5

2A6

2A7

2B1

2B2

2B3

2B4

2B5

2B6

2B7

1OE

1DIR

mna709

1A1

1A2

1A3

1A4

1A5

1A6

1A7

1B0

2B0

1B1

1B2

1B3

1B4

1B5

1B6

1B7

2OE

2DIR

Fig. 2. IEC logic symbol

Product data sheet Rev. 11 — 31 October 2018 3 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

5. Pinning information

5.1. Pinning

74LVT16245B

74LVTH16245B

1DIR 1OE

1B0 1A0

1B1 1A1

GND GND

1B2 1A2

1B3 1A3

VCC VCC

1B4 1A4

1B5 1A5

GND GND

1B6 1A6

1B7 1A7

2B0 2A0

2B1 2A1

GND GND

2B2 2A2

2B3 2A3

VCC VCC

2B4 2A4

2B5 2A5

GND GND

2B6 2A6

2B7 2A7

2DIR 2OE

001aae471

Fig. 3. Pin configuration SOT370-1 (SSOP48) and SOT362-1 (TSSOP48)

5.2. Pin description

Table 2. Pin description

Symbol Pin Description

1DIR, 2DIR 1, 24 direction control input

1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7 2, 3, 5, 6, 8, 9, 11, 12 data input/output

2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7 13, 14, 16, 17, 19, 20, 22, 23 data input/output

GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V)

VCC 7, 18, 31, 42 supply voltage

1OE, 2OE 48, 25 output enable input (active LOW)

2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7 36, 35, 33, 32, 30, 29, 27, 26 data input/output

1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7 47, 46, 44, 43, 41, 40, 38, 37 data input/output

Product data sheet Rev. 11 — 31 October 2018 4 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

6. Functional description

Table 3. Function table

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

Control Input/output

nOE nDIR nAn nBn

L L output nAn = nBn input

L H input output nBn = nAn

H X Z Z

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage -0.5 +4.6 V

VIinput voltage [1] -0.5 +7.0 V

VOoutput voltage output in OFF-state or HIGH-state [1] -0.5 +7.0 V

IIK input clamping current VI < 0 V -50 - mA

IOK output clamping current VO < 0 V -50 - mA

output in LOW-state - 128 mAIOoutput current

output in HIGH-state -64 - mA

Tstg storage temperature -65 +150 °C

Tjjunction temperature [2] - 150 °C

Ptot total power dissipation Tamb = -40 °C to +85 °C; [3] - 500 mW

[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability.

[3] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.

8. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 2.7 - 3.6 V

VIinput voltage 0 - 5.5 V

VIH HIGH-level input voltage 2.0 - - V

VIL LOW-level input voltage - - 0.8 V

IOH HIGH-level output current -32 - - mA

none - - 32 mAIOL LOW-level output current

current duty cycle ≤ 50 %; fi ≥ 1 kHz - - 64 mA

Tamb ambient temperature in free-air -40 - +85 °C

Δt/ΔV input transition rise and fall rate outputs enabled - - 10 ns/V

Product data sheet Rev. 11 — 31 October 2018 5 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

9. Static characteristics

Table 6. Static characteristics

At recommended operating conditions; Tamb = -40 °C to +85 °C ; Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ [1] Max Unit

VIK input clamping voltage VCC = 2.7 V; IIK = -18 mA -1.2 -0.85 - V

IOH = -100 μA; VCC = 2.7 V to 3.6 V VCC - 0.2 VCC - V

IOH = -8 mA; VCC = 2.7 V 2.4 2.5 - V

VOH HIGH-level output

voltage

IOH = -32 mA; VCC = 3.0 V 2.0 2.3 - V

VCC = 2.7 V

IOL = 100 μA - 0.07 0.2 V

IOL = 24 mA - 0.3 0.5 V

VCC = 3.0 V

IOL = 16 mA - 0.25 0.4 V

IOL = 32 mA - 0.3 0.5 V

VOL LOW-level output voltage

IOL = 64 mA - 0.4 0.55 V

control pins

VCC = 3.6 V; VI = VCC or GND - 0.1 ±1 μA

VCC = 0 V or 3.6 V; VI = 5.5 V - 0.1 10 μA

input/output data pins; VCC = 3.6 V [2]

VI = 5.5 V - 0.1 20 μA

VI = VCC - 0.5 10 μA

IIinput leakage current

VI = 0 V -5 -0.1 - μA

IOFF power-off leakage current VCC = 0 V; VI or VO = 0 V to 4.5 V - 0.1 ±100 μA

IBHL bus hold LOW current VCC = 3 V; VI = 0.8 V 75 135 - μA

IBHH bus hold HIGH current VCC = 3 V; VI = 2.0 V - -135 -75 μA

IBHLO bus hold LOW

overdrive current

nAn input; VI = 0 V to 3.6 V; VCC = 3.6 V [3] 500 - - μA

IBHHO bus hold HIGH

overdrive current

nAn input; VI = 0 V to 3.6 V; VCC = 3.6 V [3] - - -500 μA

ILO output leakage current output in HIGH-state when VO ˃ VCC;

VO = 5.5 V; VCC = 3.0 V

- 75 125 μA

IO(pu/pd) power-up/power-down

output current

VCC ≤ 1.2 V; VO = 0.5 V to VCC;

VI = GND or VCC; nOE = don’t care

[4] - 40 ±100 μA

Product data sheet Rev. 11 — 31 October 2018 6 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

Symbol Parameter Conditions Min Typ [1] Max Unit

VCC = 3.6 V; VI = GND or VCC; IO = 0 A

outputs HIGH - 0.07 0.12 mA

outputs LOW - 4.7 6.0 mA

ICC supply current

outputs disabled [5] - 0.07 0.12 mA

ΔICC additional supply current per input pin; VCC = 3.0 V to 3.6 V;

one input at VCC - 0.6 V,

other inputs at VCC or GND

[6] - 0.1 0.2 mA

CIinput capacitance pins nDIR and nOE, VO = 0 V or 3.0 V - 3 - pF

Cio(off) off-state input/output

capacitance

pins nAn and nBn, outputs disabled;

VO = GND or VCC

- 9 - pF

[1] Typical values are measured at VCC = 3.3 V and at Tamb = 25 °C.

[2] Unused pins at VCC or GND.

[3] This is the bus hold overdrive current required to force the input to the opposite logic state.

[4] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms.

From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only.

[5] ICC is measured with outputs pulled to VCC or GND.

[6] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.

10. Dynamic characteristics

Table 7. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); Tamb = -40 °C to +85 °C; For test circuit see Fig. 6.

Symbol Parameter Conditions Min Typ [1] Max Unit

nAn to nBn or nBn to nAn; see Fig. 4

VCC = 2.7 V - - 3.5 ns

tPLH LOW to HIGH

propagation delay

VCC = 3.0 V to 3.6 V 1.0 1.9 3.3 ns

nAn to nBn or nBn to nAn; see Fig. 4

VCC = 2.7 V - - 3.5 ns

tPHL HIGH to LOW

propagation delay

VCC = 3.0 V to 3.6 V 1.0 1.7 3.3 ns

nOE to nAn or nBn; see Fig. 5

VCC = 2.7 V - - 5.3 ns

tPZH OFF-state to HIGH

propagation delay

VCC = 3.0 V to 3.6 V 1.0 2.8 4.5 ns

nOE to nAn or nBn; see Fig. 5

VCC = 2.7 V - - 5.1 ns

tPZL OFF-state to LOW

propagation delay

VCC = 3.0 V to 3.6 V 1.0 2.8 4.1 ns

nOE to nAn or nBn; see Fig. 5

VCC = 2.7 V - - 5.7 ns

tPHZ HIGH to OFF-state

propagation delay

VCC = 3.0 V to 3.6 V 1.5 3.2 5.1 ns

nOE to nAn or nBn; see Fig. 5

VCC = 2.7 V - - 4.6 ns

tPLZ LOW to OFF-state

propagation delay

VCC = 3.0 V to 3.6 V 1.5 3.0 4.6 ns

[1] All typical values are at VCC = 3.3 V and Tamb = 25 °C.

Product data sheet Rev. 11 — 31 October 2018 7 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

10.1. Waveforms and test circuit

mna477

nAn, nBn

input

nBn, nAn

output

tPHL tPLH

GND

VOH

VOL

Measurements points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig. 4. Propagation delay input (nAn, nBn) to output (nBn, nAn)

001aaj658

tPZL

nAn or nBn

output

nBn or nAn

output

nOE input

VOL

VOH

3.0 V

0 V

tPLZ

tPZH tPHZ

Measurements points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig. 5. 3-state output enable and disable times

Table 8. Measurement points

Input Output

VMVMVXVY

1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V

Product data sheet Rev. 11 — 31 October 2018 8 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

VEXT

VCC

VIVO

001aae235

DUT

PULSE

GENERATOR

VMVM

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

Test data is given in Table 9.

Definitions test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig. 6. Test circuit for measuring switching times

Table 9. Test data

Input Load VEXT

VIfitWtr, tfCLRLtPHZ, tPZH tPLZ, tPZL tPLH, tPHL

2.7 V ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND 6 V open

Product data sheet Rev. 11 — 31 October 2018 9 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

11. Package outline

UNIT A

1 A

2 A

3 b

p c D

(1) E

(1) e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.4

0.2

2.35

2.20 0.25 0.3

0.2

0.22

0.13

16.00

15.75

7.6

7.4 0.635 1.4 0.25

10.4

10.1

1.0

0.6

1.2

1.0

0.85

0.40

0.18 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT370-1 99-12-27

03-02-19

(1)

w M

v M A

48 25

MO-118

detail X

(A )

pin 1 index

0 5 10 mm

scale

SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1

max.

2.8

Fig. 7. Package outline SOT370-1 (SSOP48)

Product data sheet Rev. 11 — 31 October 2018 10 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SOT362-1 MO-153

sot362-1_po

03-02-19

13-08-05

Unit

max

nom

min

0.15 0.28 0.2 12.6

0.5

0.8

Dimensions (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1

A1A2

1.05

A3bpc D(1)

8°

θE(2) e HEL

LpQ v w

1.2 0.25 0.10.25 0.08

y Z

7.9 0.46.0 0.350.05 0.17 0.1 12.4 0.4 0°

0.85

8.3 0.86.2 0.50

pin 1 index

v A

1 24

48 25

detail X

(A3)

0 5 mm

scale

2.5

Fig. 8. Package outline SOT362-1 (TSSOP48)

Product data sheet Rev. 11 — 31 October 2018 11 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

12. Abbreviations

Table 10. Abbreviations

Acronym Description

BiCMOS Bipolar Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74LVT_LVTH16245B v.11 20181031 Product data sheet - 74LVT_LVTH16245B v.10

Modifications: •The format of this data sheet has been redesigned to comply with the identity guidelines

of Nexperia.

•Legal texts have been adapted to the new company name where appropriate.

•Type numbers 74LVT16245BEV (SOT702-1),

74LVT16245BBX and 74LVTH16245BBX (SOT1134-2) removed.

•Package outline drawing SOT362-1 updated.

74LVT_LVTH16245B v.10 20120301 Product data sheet - 74LVT_LVTH16245B v.9

Modifications: •For type number 74LVT16245BBX and 74LVTH16245BBX the sot code has changed to

SOT1134-2.

74LVT_LVTH16245B v.9 20111122 Product data sheet - 74LVT_LVTH16245B v.8

Modifications: •Legal pages updated.

74LVT_LVTH16245B v.8 20110617 Product data sheet - 74LVT_LVTH16245B v.7

74LVT_LVTH16245B v.7 20100329 Product data sheet - 74LVT_LVTH16245B v.6

74LVT_LVTH16245B v.6 20090409 Product data sheet - 74LVT_LVTH16245B v.5

74LVT_LVTH16245B v.5 20090312 Product data sheet - 74LVT_LVTH16245B v.4

74LVT_LVTH16245B v.4 20060323 Product data sheet - 74LVT16245B v.3

74LVT16245B v.3 20021031 Product data sheet - 74LVT16245B v.2

74LVT16245B v.2 19980219 Product specification - 74LVT16245B v.1

74LVT16245B v.1 19940523 Product specification - -

Product data sheet Rev. 11 — 31 October 2018 12 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

14. Legal information

Data sheet status

Document status

[1][2]

Product

status [3]

Definition

Objective [short]

data sheet

Development This document contains data from

the objective specification for

product development.

Preliminary [short]

data sheet

Qualification This document contains data from

the preliminary specification.

Product [short]

data sheet

Production This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the internet at https://www.nexperia.com.

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warranties as to the accuracy or completeness of information included herein

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with the same product type number(s) and title. A short data sheet is

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detailed and full information. For detailed and full information see the relevant

full data sheet, which is available on request via the local Nexperia sales

office. In case of any inconsistency or conflict with the short data sheet, the

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product data given in the Limiting values and Characteristics sections of this

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or warranty that such applications will be suitable for the specified use

without further testing or modification.

Customers are responsible for the design and operation of their applications

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Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

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Product data sheet Rev. 11 — 31 October 2018 13 / 14

Nexperia 74LVT16245B; 74LVTH16245B

3.3 V 16-bit transceiver; 3-state

Contents

1. General description...................................................... 1

2. Features and benefits.................................................. 1

3. Ordering information....................................................1

4. Functional diagram.......................................................2

5. Pinning information......................................................4

5.1. Pinning.........................................................................4

5.2. Pin description............................................................. 4

6. Functional description................................................. 5

7. Limiting values............................................................. 5

8. Recommended operating conditions..........................5

9. Static characteristics....................................................6

10. Dynamic characteristics............................................ 7

10.1. Waveforms and test circuit........................................ 8

11. Package outline........................................................ 10

12. Abbreviations............................................................ 12

13. Revision history........................................................12

14. Legal information......................................................13

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 31 October 2018

Product data sheet Rev. 11 — 31 October 2018 14 / 14