SIP Delay Lines Patent Pending DS Series 1.0 Description These delay lines provide timing control to 10 nanosecond in a SIP solder leaded three pin package. Thin film on ceramic construction provides for high reliability and high bandwidth performance. The DS1L5 B series are designed for tape and reel packaging and pick and place automated assembly. 2.0 Mechanical - Series B, Please refer to page 43 for land pattern 13.10 max 12.40 max 200 2.30 2.54 Max 200 H M 3.2 min 3.66 max M 6.50 max 4.0 max 0.25 typ 0.5 0.10 2.54 0.1 2.54 0.1 schematic dimension mm 8.25 max 0.50 0.10 2.25 0.25 dimension mm Serial Code S Serial Code B 3.0 Electrical Type Time delay range Time delay tolerance Time delay increment Characteristic impedance DC resistance Rated current Temperature coefficient of time delay Insulation resistance Isolation resistance Operating temperature Storage temperature DS1L 0.1 to 10.0 ns 0.1 to 2.0 ns: 2.25 to 5.0 ns: 5.5 to 10.0 ns: 0.1 to 2.0 ns: 2.25 to 5.0 ns: 5 to 10.0 ns: 50 ohm 5 ohm 1 ohm/ns max 100 mA <150 ppm/C >100 Mohm @ 50 >100 Mohm @ 50 -40C to +85C -55C to +125C Serial Code S 0.050 ns 0.125 ns 0.250 ns 0.10 ns steps 0.25 ns steps 0.50 ns steps Time Delay 0.1 to 5.0 ns 5.5 to 10.0 ns Height (H) 6.35 max 9.20 max Serial Code B Time Delay 0.1 to 5.0 ns Height (H) 6.50 max Vdc Vdc 4.0 Part Number DS Product designator Circuit/element qualifier 1L Impedance (5 = 50 ohm) 5 D Form factor Lead frame J Time delay (200 = 2.0 ns) *** S R EG I S TERE D I S TERE D R Serial code (S = SIP series), (B = SMT series) EG ISO9001 ISO14001 A4 A8 303 561 Manufacturer(s) of the products described on this page are indicated by their respective logos. 9 Form D V Form J