9
SIP Delay Lines
DS Series
1.0 Description
3.0 Electrical
4.0 Part Number
These delay lines provide timing control to 10 nanosecond in a SIP solder leaded three pin package. Thin film
on ceramic construction provides for high reliability and high bandwidth performance. The DS1L5 B series are
designed for tape and reel packaging and pick and place automated assembly.
dimension mm schematic
Type DS1L
Time delay range 0.1 to 10.0 ns
0.1 to 2.0 ns: ±0.050 ns
Time delay tolerance 2.25 to 5.0 ns: ±0.125 ns
5.5 to 10.0 ns: ±0.250 ns
0.1 to 2.0 ns: 0.10 ns steps
Time delay increment 2.25 to 5.0 ns: 0.25 ns steps
5 to 10.0 ns: 0.50 ns steps
Characteristic impedance 50 ohm ± 5 ohm
DC resistance 1 ohm/ns max
Rated current 100 mA
Temperature coefficient of time delay <150 ppm/°C
Insulation resistance >100 Mohm @ 50 Vdc
Isolation resistance >100 Mohm @ 50 Vdc
Operating temperature -40°C to +85°C
Storage temperature -55°C to +125°C
Time Delay Height (H) Form
0.1 to 5.0 ns 6.35 max D
5.5 to 10.0 ns 9.20 max V
Manufacturer(s) of the products described on this page are indicated by their respective logos.
Patent Pending
Serial Code S Serial Code B
2.0 Mechanical - Series B, Please refer to page 43 for land pattern
dimension mm
DS
1L
5
D
J
***
SSerial code (S = SIP series), (B = SMT series)
Time delay (200 = 2.0 ns)
Lead frame
Form factor
Impedance (5 = 50 ohm)
Product designator
Circuit/element qualifier
Time Delay Height (H) Form
0.1 to 5.0 ns 6.50 max J
Serial Code S
Serial Code B