© 1987
BIPOLAR ANALOG INTEGRATED CIRCUIT
µ
µµ
µ
PC4071
J-FET INPUT LOW-NOISE OPERATIONAL AMPLIFIER
DATA SHEET
Document No. G15204EJ4V0DS00 (4th edition)
(Previous No. IC-1616)
Date Published November 2000 NS CP(K)
Printed in Japan
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
The mark ★ shows major revised points.
DESCRIPTION
The
µ
PC4071 is a J-FET input operational amplifier. This product is designed as low noise version of the
µ
PC4081.
The features of the
µ
PC4071 are more improved input equivalent noise voltage, input offset voltage and input bias
current than those of
µ
PC4081. By these features, the
µ
PC4071 is excellent choice for wide variety of applications
including audio preamplifier and active filter.
FEATURES
•Low noise: en = 18 nV/ Hz (TYP.)
•Very low input bias and offset currents
•Output short circuit protection
•High input impedance...J-FET Input stage
•Internal frequency compensation
•High slew rate...13 V/
µ
s (TYP.)
ORDERING INFORMATION
Part Number Package
µ
PC4071C 8-pin plastic DIP (7.62 mm (300))
µ
PC4071G2 8-pin plastic SOP (5.72 mm (225))
EQUIVALENT CIRCUIT PIN CONFIGURATION (Top View)
PC4071C, 4071G2
1
2
3
4
8
7
6
5
NC
V
+
OUT
OFFSET
NULL
+
_
OFFSET
NULL
I
I
I
N
V
µ
_
Remark NC : No Connection
R
1
R
8
R
9
R
6
D
1
R
7
R
10
R
11
D
2
Q
15
R
4
R
2
R
5
R
3
I
I
I
N
(2) Q
1
Q
2
Q
8
Q
16
Q
9
Q
10
Q
12
Q
13
Q
5
Q
14
Q
3
Q
4
Q
11
Q
6
Q
7
C
1
OFFSET
NULL OFFSET
NULL
OUT
V
–
V
+
(3)
(1) (5) (6)
(4)
(7)
Data Sheet G15204EJ4V0DS
2
µ
µµ
µ
PC4071
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Parameter Symbol Ratings Unit
Voltage bet ween V+ and V– Note 1 V+ – V––0.3 to +36 V
Different i al Input Voltage VID ±30 V
Input Vol tageNote 2 VIV––0.3 to V+ +0.3 V
Output Vol t ageNo te 3 VOV––0.3 to V+ +0.3 V
C PackageNote 4 350 mWPower Dissipation
G2 PackageNote 5
PT
440 mW
Output Short Circuit DurationNote 6 Indefinite sec
Operating Ambi ent Temperature TA–20 to +80 °C
Storage Temperat ure Tstg –55 to +125 °C
Notes 1. Reverse connection of supply voltage can cause destruction.
2. The input voltage should be allowed to input without damage or destruction. Even during the transition
period of supply voltage, power on/off etc., this specification should be kept. The normal operation will
establish when the both inputs are within the Common Mode Input Voltage Range of electrical
characteristics.
3. This specification is the voltage which should be allowed to supply to the output terminal from external
without damage or destructive. Even during the transition period of supply voltage, power on/off etc., this
specification should be kept. The output voltage of normal operation will be the Output Voltage Swing of
electrical characteristics.
4. Thermal derating factor is –5.0 mV/°C when operating ambient temperature is higher than 55°C.
5. Thermal derating factor is –4.4 mV/°C when operating ambient temperature is higher than 25°C.
6. Pay careful attention to the total power dissipation not to exceed the absolute maximum ratings, Note 4
and Note 5.
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol MIN. TYP. MAX. Unit
Supply V ol tage V±±5±16 V
Output Current IO±10 mA
Capaciti ve Load (AV = +1, Rf = 0 Ω)C
L100 pF
OFFSET VOLTAGE NULL CIRCUIT
+
_
2
35
1
6
100 kΩ
VR
1
V
_
Remark The OFFSET NULL pins should be left
open or connected to V– via a resistor as
shown in the left figure. Don't connect to
any lines other than V–, otherwise
mulfunction, degradation, or failure may
occur.
★
Data Sheet G15204EJ4V0DS 3
µ
µµ
µ
PC4071
ELECTRICAL CHARACTERISTICS (TA = 25°C, V±
±±
± = ±
±±
±15 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Input Offset Vol tage VIO RS ≤ 50 Ω±3±10 mV
Input Offset Current Note 7 IIO ±5±50 pA
Input Bi as Current Note 7 IB30 200 pA
Large Signal Vol tage Gain AVRL ≥ 2 kΩ , VO = ±10 V 25000 200000
Supply Current ICC IO = 0 A 2.0 2.7 mA
Common Mode Rejection Rati o CMR 70 86 dB
Supply V ol tage Rejecti on Ratio SVR 70 86 dB
RL ≥ 10 kΩ±12 ±13.5 VOutput Vol t age Swing Vom
RL ≥ 2 kΩ±10 ±12 V
Common Model I nput Voltage Range VICM ±10 V
Slew Rate SR AV = 1 13 V/
µ
s
Unity Gain Frequency funity 3MHz
Input Equi valent Nois e Voltage VnRS = 100 Ω, f = 10 Hz to 10 kHz 4
µ
Vr.m.s.
Input Equi valent Nois e Voltage Densi ty enRS = 100 Ω, f = 1 kHz 18 nV/√Hz
Input Offset Vol tage VIO RS ≤ 50 Ω, TA = –20 to +70°C±13mV
Average VIO Tem perature Drift ∆VIO/∆TT
A = –20 to +70°C±10
µ
V/°C
Input Offset CurrentNo te 7 IIO TA = –20 to +70°C±2nA
Input Bi as CurrentNote 7 IBTA = –20 to +70°C7nA
Notes 7. Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input
stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain the
junction temperature close to the operating ambient temperature.
Data Sheet G15204EJ4V0DS
4
µ
µµ
µ
PC4071
TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C, TYP.)
20
600
500
400
300
200
100
0
−5
00
10
20
30
40
10
20
30
−4
−3
−2
−1
0
0.01
0.1
1.0
10
100
1
2
3
4
5
0
20
40
60
80
100
120
100 1 k 10 k
±
10
±
20
100 k 1 M 10 M
−40 −20 0 20
T
A
- Operating Ambient Temperature - °C
INPUT OFFSET VOLTAGE INPUT BIAS CURRENT
T
A
- Operating Ambient Temperature - °C
40 60 80
1
−200 20406080
100 10 k 1 M1 k10 100 k 10 M
40 60 80 100
PC4071G2
PC4071C
T
A
- Operating Ambient Temperature - °C
f - Frequency - Hz V
±
- Supply Voltage - V
LARGE SIGNAL FREQUENCY RESPONSE OUTPUT VOLTAGE SWING
f - Frequency - Hz
POWER DISSIPATION OPEN LOOP FREQUENCY RESPONSE
P
T
- Total Power Dissipation - mWV
om
- Output Voltage Swing - V
p-p
V
IO
- Input Offset Voltage - mV
A
V
- Open Loop Voltage Gain - dBV
om
- Output Voltage Swing - V
p-p
I
B
- Input Bias Current - nA
V
±
= ±15 V
R
L
= 2 kΩ
V
±
=
±
15 V V
±
=
±
15 V
µ
µ
200°C/W
227°C/W
V= ±15 V R
L
= 10 kΩ
±
V= ±10 V
±
V= ±5 V
±
R
L
= 10 kΩ
Data Sheet G15204EJ4V0DS 5
µ
µµ
µ
PC4071
VO - Output Voltage - V
VOLTAGE FOLLOWER PULSE RESPONSE
t - Time - s
µ
0
−5
0
5
123
Voltage Density - nV/ Hz
en - Input Equivalent Noise
INPUT EQUIVALENT NOISE VOLTAGE DENSITY
f - Frequency - Hz
10
10
10
10
10
1100 1 k 10 k 100 k
OUTPUT VOLTAGE SWING
RL - Load Resistance - Ω
0300 1 k 10 k
10
20
30
R
S
= 100 Ω
V =
±
15 V
V =
±
15 V
AV = +1
RL = 2 kΩ
CL = 100 pF
V± = ±15 V
4
VI - Input Voltage - V /
−5
0
5
±
±
100 3 k
Vom - Output Voltage Swing - Vp-p
ICC - Supply Current - mA
SUPPLY CURRENT
V± - Supply Voltage - V
±5
0
0.5
1.0
1.5
2.0
2.5
±10 ±15 ±20
4
3
2
Data Sheet G15204EJ4V0DS
6
µ
µµ
µ
PC4071
PACKAGE DRAWINGS (Unit : mm)
14
85
ITEM MILLIMETERS
NOTES
1. Each lead centerline is located within 0.25 mm of
its true position (T.P.) at maximum material condition.
P8C-100-300B,C-2
N 0.25
P 0.9 MIN.
R0∼15°
A 10.16 MAX.
B 1.27 MAX.
F 1.4 MIN.
G 3.2±0.3
J 5.08 MAX.
K 7.62 (T.P.)
C 2.54 (T.P.)
D 0.50±0.10
H 0.51 MIN.
I 4.31 MAX.
L 6.4
M 0.25+0.10
−0.05
2. ltem "K" to center of leads when formed parallel.
M
A
R
M
P
I
J
H
G
F
DN
C
B
8-PIN PLASTIC DIP (7.62mm(300))
L
K
★
Data Sheet G15204EJ4V0DS 7
µ
µµ
µ
PC4071
ITEM
B
C
I
8-PIN PLASTIC SOP (5.72 mm (225))
D
E
F
G
H
J
P
MILLIMETERS
1.27 (T.P.)
0.78 MAX.
4.4±0.15
0.1±0.1
0.42
1.59±0.21
6.5±0.3
1.49
+0.08
−0.07
1.1±0.2
3°+7°
−3°
NOTE
Each lead centerline is located within 0.12 mm of
its true position (T.P.) at maximum material condition. A 5.2 +0.17
−0.20
K
L
M
N
0.6±0.2
0.17
0.12
0.10
+0.08
−0.07
S8GM-50-225B-6
85
14
S
M
C
detail of lead end
A
M
SN
FG
B
E
D
P
H
IJ
K
L
Data Sheet G15204EJ4V0DS
8
µ
µµ
µ
PC4071
RECOMMENDED SOLDER ING CONDITIONS
When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering
processes are used, or if the soldering is performed under different conditions, please make sure to consult with our
sales offices.
For more details, refer to our document "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY
MANUAL"(C10535E).
Type of Surface Mount Device
µ
µµ
µ
PC4071G2: 8-pin plastic SOP (5.72 mm (225))
Process Conditions Symbol
Infrared Ray Reflow Peak temperature: 230°C or below (P ackage surf ace temperat ure),
Reflow ti m e: 30 seconds or l ess (at 210°C or hi gher),
Maxim um num ber of reflow processes: 1 time.
IR30-00-1
Vapor Phase Soldering Peak temperature: 215°C or below (Package surface t em perature),
Reflow ti m e: 40 seconds or l ess (at 200°C or hi gher),
Maxim um num ber of reflow processes: 1 time.
VP15-00-1
Wave Solderi ng Solder tem perature: 260°C or below, Fl ow t ime: 10 seconds or less,
Maxim um num ber of flow processes: 1 time,
Pre-heating t em perature: 120°C or below (Pac kage surface temperature).
WS60-00-1
Partial Heating Method Pin t emperature: 300°C or below,
Heat tim e: 3 seconds or l ess (Per eac h side of the device).
–
Caution Apply only one kind of soldering condition to a device, except for "partial heating method", or the
device will be damaged by heat stress.
Type of Through-hole Device
µ
µµ
µ
PC4071C: 8-pin plastic DIP (7.62 mm (300))
Process Conditions
Wave Solderi ng
(only to l eads)
Solder tem perat ure: 260°C or below,
Flow time: 10 seconds or less.
Partial Heating Method Pin tem perat ure: 300°C or below,
Heat tim e: 3 seconds or l ess (per each l ead).
Caution For through-hole device, the wave soldering process must be applied only to leads, and make sure
that the package body does not get jet soldered.
★
Data Sheet G15204EJ4V0DS 9
µ
µµ
µ
PC4071
[MEMO]
Data Sheet G15204EJ4V0DS
10
µ
µµ
µ
PC4071
[MEMO]
Data Sheet G15204EJ4V0DS 11
µ
µµ
µ
PC4071
[MEMO]
µ
µµ
µ
PC4071
M8E 00. 4
The information in this document is current as of November, 2000. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
products and/or types are available in every country. Please check with an NEC sales representative
for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
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Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's
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