H7N1004LD-E - Renesas Electronics

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April 1st, 2010

Renesas Electronics Corporation

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Rev.6.00, Aug.27.2003, page 1 of 11

H7N1004LD, H7N1004LS, H7N1004LM

Silicon N-Channel MOSFET

High-Speed Power Switching REJ03G0072-0600Z

(Previous ADE-208-1552E(Z))

Rev.6.00

Aug.27.2003

Features

• Low on-resistance

• RDS(on) = 25 mΩ typ.

• Low drive current

• Available for 4. 5 V gat e drive

Outline

1. Gate

2. Drain

3. Source

4. Drain

LDPAK

H7N1004LD

H7N1004LS H7N1004LM

123

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 2 of 11

Absolute Maximum Ratings

(Ta = 25°C)

Item Symbol Value Unit

Drain to source voltage VDSS 100 V

Gate to source voltage VGSS ±20 V

Drain current ID30 A

Drain peak current ID (pulse)Note1 100 A

Body-drain diode reverse drain

current IDR 30 A

Avalanche current IAP Note 3 15 A

Avalanche energy EAR Note 3 22.5 mJ

Channel dissipation Pch* Note 2 50 W

Channel temperature Tch 150 °C

Storage temperature Tstg –55 to +150 °C

Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%

2. Value at Tc = 25°C

3. Value at Tch = 25°C, Rg ≥ 50 Ω

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 3 of 11

Electrical Characteristics

(Ta = 25°C)

Item Symbol Min Typ Max Unit Test conditions

Drain to source breakdown voltage V(BR)DSS 100 — — V ID = 10 mA, VGS = 0

Gate to source breakdown voltage V(BR)GSS ±20 — — V IG = ±100 µA, VDS = 0

Gate to source leak current IGSS ——±10 µAV

GS = ±16 V, VDS = 0

Zero gate voltage drain current IDSS ——10µAV

DS = 100 V, VGS = 0

Gate to source cutoff voltage VGS(off) 1.5 — 2.5 V ID = 1 mA, VDS = 10 V Note 1

Static drain to source on state RDS(on) —2535mΩID = 15 A, VGS = 10 V Note 1

resistance — 30 45 mΩID = 15 A, VGS = 4.5 V Note 1

Forward transfer admittance |yfs| 22 37 — S ID = 15 A, VGS = 10 V Note 1

Input capacitance Ciss — 2800 — pF VDS = 10 V

Output capacitance Coss — 240 — pF VGS = 0

Reverse transfer capacitance Crss — 140 — pF f = 1 MHz

Total gate charge Qg — 50 — nC VDD = 50 V

Gate to source charge Qgs — 9 — nC VGS = 10 V

Gate to drain charge Qgd — 11 — nC ID = 30 A

Turn-on delay time td(on) — 23 — ns VGS = 10 V, ID = 15 A

Rise time tr — 120 — ns RL = 2 Ω

Turn-off delay time td(off) — 70 — ns Rg = 4.7 Ω

Fall time tf — 9.5 — ns

Body-drain diode forward voltage VDF —0.9—V I

F = 30 A, VGS = 0

Body-drain diode reverse recovery

time trr — 47 — ns IF = 30 A, VGS = 0

diF/dt = 100 A/µs

Notes: 1. Pulse test

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 4 of 11

Main Characteristics

0.3

0.1

0.1 0.3 1 310 30 100

0246810

015

0.02

100

Ta = 25°C

10 V

V = 3 V

3.5 V

Tc = 75°C

25°C

-25°C

Drain to Source Voltage V (V)

Drain Current I (A)

Maximum Safe Operation Area

Drain to Source Voltage V (V)

Drain Current I (A)

Typical Output Characteristics

Pulse Test

Gate to Source Voltage V (V)

Drain Current I (A)

Typical Transfer Characteristics

V = 10 V

Pulse Test

100 µs

1 ms

PW = 10 ms (1shot)

DC Operation

(Tc = 25°C)

10 µs

6 V 4 V

Operation in

this area is

limited by R

DS(on)

234

050 100 150 200

Channel Dissipation Pch (W)

Case Temperature Tc (°C)

Power vs. Temperature Derating 200

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 5 of 11

1 5 20 10021050

100

200

500

100

–25 0 25 50 75 100 125 150

0.01 10010

100

0.1

0.01

0.1 1

Static Drain to Source on State Resistance

vs. Drain Current

25°C

Tc = –25°C

75°C

V = 10 V

Pulse Test

V = 10 V

V = 4.5 V

Pulse Test

5, 10 A

I = 20 A

Drain Current I (A)

Drain to Source on State Resistance

DS(on)

Pulse Test

(mΩ)

Static Drain to Source on State Resistance

vs. Temperature

Forward Transfer Admittance vs.

Drain Current

Case Temperature Tc (°C) Drain Current I (A)

Static Drain to Source on State Resistance

(mΩ)

DS(on)

|yfs| (S)

Forward Transfer Admittance

V = 4.5 V

10 V

0.8

0.6

0.4

0.2

05 101520

Drain to Source Saturation Voltage VS.

Gate to Source Voltage

1.0

I = 20 A

10 A

5 A

Pulse Test

Gate to Source Voltage V (V)

V (V)

DS(on)

Drain to Source Saturation Voltage

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 6 of 11

01020304050

2000

5000

10000

1000

100

200

500

200

160

120

20 40 60 80 100

1000

100

0.1 0.3 1 3 10 30 100

V = 0

f = 1 MHz

Ciss

Coss

Crss

I = 30 A

V = 25 V

50 V

100 V

V = 100 V

50 V

25 V

d(on)

d(off)

V = 10 V, V = 30 V

PW = 5 µs, duty ≤ 1%

R = 4.7 Ω

GS DD

Typical Capacitance vs.

Drain to Source Voltage

Capacitance C (pF)

Drain to Source Voltage V (V)

Dynamic Input Characteristics Switching Characteristics

Drain to source Voltage V (V)

Gate to Source Voltage V (V)

Switching Time t (ns)

Gate Charge Qg (nC) Drain Current I (A)

0.1 0.3 1 3 10 30 100

100

di / dt = 100 A / µs

V = 0, Ta = 25°C

Body-Drain Diode Reverse

Recovery Time

Reverse Recovery Time trr (ns)

Reverse Drain Current I (A)

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 7 of 11

D. U. T

Monitor

VDD

50Ω

Vin

15 V

VDS

IAP

V(BR)DSS

VDD

E = • L • I •

V – V

AR AP

DSS

DSS DD

25 50 75 100 125 150

I = 15 A

V = 50 V

duty < 0.1 %

Rg > 50

Ω

Channel Temperature Tch (°C)

Repetitive Avalanche Energy E

(mJ)

Maximum Avalanche Energy vs.

Channel Temperature Derating

Avalanche Test Circuit Avalanche Waveform

00.4 0.8 1.2 1.6 2.0

V = 10 V

Pulse Test

0, -5 V

Reverse Drain Current vs.

Source to Drain Voltage

Reverse Drain Current I (A)

Source Drain Voltage V (V)

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 8 of 11

Vin Monitor

D.U.T.

Vin

10 V

= 30 V

td(on)

Vin

90% 90%

10%

Vout

td(off)

Vout

Monitor 90%

10%

Switching Time Test Circuit Switching Time Waveform

Pulse Width PW (s)

Normalized Transient Thermal Impedance vs. Pulse Width

Normalized Transient Thermal Impedance

s (t)

0.3

0.1

0.03

0.01

10 µ100 µ1 m 10 m 100 m 1 10

Tc = 25°C

D = 1

0.5

0.2

0.1

0.05

0.02

0.01

1shot pulse

D = PW

ch - c(t) = s (t) • ch - c

ch - c = 2.5°C/ W, Tc = 25°C

θ γ θ

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 9 of 11

Package Dimensions

• H7N1004LD

Package Code

JEDEC

JEITA

Mass

(reference value)

LDPAK (L)

—

1.40 g

10.2 ± 0.3

0.86

0.76 ± 0.1

2.54 ± 0.5

+ 0.2

– 0.1

1.3 ± 0.2

4.44 ± 0.2

1.3 ± 0.15

2.49 ± 0.2

0.4 ± 0.1

11.0 ± 0.5

8.6 ± 0.3

10.0

11.3 ± 0.5

+ 0.3

– 0.5

(1.4)

1.37 ± 0.2

As of January, 2003

Unit: mm

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 10 of 11

• H7N1004LS

Package Code

JEDEC

JEITA

Mass

(reference value)

LDPAK (S)-(1)

—

1.30 g

10.2 ± 0.3

1.37 ± 0.2

(1.5)

(1.4)

8.6 ± 0.3

10.0 + 0.3

– 0.5

4.44 ± 0.2

1.3 ± 0.15

0.1 + 0.2

– 0.1

0.4 ± 0.1

2.49 ± 0.2

0.86 + 0.2

– 0.1

2.54 ± 0.5

1.3 ± 0.2

3.0 + 0.3

– 0.5

(1.5)

7.8

6.6

2.2

1.7

7.8

7.0

As of January, 2003

Unit: mm

H7N1004LD, H7N1004LS, H7N1004LM

Rev.6.00, Aug.27.2003, page 11 of 11

• H7N1004LM

Package Code

JEDEC

JEITA

Mass

(reference value)

LDPAK (S)-(2)

—

1.35 g

10.2 ± 0.3

1.37 ± 0.2

(2.3)

(1.4)

8.6 ± 0.3

10.0 + 0.3

– 0.5

4.44 ± 0.2

1.3 ± 0.15

0.1 + 0.2

– 0.1

0.4 ± 0.1

2.49 ± 0.2

0.86 + 0.2

– 0.1

2.54 ± 0.5

1.3 ± 0.2

5.0 + 0.3

– 0.5

(1.5)

7.8

6.6

2.2

1.7

7.8

7.0

As of January, 2003

Unit: mm

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Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of

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