LMP7716QMME/NOPB - NATIONAL SEMICONDUCTOR

LMP7715,LMP7716

LMP7715/LMP7716/LMP7716Q Single and Dual Precision, 17 MHz, Low Noise,

CMOS Input Amplifiers

Literature Number: SNOSAV0D

LMP7715/LMP7716/

LMP7716Q

October 20, 2009

Single and Dual Precision, 17 MHz, Low Noise, CMOS Input

Amplifiers

General Description

The LMP7715/LMP7716/LMP7716Q are single and dual low

noise, low offset, CMOS input, rail-to-rail output precision am-

plifiers with high gain bandwidth products. The LMP7715/

LMP7716/LMP7716Q are part of the LMP® precision amplifier

family and are ideal for a variety of instrumentation applica-

tions.

Utilizing a CMOS input stage, the LMP7715/LMP7716/LM-

P7716Q achieve an input bias current of 100 fA, an input

referred voltage noise of 5.8 nV/ , and an input offset volt-

age of less than ±150 μV. These features make the LMP7715/

LMP7716/LMP7716Q superior choices for precision applica-

tions.

Consuming only 1.15 mA of supply current, the LMP7715 of-

fers a high gain bandwidth product of 17 MHz, enabling

accurate amplification at high closed loop gains.

The LMP7715/LMP7716/LMP7716Q have a supply voltage

range of 1.8V to 5.5V, which makes these ideal choices for

portable low power applications with low supply voltage re-

quirements.

The LMP7715/LMP7716/LMP7716Q are built with National’s

advanced VIP50 process technology. The LMP7715 is of-

fered in a 5-pin SOT-23 package and the LMP7716/LM-

P7716Q is offered in an 8-pin MSOP.

The LMP7716Q incorporates enhanced manufacturing and

support processes for the automotive market, including defect

detection methodologies. Reliability qualification is compliant

with the requirements and temperature grades defined in the

AEC-Q100 standard.

Features

Unless otherwise noted, typical values at VS = 5V.

■Input offset voltage ±150 μV (max)

■Input bias current 100 fA

■Input voltage noise 5.8 nV/√Hz

■Gain bandwidth product 17 MHz

■Supply current (LMP7715) 1.15 mA

■Supply current (LMP7716/LMP7716Q) 1.30 mA

■Supply voltage range 1.8V to 5.5V

■THD+N @ f = 1 kHz 0.001%

■Operating temperature range −40°C to 125°C

■Rail-to-rail output swing

■Space saving SOT-23 package (LMP7715)

■8-Pin MSOP package (LMP7716/LMP7716Q)

■LMP7716Q is AEC-Q100 grade 1 qualified and is manu-

factured on an automotive grade flow

Applications

■Active filters and buffers

■Sensor interface applications

■Transimpedance amplifiers

■Automotive

Typical Performance

Offset Voltage Distribution

20183622

Input Referred Voltage Noise

20183639

LMP® is a registered trademark of National Semiconductor Corporation.

LMP7715/LMP7716/LMP7716Q Precision, 17 MHz, Low Noise, CMOS Input Amplifiers

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Tolerance (Note 2)

Human Body Model 2000V

Machine Model 200V

Charge-Device Model 1000V

VIN Differential ±0.3V

Supply Voltage (VS = V+ – V−)6.0V

Voltage on Input/Output Pins V+ +0.3V, V− −0.3V

Storage Temperature Range −65°C to 150°C

Junction Temperature (Note 3) +150°C

Soldering Information

Infrared or Convection (20 sec) 235°C

Wave Soldering Lead Temp. (10 sec) 260°C

Operating Ratings (Note 1)

Temperature Range (Note 3) −40°C to 125°C

Supply Voltage (VS = V+ – V−)

0°C ≤ TA ≤ 125°C 1.8V to 5.5V

−40°C ≤ TA ≤ 125°C 2.0V to 5.5V

Package Thermal Resistance (θJA(Note 3))

5-Pin SOT-23 180°C/W

8-Pin MSOP 236°C/W

2.5V Electrical Characteristics

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.5V, V− = 0V ,VO = VCM = V+/2. Boldface limits apply at

the temperature extremes.

Symbol Parameter Conditions Min

(Note 5)

Typ

(Note 4)

Max

(Note 5)

Units

VOS Input Offset Voltage −20°C ≤ TA ≤ 85°C ±20 ±180

±330 μV

−40°C ≤ TA ≤ 125°C ±20 ±180

±430

TC VOS Input Offset Voltage Temperature Drift

(Note 6, Note 8)

LMP7715 –1 ±4 μV/°C

LMP7716/LMP7716Q –1.75

IBInput Bias Current VCM = 1.0V

(Note 7, Note 8)

−40°C ≤ TA ≤ 85°C 0.05 1

25 pA

−40°C ≤ TA ≤ 125°C 0.05 1

100

IOS Input Offset Current VCM = 1V

(Note 8)

0.006 0.5

50 pA

CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.4V 83

100 dB

PSRR Power Supply Rejection Ratio 2.0V ≤ V+ ≤ 5.5V

V− = 0V, VCM = 0

100

1.8V ≤ V+ ≤ 5.5V

V− = 0V, VCM = 0

85 98

CMVR Common Mode Voltage Range CMRR ≥ 80 dB

CMRR ≥ 78 dB

−0.3

–0.3

1.5

1.5 V

AVOL Open Loop Voltage Gain LMP7715, VO = 0.15 to 2.2V

RL = 2 kΩ to V+/2

LMP7716/LMP7716Q, VO = 0.15 to 2.2V

RL = 2 kΩ to V+/2

LMP7715, VO = 0.15 to 2.2V

RL = 10 kΩ to V+/2

110

LMP7716/ LMP7716Q, VO = 0.15 to 2.2V

RL = 10 kΩ to V+/2

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LMP7715/LMP7716/LMP7716Q

Symbol Parameter Conditions Min

(Note 5)

Typ

(Note 4)

Max

(Note 5)

Units

VOUT Output Voltage Swing

High

RL = 2 kΩ to V+/2 25 70

mV from

either rail

RL = 10 kΩ to V+/2 20 60

Output Voltage Swing

Low

RL = 2 kΩ to V+/2 30 70

RL = 10 kΩ to V+/2 15 60

IOUT Output Current Sourcing to V−

VIN = 200 mV (Note 9)

Sinking to V+

VIN = −200 mV (Note 9)

7.5

5.0

ISSupply Current LMP7715 0.95 1.30

1.65 mA

LMP7716/LMP7716Q (per channel) 1.10 1.50

1.85

SR Slew Rate AV = +1, Rising (10% to 90%) 8.3 V/μs

AV = +1, Falling (90% to 10%) 10.3

GBW Gain Bandwidth 14 MHz

enInput Referred Voltage Noise Density f = 400 Hz 6.8 nV/

f = 1 kHz 5.8

inInput Referred Current Noise Density f = 1 kHz 0.01 pA/

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, RL = 100 kΩ

VO = 0.9 VPP

0.003

f = 1 kHz, AV = 1, RL = 600Ω

VO = 0.9 VPP

0.004

5V Electrical Characteristics

Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2. Boldface limits apply at the

temperature extremes.

Symbol Parameter Conditions Min

(Note 5)

Typ

(Note 4)

Max

(Note 5)

Units

VOS Input Offset Voltage −20°C ≤ TA ≤ 85°C ±10 ±150

±300 μV

−40°C ≤ TA ≤ 125°C ±10 ±150

±400

TC VOS Input Offset Voltage Temperature Drift

(Note 6, Note 8)

LMP7715 –1 ±4 μV/°C

LMP7716/LMP7716Q –1.75

IBInput Bias Current VCM = 2.0V

(Note 7, Note 8)

−40°C ≤ TA ≤ 85°C 0.1 1

25 pA

−40°C ≤ TA ≤ 125°C 0.1 1

100

IOS Input Offset Current VCM = 2.0V

(Note 8)

0.01 0.5

50 pA

CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 3.7V 85

100 dB

PSRR Power Supply Rejection Ratio 2.0V ≤ V+ ≤ 5.5V

V− = 0V, VCM = 0

100

1.8V ≤ V+ ≤ 5.5V

V− = 0V, VCM = 0

85 98

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LMP7715/LMP7716/LMP7716Q

Symbol Parameter Conditions Min

(Note 5)

Typ

(Note 4)

Max

(Note 5)

Units

CMVR Common Mode Voltage Range CMRR ≥ 80 dB

CMRR ≥ 78 dB

−0.3

–0.3

AVOL Open Loop Voltage Gain LMP7715, VO = 0.3 to 4.7V

RL = 2 kΩ to V+/2

107

LMP7716/LMP7716Q, VO = 0.3 to 4.7V

RL = 2 kΩ to V+/2

LMP7715, VO = 0.3 to 4.7V

RL = 10 kΩ to V+/2

110

LMP7716/LMP7716Q, VO = 0.3 to 4.7V

RL = 10 kΩ to V+/2

VOUT Output Voltage Swing

High

RL = 2 kΩ to V+/2 32 70

mV from

either rail

RL = 10 kΩ to V+/2 22 60

Output Voltage Swing

Low

RL = 2 kΩ to V+/2

(LMP7715)

42 70

RL = 2 kΩ to V+/2

(LMP7716/LMP7716Q)

45 75

RL = 10 kΩ to V+/2 20 60

IOUT Output Current Sourcing to V−

VIN = 200 mV (Note 9)

Sinking to V+

VIN = −200 mV (Note 9)

10.5

6.5

ISSupply Current LMP7715 1.15 1.40

1.75 mA

LMP7716/LMP7716Q (per channel) 1.30 1.70

2.05

SR Slew Rate AV = +1, Rising (10% to 90%) 6.0 9.5 V/μs

AV = +1, Falling (90% to 10%) 7.5 11.5

GBW Gain Bandwidth 17 MHz

enInput Referred Voltage Noise Density f = 400 Hz 7.0 nV/

f = 1 kHz 5.8

inInput Referred Current Noise Density f = 1 kHz 0.01 pA/

THD+N Total Harmonic Distortion + Noise f = 1 kHz, AV = 1, RL = 100 kΩ

VO = 4 VPP

0.001

f = 1 kHz, AV = 1, RL = 600Ω

VO = 4 VPP

0.004

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LMP7715/LMP7716/LMP7716Q

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics

Tables.

Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is

PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.

Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will

also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.

Note 5: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality

Control (SQC) method.

Note 6: Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.

Note 7: Positive current corresponds to current flowing into the device.

Note 8: This parameter is guaranteed by design and/or characterization and is not tested in production.

Note 9: The short circuit test is a momentary open loop test.

Connection Diagrams

5-Pin SOT23

20183601

Top View

8-Pin MSOP

20183602

Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing Features

5-Pin SOT-23

LMP7715MF

AV3A

1k Units Tape and Reel

MF05A LMP7715MFE 250 Units Tape and Reel

LMP7715MFX 3k Units Tape and Reel

8-Pin MSOP

LMP7716MM

AX3A

1k Units Tape and Reel

MUA08A

LMP7716MME 250 Units Tape and Reel

LMP7716MMX 3.5k Units Tape and Reel

LMP7716QMM

AR5A

1k Units Tape and Reel AEC-Q100 Grade 1

qualified. Automotive

Grade Production Flow*

LMP7716QMME 250 Units Tape and Reel

LMP7716QMMX 3.5k Units Tape and Reel

*Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies.

Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified

with the letter Q. For more information go to http://www.national.com/automotive.

5 www.national.com

LMP7715/LMP7716/LMP7716Q

Typical Performance Characteristics Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.

Offset Voltage Distribution

20183681

TCVOS Distribution (LMP7715)

20183603

Offset Voltage Distribution

20183622

TCVOS Distribution (LMP7716/LMP7716Q)

20183680

Offset Voltage vs. VCM

20183610

Offset Voltage vs. VCM

20183611

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LMP7715/LMP7716/LMP7716Q

Offset Voltage vs. VCM

20183612

Offset Voltage vs. Supply Voltage

20183621

Offset Voltage vs. Temperature

20183609

CMRR vs. Frequency

20183656

Input Bias Current vs. VCM

20183623

Input Bias Current vs. VCM

20183624

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LMP7715/LMP7716/LMP7716Q

Supply Current vs. Supply Voltage (LMP7715)

20183605

Supply Current vs. Supply Voltage (LMP7716/LMP7716Q)

20183677

Crosstalk Rejection Ratio (LMP7716/LMP7716Q)

20183676

Sourcing Current vs. Supply Voltage

20183620

Sinking Current vs. Supply Voltage

20183619

Sourcing Current vs. Output Voltage

20183650

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LMP7715/LMP7716/LMP7716Q

Sinking Current vs. Output Voltage

20183654

Output Swing High vs. Supply Voltage

20183617

Output Swing Low vs. Supply Voltage

20183615

Output Swing High vs. Supply Voltage

20183616

Output Swing Low vs. Supply Voltage

20183614

Output Swing High vs. Supply Voltage

20183618

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LMP7715/LMP7716/LMP7716Q

Output Swing Low vs. Supply Voltage

20183613

Open Loop Frequency Response

20183641

Open Loop Frequency Response

20183673

Phase Margin vs. Capacitive Load

20183645

Phase Margin vs. Capacitive Load

20183646

Overshoot and Undershoot vs. Capacitive Load

20183630

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LMP7715/LMP7716/LMP7716Q

Slew Rate vs. Supply Voltage

20183629

Small Signal Step Response

20183638

Large Signal Step Response

20183637

Small Signal Step Response

20183633

Large Signal Step Response

20183634

THD+N vs. Output Voltage

20183626

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LMP7715/LMP7716/LMP7716Q

THD+N vs. Output Voltage

20183604

THD+N vs. Frequency

20183657

THD+N vs. Frequency

20183655

PSRR vs. Frequency

20183628

Input Referred Voltage Noise vs. Frequency

20183639

Time Domain Voltage Noise

20183682

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LMP7715/LMP7716/LMP7716Q

Closed Loop Frequency Response

20183636

Closed Loop Output Impedance vs. Frequency

20183632

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LMP7715/LMP7716/LMP7716Q

Application Information

LMP7715/LMP7716/LMP7716Q

The LMP7715/LMP7716/LMP7716Q are single and dual, low

noise, low offset, rail-to-rail output precision amplifiers with a

wide gain bandwidth product of 17 MHz and low supply cur-

rent. The wide bandwidth makes the LMP7715/LMP7716/

LMP7716Q ideal choices for wide-band amplification in

portable applications.

The LMP7715/LMP7716/LMP7716Q are superior for sensor

applications. The very low input referred voltage noise of only

5.8 nV/ at 1 kHz and very low input referred current noise

of only 10 fA/ mean more signal fidelity and higher signal-

to-noise ratio.

The LMP7715/LMP7716/LMP7716Q have a supply voltage

range of 1.8V to 5.5V over a wide temperature range of 0°C

to 125°C. This is optimal for low voltage commercial applica-

tions. For applications where the ambient temperature might

be less than 0°C, the LMP7715/LMP7716/LMP7716Q are ful-

ly operational at supply voltages of 2.0V to 5.5V over the

temperature range of −40°C to 125°C.

The outputs of the LMP7715/LMP7716/LMP7716Q swing

within 25 mV of either rail providing maximum dynamic range

in applications requiring low supply voltage. The input com-

mon mode range of the LMP7715/LMP7716/LMP7716Q ex-

tends to 300 mV below ground. This feature enables users to

utilize this device in single supply applications.

The use of a very innovative feedback topology has enhanced

the current drive capability of the LMP7715/LMP7716/LM-

P7716Q, resulting in sourcing currents of as much as 47 mA

with a supply voltage of only 1.8V.

The LMP7715 is offered in the space saving SOT-23 package

and the LMP7716/LMP7716Q is offered in an 8-pin MSOP.

These small packages are ideal solutions for applications re-

quiring minimum PC board footprint.

CAPACITIVE LOAD

The unity gain follower is the most sensitive configuration to

capacitive loading. The combination of a capacitive load

placed directly on the output of an amplifier along with the

output impedance of the amplifier creates a phase lag which

in turn reduces the phase margin of the amplifier. If phase

margin is significantly reduced, the response will be either

underdamped or the amplifier will oscillate.

The LMP7715/LMP7716/LMP7716Q can directly drive ca-

pacitive loads of up to 120 pF without oscillating. To drive

heavier capacitive loads, an isolation resistor, RISO as shown

in Figure 1, should be used. This resistor and CL form a pole

and hence delay the phase lag or increase the phase margin

of the overall system. The larger the value of RISO, the more

stable the output voltage will be. However, larger values of

RISO result in reduced output swing and reduced output cur-

rent drive.

20183661

FIGURE 1. Isolating Capacitive Load

INPUT CAPACITANCE

CMOS input stages inherently have low input bias current and

higher input referred voltage noise. The LMP7715/LMP7716/

LMP7716Q enhance this performance by having the low input

bias current of only 50 fA, as well as, a very low input referred

voltage noise of 5.8 nV/ . In order to achieve this a larger

input stage has been used. This larger input stage increases

the input capacitance of the LMP7715/LMP7716/LMP7716Q.

Figure 2 shows typical input common mode capacitance of

the LMP7715/LMP7716/LMP7716Q.

20183675

FIGURE 2. Input Common Mode Capacitance

This input capacitance will interact with other impedances,

such as gain and feedback resistors which are seen on the

inputs of the amplifier, to form a pole. This pole will have little

or no effect on the output of the amplifier at low frequencies

and under DC conditions, but will play a bigger role as the

frequency increases. At higher frequencies, the presence of

this pole will decrease phase margin and also cause gain

peaking. In order to compensate for the input capacitance,

care must be taken in choosing feedback resistors. In addition

to being selective in picking values for the feedback resistor,

a capacitor can be added to the feedback path to increase

stability.

The DC gain of the circuit shown in Figure 3 is simply −R2/

R1.

20183664

FIGURE 3. Compensating for Input Capacitance

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LMP7715/LMP7716/LMP7716Q

For the time being, ignore CF. The AC gain of the circuit in

Figure 3 can be calculated as follows:

(1)

This equation is rearranged to find the location of the two

poles:

(2)

As shown in Equation 2, as the values of R1 and R2 are in-

creased, the magnitude of the poles are reduced, which in

turn decreases the bandwidth of the amplifier. Figure 4 shows

the frequency response with different value resistors for R1

and R2. Whenever possible, it is best to chose smaller feed-

back resistors.

20183659

FIGURE 4. Closed Loop Frequency Response

As mentioned before, adding a capacitor to the feedback path

will decrease the peaking. This is because CF will form yet

another pole in the system and will prevent pairs of poles, or

complex conjugates from forming. It is the presence of pairs

of poles that cause the peaking of gain. Figure 5 shows the

frequency response of the schematic presented in Figure 3

with different values of CF. As can be seen, using a small val-

ue capacitor significantly reduces or eliminates the peaking.

20183660

FIGURE 5. Closed Loop Frequency Response

TRANSIMPEDANCE AMPLIFIER

In many applications the signal of interest is a very small

amount of current that needs to be detected. Current that is

transmitted through a photodiode is a good example. Barcode

scanners, light meters, fiber optic receivers, and industrial

sensors are some typical applications utilizing photodiodes

for current detection. This current needs to be amplified be-

fore it can be further processed. This amplification is per-

formed using a current-to-voltage converter configuration or

transimpedance amplifier. The signal of interest is fed to the

inverting input of an op amp with a feedback resistor in the

current path. The voltage at the output of this amplifier will be

equal to the negative of the input current times the value of

the feedback resistor. Figure 6 shows a transimpedance am-

plifier configuration. CD represents the photodiode parasitic

capacitance and CCM denotes the common-mode capaci-

tance of the amplifier. The presence of all of these capaci-

tances at higher frequencies might lead to less stable

topologies at higher frequencies. Care must be taken when

designing a transimpedance amplifier to prevent the circuit

from oscillating.

With a wide gain bandwidth product, low input bias current

and low input voltage and current noise, the LMP7715/

LMP7716/LMP7716Q are ideal for wideband transimpedance

applications.

20183669

FIGURE 6. Transimpedance Amplifier

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LMP7715/LMP7716/LMP7716Q

A feedback capacitance CF is usually added in parallel with

RF to maintain circuit stability and to control the frequency re-

sponse. To achieve a maximally flat, 2nd order response, RF

and CF should be chosen by using Equation 3

(3)

Calculating CF from Equation 3 can sometimes result in ca-

pacitor values which are less than 2 pF. This is especially the

case for high speed applications. In these instances, it is often

more practical to use the circuit shown in Figure 7 in order to

allow more sensible choices for CF. The new feedback ca-

pacitor, CF′, is (1+ RB/RA) CF. This relationship holds as long

as RA << RF.

20183631

FIGURE 7. Modified Transimpedance Amplifier

SENSOR INTERFACE

The LMP7715/LMP7716/LMP7716Q have low input bias cur-

rent and low input referred noise, which make them ideal

choices for sensor interfaces such as thermopiles, Infra Red

(IR) thermometry, thermocouple amplifiers, and pH electrode

buffers.

Thermopiles generate voltage in response to receiving radi-

ation. These voltages are often only a few microvolts. As a

result, the operational amplifier used for this application

needs to have low offset voltage, low input voltage noise, and

low input bias current. Figure 8 shows a thermopile applica-

tion where the sensor detects radiation from a distance and

generates a voltage that is proportional to the intensity of the

radiation. The two resistors, RA and RB, are selected to pro-

vide high gain to amplify this signal, while CF removes the high

frequency noise.

20183627

FIGURE 8. Thermopile Sensor Interface

PRECISION RECTIFIER

Rectifiers are electrical circuits used for converting AC signals

to DC signals. Figure 9 shows a full-wave precision rectifier.

Each operational amplifier used in this circuit has a diode on

its output. This means for the diodes to conduct, the output of

the amplifier needs to be positive with respect to ground. If

VIN is in its positive half cycle then only the output of the bot-

tom amplifier will be positive. As a result, the diode on the

output of the bottom amplifier will conduct and the signal will

show at the output of the circuit. If VIN is in its negative half

cycle then the output of the top amplifier will be positive, re-

sulting in the diode on the output of the top amplifier conduct-

ing and delivering the signal from the amplifier's output to the

circuit's output.

For R2/ R1 ≥ 2, the resistor values can be found by using the

equation shown in Figure 9. If R2/ R1 = 1, then R3 should be

left open, no resistor needed, and R4 should simply be short-

ed.

20183674

FIGURE 9. Precision Rectifier

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LMP7715/LMP7716/LMP7716Q

Physical Dimensions inches (millimeters) unless otherwise noted

5-Pin SOT-23

NS Package Number MF05A

8-Pin MSOP

NS Package Number MUA08A

17 www.national.com

LMP7715/LMP7716/LMP7716Q

Notes

LMP7715/LMP7716/LMP7716Q Precision, 17 MHz, Low Noise, CMOS Input Amplifiers

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