AFCT-5815xZ
155 Mb/s Single Mode Fiber Optic Transceiver for ATM,
SONET OC-3/SDH STM-1
Data Sheet
Features
RoHS compliant
Long reach SONET OC-3 SDH STM1 (L1.1) compliant
Multisourced 1 x 9 pin con guration
Interchangeable with LED multisourced 1 x 9 trans-
ceivers
Unconditionally eyesafe laser IEC 825/CDRH Class 1
compliant
Two Temperature Ranges:
0°C to +70°C AFCT-5815BZ/DZ
-40°C to +85°C AFCT-5815AZ/CZ
Single +3.3 V or +5.0 V power supply operation
Wave solder and aqueous wash process compatible
Considerable EMI margin to FCC Class B
Applications
ATM 155 Mb/s links for LAN backbone switches and
routers
ATM 155 Mb/s links for WAN core, edge and access
switches and routers
ATM 155 Mb/s links for add/drop multiplexers and
demultiplexers
SONET OC-3/SDH STM-1 interconnections
Description
General
The AFCT-5815xZ transceiver is a high performance, cost
e ective module for serial optical data communications
applications speci ed for a data rate of 155 Mb/s. It is
designed to provide a SONET/SDH compliant link for long
reach links operating at +3.3 V or +5.0 V input voltage.
Transmitter Section
The transmitter section of the AFCT-5815xZ consists of a
1300 nm InGaAsP laser in an eyesafe optical subassembly
(OSA) which mates to the ber cable. The laser OSA is
driven by a custom IC which converts di erential input
PECL logic signals, ECL referenced (shifted) to +3.3 V or
+5 V supply, into an analog laser drive current.
Receiver Section
The receiver utilizes an InGaAs PIN photodiode mounted
together with a transimpedance preampli er IC in an OSA.
This OSA is connected to a circuit providing post- ampli -
cation quantization, and optical signal detection.
2
Figure 2. Relative Input Optical Power - dBm. Avg.
Figure 1. Block Diagram
ELECTRICAL SUBASSEMBLY
DATA
SIGNAL DETECT
DATA
POST
AMPLIFIER IC
LASER
DRIVER
IC
PRE-
AMPLIFIER
IC
LASER
PIN PHOTODIODE
DUPLEX SC
RECEPTACLE
TOP VIEW
OPTICAL
SUB-
ASSEMBLIES
DATA
DATA
10
-2
10
-3
10
-4
10
-5
10
-6
10
-7
10
-8
10
-9
10
-10
10
-11
10
-12
10
-13
10
-14
10
-15
-5 -4 -3 -2 -1 0 1 2 3
LINEAR EXTRAPOLATION OF
10
-4
THROUGH 10
-7
DATA
BASED ON
ACTUAL DATA
BIT ERROR RATIO
Applications Information
Typical BER Performance of Receiver versus Input Opti-
cal Power Level
The AFCT-5815xZ transceiver can be operated at
Bit-Error-Rate conditions other than the required BER =
1 x 10-10 of the ATM Forum 155.52 Mb/s Physical Layer
Standard. The typical trade-o of BER versus Relative In-
put Optical Power is shown in Figure 2. The Relative Input
Optical Power in dB is referenced to the actual sensitivity
of the device. For BER conditions better than 1 x 10-10,
more input signal is needed (+dB).
Receiver Signal Detect
Signal Detect is a basic ber failure indicator. This is a
single-ended PECL output. As the input optical power
is decreased, Signal Detect will switch from high to low
(deassert point) somewhere between sensitivity and
the no light input level. As the input optical power is
increased from very low levels, Signal Detect will switch
back from low to high (assert point). The assert level will be
at least 0.5 dB higher than the deassert level.
Transceiver Speci ed for Wide Temperature Range Op-
eration
The AFCT-5815xZ is speci ed for operation over extended
temperature range of -40° to +85°C.
Characterization of the parts has been performed over
the ambient operating temperature range in an air ow
of 2 m/s.
Other Members of Avago Technologies SC Duplex
155 Mb/s Product Family
• HFCT-5801, 1300 nm single mode transceiver for links
up to 15 km. The part is based on the 2 x 9 industry
standard package and has laser bias, optical power
monitor and transmitter disable functions.
3
Figure 3. Recommended Circuit Schematic
NO INTERNAL
CONNECTION NO INTERNAL
CONNECTION
TOP VIEW
Rx
VEER
1RD
2SD
4
Rx
VCCR
5
Tx
VCCT
6TD
8
Tx
VEET
9
TERMINATE
AT PHY
DEVICE
INPUTS
Vcc FILTER
AT Vcc PINS
TRANSCEIVER
VCC
C2
C1
L1 L2
TD
RD
3TD
7
R8
RD RD
VCC
R5 R7
R6
C6
SD
R10
C7 C8
C3 C4
R4
VCC
R2 R3
R1
TERMINATION
AT
TRANSCEIVER
INPUTS
TD
C5
R9
Recommended Circuit Schematic
In order to ensure proper functionality of the AFCT-5815xZ
a recommended circuit is provided in Figure 3. When de-
signing the circuit interface, there are a few fundamental
guidelines to follow. For example, in the Recommended
Circuit Schematic gure the di erential data lines should
be treated as 50 ohm Microstrip or stripline transmission
lines. This will help to minimize the parasitic inductance
and capacitance e ects. Proper termination of the dif-
ferential data signals will prevent re ections and ringing
which would compromise the signal delity and gener-
ate unwanted electrical noise. Locate termination at the
received signal end of the transmission line. The length
of these lines should be kept short and of equal length.
For the high speed signal lines, di erential signals should
be used, not single-ended signals, and these di erential
signals need to be loaded symmetrically to prevent un-
balanced currents from owing which will cause distor-
tion in the signal.
Maintain a solid, low inductance ground plane for re-
turning signal currents to the power supply. Multilayer
plane printed circuit board is best for distribution of VCC,
returning ground currents, forming transmission lines
and shielding, Also, it is important to suppress noise
from in uencing the ber-optic transceiver performance,
especially the receiver circuit. Proper power supply
ltering of VCC for this transceiver is accomplished by
using the recommended, separate lter circuits shown in
Figure 3 for the transmitter and receiver sections. These
lter circuits suppress VCC noise over a broad frequency
range, this prevents receiver sensitivity degradation due
to VCC noise. It is recommended that surface-mount
components be used. Use tantalum capacitors for the
10 μF capacitors and monolithic, ceramic bypass capaci-
tors for the 0.1 μF capacitors. Also, it is recommended
that a surface- mount coil inductor of 3.3 μH be used.
Ferrite beads can be used to replace the coil inductors
when using quieter VCC supplies, but a coil inductor
is recommended over a ferrite bead. All power supply
components need to be placed physically next to the
VCC pins of the receiver and transmitter. Use a good, uni-
form ground plane with a minimum number of holes to
provide a low-inductance ground current return for the
power supply currents.
In addition to these recommendations, Avago Tech-
nologies Application Engineering sta is available for
consulting on best layout practices with various vendors
mux/demux, clock generator and clock recovery circuits.
Avago Technologies has participated in several reference
design studies and is prepared to share the ndings of
these studies with interested customers. Contact your
local Avago Technologies sales representative to arrange
for this service.
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR PECL SIGNALS
NEED TO BE LOCATED AT THE INPUT OF DEVICES
RECEIVING THOSE PECL SIGNALS.
RECOMMEND 4-LAYER PRINTED CIRCUIT BOARD WITH
50 MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = R8 = R10 = 130 FOR +5.0V OPERA-
TION, 82 FOR +3.3V OPERATION.
R2 = R3 = R5 = R7 = R9 = 82 FOR +5.0V OPERATION,
130 FOR +3.3V OPERATION.
C1 = C2 = 10 μF
C3 = C4 = C7 = C8 = 100 nF
C5 = C6 = 0.1 μF
L1 = L2 = 3.3 μH COIL OR FERRITE INDUCTOR.
4
Recommended Solder Fluxes and Cleaning/Degreasing
Chemicals
Solder uxes used with the AFCT-5815xZ ber-optic
transceiver should be water-soluble, organic solder ux-
es. Some recommended solder uxes are Lonco 3355-11
from London Chemical West, Inc. of Burbank, CA, and 100
Flux from Alpha Metals of Jersey City, NJ.
Recommended cleaning and degreasing chemicals for
the AFCT-5815xZ are alcohol’s (methyl, isopropyl, isobu-
tyl), aliphatics (hexane, heptane) and other chemicals,
such as soap solution or naphtha. Do not use partially
halogenated hydrocarbons for cleaning/degreasing. Ex-
amples of chemicals to avoid are 1.1.1. trichloroethane,
ketones (such as MEK), acetone, chloroform, ethyl ac-
etate, methylene dichloride, phenol, methylene chloride
or N-methylpyrrolidone.
Evaluation Circuit Boards
Evaluation circuit boards are available from Avago Tech-
nologies Application Engineering sta . Contact your
local Avago Technologies sales representative to arrange
for access to one if needed.
Recommended Solder and Wash Process
The AFCT-5815xZ is compatible with industry standard
wave or hand solder processes.
A drying cycle must be completed after wash process to
remove all moisture from the module.
AFCT-5815xZ Process Plug
The AFCT-5815xZ transceiver is supplied with a process
plug for protection of the optical ports with the Duplex
SC connector receptacle. This process plug prevents con-
tamination during wave solder and aqueous rinse as well
as during handling, shipping or storage. Each process
plug can only be used once during processing, although
with subsequent use, it can be used as a dust cover. It is
made of high-temperature, molded, sealing material that
will withstand +85°C and a rinse pressure of 110 lb/in2.
Figure 4. Recommended Board Layout Hole Pattern
20.32
(0.800)
TOP VIEW
2 x Ø 1.9 ± 0.1
(0.075 ± 0.004)
20.32
(0.800)
2.54
(0.100)
9 x Ø 0.8 ± 0.1
(0.032 ± 0.004)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
5
Figure 5. Package Outline Drawing and Pinout
MAX.
+0.1
-0.05
+0.004
-0.002
0.25
(0.010
3.3 ± 0.38
(0.130 ± 0.015)
9.8
(0.386)
0.51
(0.020)
)
8 x
)
9 x Ø
2 x Ø
)
2 x Ø
+0.25
-0.05
+0.010
-0.002
0.46
(0.018
23.8
(0.937)
20.32
(0.800)
2.54
(0.100)
1.3
(0.051)
20.32 ± 0.2
(0.800 ± 0.008)
20.32 ± 0.2
(0.800 ± 0.008)
15.8 ± 0.15
(0.622 ± 0.006) +0.25
-0.05
+0.010
-0.002
1.27
(0.050
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: ±0.1 mm UNLESS OTHERWISE SPECIFIED.
KEY:
YYWW = DATE CODE
XXXX-XXXX = AFCT-5815
ZZZZ = 1300 nm
39.6
(1.56)
MAX
.
MAX.
SLOT DEPTH
XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
TX RX
SLOT WIDTH
12.7
(0.50)
25.4
(1.00)
2.5
(0.10)
2.0 ± 0.1
(0.079 ± 0.004)
12.7 ± 0.3
(0.50 ± 0.012)
AREA
RESERVED
FOR
PROCESS
PLUG
AVAGO
6
Electromagnetic Interference (EMI)
Most equipment designs utilizing these high-speed
transceivers from Avago Technologies will be required
to meet the requirements of FCC in the United States,
CENELEC EN55022 (CISPR 22) in Europe and VCCI in
Japan.
The AFCT-5815xZ has been characterized without a chas-
sis enclosure to demonstrate the robustness of the part’s
integral shielding. Performance of a system containing
these transceivers within a well designed chassis is ex-
pected to be better than the results of these tests with
no chassis enclosure.
Immunity
Equipment utilizing these AFCT-5815xZ transceivers will
be subject to radio-frequency electromagnetic elds in
some environments. These transceivers, with their inte-
gral shields, have been characterized without the bene t
of a normal equipment chassis enclosure and the results
are reported below. Performance of a system contain-
ing these transceivers within a well designed chassis
is expected to be better than the results of these tests
without a chassis enclosure.
Regulatory Compliance
The AFCT-5815xZ is intended to enable commercial
system designers to develop equipment that complies
with the various regulations governing certi cation of
Information Technology Equipment. See the Regulatory
Compliance Table 1 for details. Additional information
is available from your Avago Technologies sales repre-
sentative.
Electrostatic Discharge (ESD)
There are two design cases in which immunity to ESD
damage is important.
The rst case is during handling of the transceiver prior
to mounting it on the circuit board. It is important to
use normal ESD handling precautions for ESD sensitive
devices. These precautions include using grounded wrist
straps, work benches and oor mats in ESD controlled
areas.
The second case to consider is static discharges to the
exterior of the equipment chassis containing the trans-
ceiver parts. To the extent that the duplex SC connector
is exposed to the outside of the equipment chassis it may
be subject to whatever ESD system level test criteria that
the equipment is intended to meet.
7
Table 1. Regulatory Compliance - Typical Performance
Feature Test Method Performance
Electrostatic
Discharge (ESD) to
the Electrical Pins
MII-STD-883F
Method 3015.7
Class 1 (>500 V) - Human Body Model
Electrostatic
Discharge (ESD)
to the Duplex SC
Receptacle
Variation of IEC 61000-4-2 Air discharge 15 kV
Electromagnetic
Interference (EMI)
FCC Class B Typically provide greater than 11 dB margin below 1 GHz to FCC
Class B when tested in a GTEM with the transceiver mounted to a
circuit card without a chassis enclosure at frequencies up to 1 GHz.
Margins above 1 GHz dependent on customer board and chassis
designs.
Immunity Variation of IEC 801-3 Typically show no measurable e ect from a 10 V/m eld swept
from 27 MHz to 1 GHz applied to the transceiver without a chassis
enclosure.
Eye Safety FDA CDRH 21-CFR 1040 Class 1 Accession Number: 9521220-135
IEC 60825 - 1
Amendment 2 2001 -01
TUV Licence Number: 933/21203530/17
Component
Recognition
Underwriters Laboratories and
Canadian Standards Association
Joint Component Recognition for
Information Technology Equip-
ment Including Electrical
UL File#: E173874
Performance Speci cations
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to
each parameter in isolation, all other parameters having values within the recommended operating conditions. It
should not be assumed that limiting values of more than one parameter can be applied to the product at the same
time. Exposure to the absolute maximum ratings for extended periods can adversely a ect device reliability.
Parameter Symbol Minimum Maximum Units Notes
Storage Temperature TS-40 +85 °C
Lead Soldering Temperature/Time - - +260/10 °C/s
Input Voltage - GND VCC V
Power Supply Voltage - 0 6 V
Operating Environment
Parameter Symbol Minimum Maximum Units Notes
Power Supply Voltage VCC +3.1 +5.25 V
Ambient Operating Temperature - AFCT-5815AZ/CZ TOP -40 +85 °C 1
Ambient Operating Temperature - AFCT-5815BZ/DZ TOP 0 +70 °C 1
8
Transmitter Section
(Ambient Operating Temperature, VCC = 3.1 V to 5.25 V)
Parameter Symbol Minimum Typical Maximum Units Notes
Output Center Wavelength lce 1261 - 1360
Output Spectral Width (RMS) Dl - - 4.0 nm
Average Optical Output Power PO-5 - 0 dBm 2
Extinction Ratio ER10 - - dB
Power Supply Current ICC - 50 140 mA 3
Output Eye Compliant with Telcordia TR-NWT-000253 and ITU recommendation G.957
Optical Rise Time tR--2ns4
Optical Fall Time tF--2ns4
Data Input Current - Low IIL -350 - - μA
Data Input Current - High IIH - - 350 μA
Data Input Voltage - Low VIL - VCC -2.0 - -1.475 V 5
Data Input Voltage - High VIH - VCC -1.165 - -0.74 V 5
Notes:
1. 2 m/s air ow required.
2. Output power is power coupled into a single mode ber.
3. The power supply current varies with temperature. Maximum current is speci ed at VCC = Maximum @ maximum temperature (not including
terminations) and end of life. Typical power supply current at +25°C and +3.3 V or +5.0 V supply.
4. 10% - 90% Values. Maximum tR, tF times tested against eye mask.
5. These inputs are compatible with 10 K, 10 KH and 100 K PECL outputs.
Receiver Section
(Ambient Operating Temperature, VCC = 3.1 V to 5.25 V)
Parameter Symbol Minimum Typical Maximum Units Notes
Receiver Sensitivity - - - -34 dBm 6
Maximum Input Power - -7 - - dBm 6
Power Supply Current ICC - 55 100 mA 7
Signal Detect - Deasserted - -45 - -34 dBm
Signal Detect - Hysteresis - 0.5 - 4 dB
Signal Detect Assert Time
(o to on)
AS_Max - - 100 μs
Signal Detect Deassert Time
(on to o )
ANS_Max - - 350 μs
Signal Detect Output Voltage - Low VOL - VCC -1.92 - -1.45 V 8
Signal Detect Output Voltage - High VOH - VCC -1.1 - -0.85 V 8
Data Output Voltage - Low VOL - VCC -2.0 - -1.45 V 8
Data Output Voltage - High VOH - VCC -1.1 - -0.85 V 8
Data Output Rise Time tr- - 2.2 ns 9
Data Output Fall Time tf- - 2.2 ns 9
Notes
6. Sensitivity and maximum input power levels for a 223-1 PRBS with 72 ones and 72 zeros inserted. (ITU recommendation G.958).
7. The current includes capacitively coupled 50 Ohm terminations.
8. These outputs are compatible with 10 K, 10 KH and 100 K PECL outputs.
9. 20 - 80% levels.
9
Table 2. Pin Out Table
Pin Symbol Functional Description
Mounting Studs The mounting studs are provided for transceiver mechanical attachment to the circuit board.
They are embedded in the housing and are not connected to the transceiver internal circuit.
They should be soldered into plated-through holes on the printed circuit board.
1V
EER Receiver Signal Ground
Directly connect this pin to receiver signal ground plane.
2 RD+ Receiver Data Out
Terminate this high-speed, di erential, PECL output with standard PECL techniques at the follow-on
device input pin.
3 RD- Receiver Data Out Bar
Terminate this high-speed, di erential, PECL output with standard PECL techniques at the follow-on
device input pin.
4 SD Signal Detect
Normal input optical levels to the receiver result in a logic “1” output.Low input optical levels to the
receiver result in a fault indication shown by a logic “0” output.
Signal Detect is a single-ended, PECL output. This output will operate with 270 termination resistor
to VEE to achieve PECL output levels.
This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as, Signal
Detect input and Loss of Signal-bar input.
5V
CCR Receiver Power Supply
Provide +3.3 or +5.0 V dc via the recommended receiver power supply lter circuit.Locate the power
supply lter circuit as close as possible to the VCCR pin.
6V
CCT Transmitter Power Supply
Provide +3.3 or +5.0 V dc via the recommended transmitter power supply lter circuit.Locate the
power supply lter circuit as close as possible to the VCCT pin.
7 TD- Transmitter Data In Bar
Terminate this high-speed, di erential Transmitter Data input with standard PECL techniques at the
transmitter input pin.
8 TD+ Transmitter Data In
Terminate this high-speed, di erential Transmitter Data input with standard PECL techniques at the
transmitter input pin.
9V
EET Transmitter Signal Ground
Directly connect this pin to the transmitter signal ground plane.
Class 1 Laser Product: This product conforms to the
applicable requirements of 21 CFR 1040 at the date of
manufacture
Date of Manufacture:
Avago Technologies Inc., No 1 Yishun Ave 7, Singapore
Handling Precautions
1. The AFCT-5818xZ can be damaged by current surges or overvoltage.
Power supply transient precautions should be taken.
2. Normal handling precautions for electrostatic sensitive devices should be taken.
Order Information:
Temperature Range 0°C to +70°C
AFCT-5815BZ Black Case
AFCT-5815DZ Blue Case
Temperature Range -40°C to +85°C
AFCT-5815AZ Black Case
AFCT-5815CZ Blue Case
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved. Obsoletes AV01-0035EN
AV02-2960EN - May 5, 2011
