11) Turn on all the power supplies.
12) Enable the signal generators.
13) Set the clock signal generator to the desired clock
frequency. See the Part Selection Table for the
appropriate frequency settings for each EV kit. The
amplitude of the generator should be sufficient to
produce a 16dBm signal at the SMA input of the EV
kit. Insertion losses due to the series-connected fil-
ter (step 2) and the interconnecting cables
decrease the amount of power seen at the EV kit
input. Account for these losses when setting the
signal generator amplitude.
14) Set the analog input signal generators to output the
desired test frequency. The amplitude of the gener-
ator should produce a signal that is no larger than
7.5dBm as measured at the SMA input of the EV kit.
Insertion losses due to the series-connected filter
(step 5) and the interconnecting cables decrease
the amount of power seen at the EV kit input.
Account for these losses when setting the signal
generator amplitude. Also account for the attenua-
tion from the 3dB to 6dB attenuator.
15) All signal generators should be phase-locked to
each other.
16) Enable the logic analyzer.
17) Collect data using the logic analyzer.
Detailed Description
The EV kit is a fully assembled and tested circuit board
that contains all the components necessary to evaluate
the performance of the MAX12527, MAX12528,
MAX12529, MAX12557, MAX12558, or MAX12559.
The ADCs accept differential input signals; however, on-
board transformers (T1–T4) convert a readily available sin-
gle-ended source output to the required differential signal.
The input signals of the ADC can be measured using a
differential oscilloscope probe at headers J3 and J4.
Output drivers (U2 and U3) buffer the output signals of
the data converter. The digital outputs of the EV kit are
accessible at headers J5 and J6.
The EV kits are designed as a four-layer PC board to
optimize the performance of this family of ADCs.
Separate analog, digital, clock, and buffer power
planes minimize noise coupling between analog and
digital signals. 100Ωdifferential microstrip transmission
lines are used for analog and clock inputs. 50Ω
microstrip transmission lines are used for all digital out-
puts. The trace lengths of the 100Ωdifferential input
lines are matched to within a few thousandths of an
inch to minimize layout-dependent input-signal skew.
Power Supplies
For best performance, the EV kits require separate analog,
digital, clock, and buffer power-supply sources. Individual
3.3V and 2.0V power supplies are recommended to
power the analog (VDD) and digital (OVDD) portions of
the converter. A separate 2.0V power supply (VLOGIC) is
used to power the output buffers (U2, U3) of the EV kit.
The on-board clock circuitry (VCLK) is powered by a 3.3V
power supply. The VCLK supply is only required when the
ADC is operating in single-ended clock mode. See the
Configuring the EV Kit for Single-Ended Clock Operation
section for further details.
Converter Power-Down
The MAX12527, MAX12528, MAX12529, MAX12557,
MAX12558, and MAX12559 each feature an active-high
global device power-down pin. Jumper JU2 controls
this feature. See Table 1 for shunt positions.
Clock
Additionally, the data converter allows for either differ-
ential or single-ended signals to drive the clock inputs.
The MAX12527/MAX12528/MAX12529/MAX12557/
MAX12558/MAX12559 EV kits support both methods.
In single-ended operation, the clock signal is applied to
the ADC through a buffer (U5). In differential mode, an
on-board transformer converts a user-provided single-
ended analog input and generates a differential analog
signal, which is then applied to the ADC’s input pins.
Jumper JU4 controls the ADC clock input. See Table 2
for jumper configuration.
Evaluate: MAX12527/28/29/57/58/59
MAX12527/MAX12528/MAX12529/
MAX12557/MAX12558/MAX12559 Evaluation Kits
4 _______________________________________________________________________________________