©2004 Fairchild Semiconductor Corporation Rev. C4, August 2004
FQD11P06 / FQU11P06
QFET
®
FQD11P06 / FQU11P06
60V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as automotive,
DC/DC converters, and high efficiency switching for power
management in portable and battery operated products.
Features
• -9.4A, -60V, R
DS(on)
= 0.185Ω @V
GS
= -10 V
• Low gate charge ( typical 13 nC)
• Low Crss ( typical 45 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
Absolute Maxim u m Ratin gs
T
C
= 25°C unless otherwise noted
Thermal Characteri stics
* When mounted on the minimum pad size recommended (PCB Mount)
Symbol Parameter FQD11P06 / FQU11P06 Units
V
DSS
Drain-Source Voltage -60 V
I
D
Drain Current - Continuous (T
C
= 25°C) -9.4 A
- Continuous (T
C
= 100°C) -5.95 A
I
DM
Drain Current - Pulsed
(Note 1)
-37.6 A
V
GSS
Gate-Source Voltage ± 30 V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
160 mJ
I
AR
Avalanche Current
(Note 1)
-9.4 A
E
AR
Repetitive Avalanche Energy
(Note 1)
3.8 mJ
dv/dt Peak Diode Recovery dv/dt
(Note 3)
-7.0 V/ns
P
D
Power Dissipation (T
A
= 25°C) * 2.5 W
Power Dissipation (T
C
= 25°C) 38 W
- Derate above 25°C 0.3 W/°C
T
J
, T
STG
Operating and Storage Temperature Range -55 to +150 °C
T
L
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
R
θJC
Thermal Resistance, Junction-to-Case -- 3.28 °C/W
R
θJA
Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
R
θJA
Thermal Resistance, Junction-to-Ambient -- 110 °C/W
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S
D
G
I-PAK
FQU Series
D-PAK
FQD Series GSD
GS
D
Rev. C4, August 2004
FQD11P06 / FQU11P06
©2004 Fairchild Semiconductor Corporation
Elerical Characteristics
T
C
= 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 2.1mH, I
AS
= -9.4A, V
DD
= -25V, R
G
= 25 Ω, Starting T
J
= 25°C
3. I
SD
≤ -11.4A, di/dt ≤ 300A/µs, V
DD
≤ BV
DSS,
Starting T
J
= 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage V
GS
= 0 V, I
D
= -250 µA-60 -- -- V
∆BV
DSS
/ ∆T
J
Breakdown Voltage Temperature
Coefficient I
D
= -250 µA, Referenced to 25°C -- -0.07 -- V/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= -60 V, V
GS
= 0 V -- -- -1 µA
V
DS
= -48 V, T
C
= 125°C -- -- -10 µA
I
GSSF
Gate-Body Leakage Current, Forward V
GS
= -25 V, V
DS
= 0 V -- -- -100 nA
I
GSSR
Gate-Body Leakage Current, Reverse V
GS
= 25 V, V
DS
= 0 V -- -- 100 nA
On Characteri st ics
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= -250 µA-2.0 -- -4.0 V
R
DS(on)
Static Drain-Source
On-Resistance V
GS
= -10 V, I
D
= -4.7 A -- 0.15 0.185 Ω
g
FS
Forward Transconductance V
DS
= -30 V, I
D
= -4.7 A
(Note 4)
-- 4.9 -- S
Dynamic Characteristics
C
iss
Input Capacitance V
DS
= -25 V, V
GS
= 0 V,
f = 1.0 MHz
-- 420 550 pF
C
oss
Output Capacitance -- 195 250 pF
C
rss
Reverse Transfer Capacitance -- 45 60 pF
Switching Characteristics
t
d(on)
Turn-On Delay Time V
DD
= -30 V, I
D
= -5.7 A,
R
G
= 25 Ω
(Note 4, 5)
-- 6.5 25 ns
t
r
Turn-On Rise Time -- 40 90 ns
t
d(off)
Turn-Off Delay Time -- 15 40 ns
t
f
Turn-Off Fall Time -- 45 100 ns
Q
g
Total Gate Charge V
DS
= -48 V, I
D
= -11.4 A,
V
GS
= -10 V
(Note 4, 5)
-- 13 17 nC
Q
gs
Gate-Source Charge -- 2.0 -- nC
Q
gd
Gate-Drain Charge -- 6.3 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current -- -- -9.4 A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current -- -- -37.6 A
V
SD
Drain-Source Diode Forward Voltage V
GS
= 0 V, I
S
= -9.4 A -- -- -4.0 V
t
rr
Reverse Recovery Time V
GS
= 0 V, I
S
= -11.4 A,
dI
F
/ dt = 100 A/µs
(Note 4)
-- 83 -- ns
Q
rr
Reverse Recovery Charge -- 0.26 -- µC
©2004 Fairchild Semiconductor Corporation Rev.C4, August 2004
FQD11P06 / FQU11P06
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
10
-1
10
0
10
1
150
℃
Notes :※
1. V
GS
= 0V
2. 250µ s Pulse Test
25
℃
-I
DR
, Reverse Drain Current [A]
-V
SD
, Source-Drain Voltage [V]
0 1020304050
0.0
0.2
0.4
0.6
0.8
Note : T
※
J = 25
℃
V
GS
= - 20V
V
GS
= - 10V
R
DS(on)
[
Ω
],
Drain-Source On-Resistance
-I
D
, Drain Current [A]
246810
10
-1
10
0
10
1
150
℃
25
℃
-55
℃
Notes :※
1. V
DS
= -30V
2. 250µ s Pulse Test
-I
D
, Drain Current [A]
-V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
-1
10
0
10
1
V
GS
Top : - 15.0 V
- 10.0 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom : - 4.5 V
Notes :
※
1. 250µ s Pulse Test
2. T
C
= 25
℃
-I
D
, Drain Current [A]
-V
DS
, Drain-Source Voltage [V]
0 2 4 6 8 10 12 14
0
2
4
6
8
10
12
V
DS
= -30V
V
DS
= -48V
Note : I
※
D
= -11.4 A
-V
GS
, Gate-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
10
-1
10
0
10
1
0
200
400
600
800
1000
1200
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
Notes :
※
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Capacitance [pF]
-V
DS
, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characte rist i cs Fig ure 6. Gate Ch arge Cha ra ct eri stics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egio n Characteristics
©2004 Fairchild Semiconductor Corporation Rev.C4, August 2004
FQD11P06 / FQU11P06
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
-2
10
-1
10
0
N o tes :
※
1 . Z
θJC
(t) = 3.28 /W M a x.
℃
2 . D uty F a cto r, D = t
1
/t
2
3 . T
JM
- T
C
= P
DM
* Z
θJC
(t)
sin gle p u ls e
D=0.5
0.02
0.2
0.05
0.1
0.01
Z
θJC
(t), Thermal Response
t
1
, S quare W ave P ulse D uration [sec]
25 50 75 100 125 150
0
2
4
6
8
10
-I
D
, Drain Current [A]
T
C
, Case Temperature [ ]
℃
10
0
10
1
10
2
10
-1
10
0
10
1
10
2
DC
10 ms
1 ms
100
µ
s
Operation in This Area
is Limited by R
DS(on)
Notes :
※
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
-I
D
, Drain Current [A]
-V
DS
, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
Notes :
※
1. V
GS
= -10 V
2. I
D
= -4.7 A
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
T
J
, Junction Temperature [
o
C]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
Notes :
※
1. V
GS
= 0 V
2. I
D
= -250 µ A
-BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
T
J
, Junction Temperature [
o
C]
Typical Characteristics
(Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Br ea kdown Vol tage Va ri at i on
vs. Temperature Figure 8. On-Resistance Variation
vs. Temperatu r e
Figure 11. Transient Therm al Res ponse Curve
t
1
P
DM
t
2
©2004 Fairchild Semiconductor Corporation Rev.C4, August 2004
FQD11P06 / FQU11P06
Charge
V
GS
-10V
Q
g
Q
gs
Q
gd
-3mA
V
GS
DUT
V
DS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
V
GS
-10V
Q
g
Q
gs
Q
gd
-3mA
V
GS
DUT
V
DS
300nF
50KΩ
200nF
12V
Same Type
as DUT
V
DS
V
GS 10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
-10V
V
DS
R
L
DUT
R
G
V
GS
V
DS
V
GS 10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
-10V
V
DS
R
L
DUT
R
G
V
GS
E
AS
=LI
AS2
----
2
1--------------------
BV
DSS
-V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
-10V DUT
R
G
L
I
D
t
p
E
AS
=LI
AS2
----
2
1
E
AS
=LI
AS2
----
2
1
----
2
1--------------------
BV
DSS
-V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
-10V DUT
R
G
LL
I
D
I
D
t
p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & W aveforms
©2004 Fairchild Semiconductor Corporation Rev.C4, August 2004
FQD11P06 / FQU11P06
Peak Diode R ecovery dv /dt Test Circuit & Waveform s
DUT
V
DS
+
_
Driver
R
GCompliment of DUT
(N-Channel)
V
GS
• dv/dt controlled by R
G
•I
SD
controlled by pulse period
V
DD
L
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
I
FM
, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
V
DS
+
_
Driver
R
GCompliment of DUT
(N-Channel)
V
GS
• dv/dt controlled by R
G
•I
SD
controlled by pulse period
V
DD
LL
I
SD
10V
V
GS
( Driver )
I
SD
( DUT )
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
V
SD
I
FM
, Body Diode Forward Current
Body Diode Reverse Current
I
RM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
Rev. C4, August 2004©2004 Fairchild Semiconductor Corporation
FQD11P06 / FQU11P06
Package Dimensions
6.60
±0.20
2.30
±0.10
0.50
±0.10
5.34
±0.30
0.70
±0.20
0.60
±0.20
0.80
±0.20
9.50
±0.30
6.10
±0.20
2.70
±0.20
9.50
±0.30
6.10
±0.20
2.70
±0.20
MIN0.55
0.76
±0.10
0.50
±0.10
1.02
±0.20
2.30
±0.20
6.60
±0.20
0.76
±0.10
(5.34)
(1.50)
(2XR0.25)
(5.04)
0.89
±0.10
(0.10) (3.05)
(1.00)
(0.90)
(0.70)
0.91
±0.10
2.30TYP
[2.30±0.20]
2.30TYP
[2.30±0.20]
MAX0.96
(4.34)(0.50) (0.50)
D-PAK
Dimensions in Millimeters
Rev. C4, August 2004©2004 Fairchild Semiconductor Corporation
FQD11P06 / FQU11P06
Package Dimensions
(Continued)
6.60 ±0.20
0.76 ±0.10
MAX0.96
2.30TYP
[2.30±0.20] 2.30TYP
[2.30±0.20]
0.60 ±0.20
0.80 ±0.10
1.80 ±0.20
9.30 ±0.30
16.10 ±0.30
6.10 ±0.20
0.70 ±0.20
5.34 ±0.20
0.50 ±0.10
0.50 ±0.10
2.30 ±0.20
(0.50) (0.50)(4.34)
I-PAK
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I11
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