M74HC390B1R - STMicroelectronics - Datasheet.Directory

July 2006 Rev 2 1/17

M74HC390

Dual decade counter

Features

■HIgh Speed:

fMAX = 79MHz (Typ.) at VCC = 6V

■Low power dissipation:

ICC = 4µA (Max.) at TA = 25°C

■High noise immunity:

VNIH = VNIL = 28 % VCC (Min.)

■Balanced propagation delays:

tPLH ≅ tPHL

■Wide operating voltage range:

VCC (Opr) = 2V to 6V

■Pin and function compatible with 74 series 390

Description

The M74HC390 is an high speed CMOS dual

decade counter fabricated with silicon gate

C2MOS technology.

This dual decade counter contains two

independent ripple carry counters. Each counter

is composed of a divide by two and divide by five

counter. The divide by two and divide by five

counters can be cascaded to form dual decade,

dual biquinary, or various combination up to a

single divide by 100 counter.

Each 4-bit counter is increased on the high to low

transition (negative edge) of the clock input, and

each has an independent clear input. When clear

is set low all four bits of each counter are set to

low. This enables count truncation and allows the

implementation of divide by N counter

configuration.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

DIP-16 SO-16

www.st.com

Order codes

Part number Package Packaging

M74HC390B1R DIP-14 Tube

M74HC390RM13TR SO-14 Tape and reel

Contents M74HC390
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Contents
Pin settings  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1 Pin connection  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  3
2 Pin description  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  3
Device summary  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Truth table   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Block and logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Timing chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1 Recommended operating conditions  . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
Electrical characteristics   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Test circuit  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Waveforms  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package mechanical data  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

M74HC390 Pin settings

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1 Pin settings

1.1 Pin connection

Figure 1. Pin connection (top through view)

1.2 Pin description

Table 1. Pin description

Pin N° Symbol Name and function

1, 15 1 CLOCK A

2 CLOCK B Clock input divide by 2 section (HIGH to LOW Edge-Triggered)

2, 14 1 CLEAR

2 CLEAR Asynchronous master reset inputs

3, 5, 6, 7 1QA to 1QD Flip flop outputs

4, 12 1 CLOCK A

2 CLOCK B Clock input divide by 5 section (HIGH to LOW Edge-Triggered)

13, 11, 10, 9 2QA to 2QD Flip flop outputs

8 GND Ground (0V)

16 Vcc Positive supply voltage

Device summary M74HC390

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2 Device summary

Figure 2. IInput and output equivalent circuit

Figure 3. Logic diagram

M74HC390 Truth table

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3 Truth table

Table 2. Truth table

COUNT

Outputs

BCD COUNT (1)

1. Output QA is connected to input CLOCK B for BCD count.

BI-QUINARY (2)

2. Output QD is connected to input CLOCK A for bi-quinary count.

QD QC QB QA QA QD QC QB

0 LLLLLLLL

1 LLLHLLLH

2 LLHLLLHL

3 LLHHLLHH

4LHLLLHLL

5LHLHHHLL

6LHHLHLLH

7 LHHHHLHL

8 HLLLHLHH

9HLLHHHLL

Table 3. Truth table

Inputs Outputs

CLOCK A CLOCK B CLEAR QA QB QC QD

X X H LLLL

X L BINARY COUNT UP

X L QUINARY COUNT UP

Block and logic diagrams M74HC390

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4 Block and logic diagrams

Figure 4. Block diagram

Figure 5. Logic diagram

Note: This logic diagram has not be used to estimate propagation delays

M74HC390 Timing chart

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5 Timing chart

Figure 6. Timing chart

Maximum rating M74HC390

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6 Maximum rating

Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the Operating sections of

this specification is not implied. Exposure to Absolute Maximum Rating conditions for

extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

Program and other relevant quality documents.

6.1 Recommended operating conditions

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

VCC Supply voltage -0.5 to +7 V

VIDC input voltage -0.5 to VCC + 0.5 V

VODC output voltage -0.5 to VCC + 0.5 V

IIK DC input diode current ± 20 mA

IOK DC output diode current ± 20 mA

IODC output current ± 25 mA

ICC or

IGND

DC VCC or ground current ± 50 mA

PDPower dissipation 500(1)

1. 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

Tstg Storage temperature -65 to +150 °C

TLLead temperature (10 sec) 300 °C

Table 5. Recommended operating conditions

Symbol Parameter Value Unit

VCC Supply voltage 2 to 6 V

VIInput voltage 0 to VCC V

VOOutput voltage 0 to VCC V

Top Operating temperature -55 to 125 °C

tr, tfInput rise and fall time

VCC = 2.0V 0 to 1000 ns

VCC = 4.5V 0 to 500 ns

VCC = 6.0V 0 to 400 ns

M74HC390 Electrical characteristics

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7 Electrical characteristics

Table 6. DC specifications

Symbol Parameter

Test condition Value

Unit

VCC

(V)

TA = 25°C -40 to 85°C -55 to 125°C

Min Typ Max Min Max Min Max

VIH

High level

input

voltage

2.0 1.5 1.5 1.5

V4.5 3.15 3.15 3.15

6.0 4.2 4.2 4.2

VIL

Low level

input

voltage

2.0 0.5 0.5 0.5

V4.5 1.35 1.35 1.35

6.0 1.8 1.8 1.8

VOH

High level

output

voltage

2.0 IO=-20µA1.9 2.0 1.9 1.9

4.5 IO=-20µA4.4 4.5 4.4 4.4

6.0 IO=-20µA5.9 6.0 5.9 5.9

4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10

6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60

VOL

Low level

output

voltage

2.0 IO=20µA0.0 0.1 0.1 0.1

4.5 IO=20µA0.0 0.1 0.1 0.1

6.0 IO=20µA0.0 0.1 0.1 0.1

4.5 IO=4.0 mA 0.17 0.26 0.33 0.40

6.0 IO=5.2 mA 0.18 0.26 0.33 0.40

Input

leakage

current

6.0 VI = VCC or

GND ±0.1 ±1±1µA

IOZ

Output

leakage

current

6.0

VI = VIH or VIL

VO = VCC or

GND

±0.5 ±5±10 µA

ICC

Quiescent

supply

current

6.0 VI = VCC or

GND 110 20µA

Electrical characteristics M74HC390

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Table 7. AC electrical characteristics (CL = 50 pF, Input tr = tf = 6ns)

Symbol Parameter

Test condition Value

Unit

VCC

(V)

TA = 25°C -40 to 85°C -55 to 125°C

Min Typ Max Min Max Min Max

tTLH tTHL Output transition

time

2.0 30 75 95 110

ns4.5 8 15 19 22

6.0 7 13 16 19

tPLH

tPHL

Propagation delay

time

(CLOCK A - QA)

2.0 42 120 150 180

ns4.5 14 24 30 36

6.0 12 20 26 31

tPLH

tPHL

Propagation delay

time

(CLOCK A-

QB,QD)

2.0 45 120 150 180

ns4.5 15 24 30 36

6.0 13 20 26 31

tPLH

tPHL

Propagation delay

time

(CLOCK A - QC)

2.0

QA Connected to CKB

108 280 350 420

ns4.5 36 56 70 84

6.0 31 48 60 71

tPLH

tPHL

Propagation delay

time

(CLOCK B - QC)

2.0 72 185 230 280

ns4.5 24 37 46 56

6.0 20 31 39 48

tPHL

Propagation delay

time (CLEAR -

Qn)

2.0 45 125 155 190

ns4.5 15 25 31 38

6.0 13 21 26 32

fMAX

Maximum clock

frequency

(CLOCK A - QA)

2.0 8.4 17 6.8 5.6

MHz4.5 42 65 34 28

6.0 50 79 40 33

fMAX

Maximum clock

frequency

(CLOCK B - QB)

2.0 8.4 17 6.8 5.6

MHz4.5 42 67 34 28

6.0 50 79 40 33

tW(H)

tW(L)

Minimum pulse

width (CLOCK)

2.0 24 75 95 110

ns4.5 6 15 19 22

6.0 5 13 16 19

tW(H) Minimum pulse

width (CLEAR)

2.0 24 75 95 110

ns4.5 6 15 19 22

6.0 5 13 16 19

tREM Minimum removal

time

2.0 25 30 35

ns4.5 5 6 7

6.0 5 5 6

M74HC390 Electrical characteristics

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Table 8. Capacitive characteristics

Symbol Parameter

Test condition Value

Unit

VCC

(V)

TA = 25°C -40 to 85°C -55 to 125°C

Min Typ Max Min Max Min Max

CIN Input

capacitance 510 10 10pF

CPD

Power

dissipation

capacitance

(1)

1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the

operating current consumption without load. (Refer to Test Circuit). Average operating current can be

obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC

84 pF

Test circuit M74HC390

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8 Test circuit

Figure 7. Test circuit

Note: CL = 50pF or equivalent (includes jig and probe capacitance)

RT = ZOUT of pulse generator (typically 50

Ω

)

9 Waveforms

Figure 8. Clock waveform (f = 1MHz; 50% duty cycle)

M74HC390 Package mechanical data

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10 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. These packages have a Lead-free second level interconnect . The category of

second level interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an ST trademark.

ECOPACK specifications are available at: www.st.com

Package mechanical data M74HC390

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DIM.

mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.77 1.65 0.030 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787

E 8.5 0.335

e 2.54 0.100

e3 17.78 0.700

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 0.050

Plastic DIP-16 (0.25) MECHANICAL DATA

P001C

M74HC390 Package mechanical data

15/17

DIM.

mm. inch

MIN. TYP MAX. MIN. TYP. MAX.

A 1.75 0.068

a1 0.1 0.25 0.004 0.010

a2 1.64 0.063

b 0.35 0.46 0.013 0.018

b1 0.19 0.25 0.007 0.010

C 0.5 0.019

c1 45° (typ.)

D 9.8 10 0.385 0.393

E 5.8 6.2 0.228 0.244

e 1.27 0.050

e3 8.89 0.350

F 3.8 4.0 0.149 0.157

G 4.6 5.3 0.181 0.208

L 0.5 1.27 0.019 0.050

M 0.62 0.024

S8° (max.)

SO-16 MECHANICAL DATA

0016020D

Revision history M74HC390

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11 Revision history

Table 9. Revision history

Date Revision Changes

07-Aug-2001 1 First Release

21-Jul-2006 2 New template, deleted TSSOP16 package information

M74HC390

17/17

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