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June 2012 Doc ID 023237 Rev 1 1/6
6
EVL6564-50WFLB
50 W wide-range high power factor flyback converter
demonstration board based on the L6564
Data brief
Features
■Line voltage range: 90 to 265 VAC
■Minimum line frequency (fL): 47- 63 Hz
■Minimum switching frequency: 44 KHz
■Reflected voltage: 140 V
■Regulated output voltage: 24 V
■Rated output power: 50 W
■Power factor (load ≥ 50%): 0.9 minimum
■Minimum efficiency at full load: 88%
■Maximum 2fL output voltage ripple: 1.1 V pk-pk
(VIN=230 VAC, POUT=50 W)
■Maximum ambient temperature: 50 °C
■Conducted EMI: in acc. with EN55022 Class-C
■PCB type and size: single-side, 35 µm, CEM-1,
140 x 60 mm
Description
The EVL6564-50WFLB demonstration board
implements a 50 W, wide-range mains input,
power factor corrected, power supply suitable for
all low power applications needing a high PF,
such as lighting applications, LED power supplies,
etc. It is possible through the use of a low-cost
device like the L6564 united with a simple
topology like the flyback one, providing, therefore,
a very competitive solution.
The main feature of this converter is that the input
current is almost in phase with the mains voltage;
therefore the power factor is close to unity. This is
achieved by the controller, the L6564, shaping the
input current as a sinewave in phase with the
mains voltage.
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General information and electrical schematic EVL6564-50WFLB
2/6 Doc ID 023237 Rev 1
1 General information and electrical schematic
The topology of this power supply is a typical flyback converter using a transformer to
provide the required insulation between the primary and secondary side. The converter is
connected after the mains rectifier and the capacitor filter that, in this case, is very small so
as not to damage the shape of the input current. The flyback switch is represented by the
Power MOSFET Q1, driven by the L6564. The board is equipped with an input EMI filter
designed for a 2-wire input mains plug. It is composed of one common mode line-filter stage
connected after the input connector. A varistor is also connected at the input of the board,
improving the immunity against input voltage fast transients.
At startup the L6564 is powered by the VCC capacitor (C8) that is charged via the startup
network composed of R3, R4, R7, D2, DZ2, Q2 and PTC1. When the device begins to
switch, this network is opened by the diodes DZ6, R2, R43 and Q3, decreasing the power
dissipation during normal operation. After startup operation, the L6564 is supplied by the T1
auxiliary winding (pins 5-6) generating the VCC voltage rectified by D5 and R17.
R33 is also connected to the auxiliary winding, providing to the L6564 ZCD pin the
transformer demagnetization signal, turning on the MOSFET at any switching cycle.
The voltage on the auxiliary is even used to detect an abrupt rise in the output voltage or a
feedback disconnection via the diodes D5 and D6 and the divider composed of R32 and
R12. When the voltage on the INV pin (#1) is lower than 1.66 V and the PFC_OK pin (#5) is
greater than 2.5 V, the OVP is active and the L6564 is latched.
The MOSFET is the STF11NM80, a standard and inexpensive 800 V device housed in a
TO-220FP package. The rectifier D3, the Transil™ DZ1 and capacitor C12 clamp the peak
voltage spike at MOSFET turn-off.
The R10 resistors sense the current flowing into the transformer primary side. Once the
signal at the current sense pin via resistor R11 has reached the level programmed by the
internal multiplier of the L6564, the MOSFET is turned off.
The dividers R1, R5, R8 and R13 provide, to the L6564 multiplier pin (#3), the information of
the instantaneous voltage used to modulate the current flowing into the transformer primary
side.
The capacitor C16 and the parallel resistor R14 complete an internal peak-holding circuit
that derives the information on the RMS mains voltage. The voltage signal at this pin, a DC
level equal to the peak voltage on pin #3 (MULT), is provided to a second input to the
multiplier for the 1/V2 function necessary to compensate the control loop gain dependence
on the mains voltage.
Additionally, the pin VFF (#5) is internally connected to a comparator providing the brownout
(AC mains undervoltage) protection. A voltage below 0.8 V shuts down (not latched) the IC
and brings its consumption to a considerably lower level. The L6564 restarts as the voltage
at the pin rises above 0.88 V.
The transformer is layer type, using a standard ferrite size EER-28L, manufactured by
Magnetica.
The flyback reflected voltage is ~140 V, providing enough room for the leakage inductance
voltage spike with still enough margin for reliability of the MOSFET. Employing the L6564
ensures a cleaner current sinewave than the old PFC devices (with L6562D/L6562A the
startup resistance was necessary on pin INV)) and it implements the VFF function,
especially useful in wide-range input voltage, to have a more constant overload protection
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EVL6564-50WFLB General information and electrical schematic
Doc ID 023237 Rev 1 3/6
regardless of mains voltage. Moreover, the L6564, offers a better immunity against external
noise thanks to the characteristics of its OVP function (without current OVP) and a
dedicated function to manage the burst mode condition is even available.
On the secondary stage, the dividers R26, R28 and R42, are dedicated to sensing the
output voltage. Capacitor C17 and diodes D7 and D8 provide a soft-start at turn-on. The
output regulation is done by means of an isolated voltage loop by the opto-coupler U1 and
using an inexpensive TS2431A (U4) to drive it. The opto-transistor modulates the input
voltage of the L6564 internal amplifier via R31 and R35. R21, R25 and C21 close the
voltage loop. The output rectifier is a fast recovery type, selected according to the maximum
reverse voltage, forward voltage drop and power dissipation. A small LC filter has been
added on the output, filtering the high frequency ripple.
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General information and electrical schematic EVL6564-50WFLB
4/6 Doc ID 023237 Rev 1
Figure 1. EVL6564-50WFLB demonstration board: electrical schematic
AM111415v1
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EVL6564-50WFLB Revision history
Doc ID 023237 Rev 1 5/6
2 Revision history
Table 1. Document revision history
Date Revision Changes
11-Jun-2012 1Initial release.
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EVL6564-50WFLB
6/6 Doc ID 023237 Rev 1
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