LMV7271MG - National Semiconductor

LMV7271/LMV7275/LMV7272

Single & Dual, 1.8V Low Power Comparators with Rail-to-Rail Input

General Description

The LMV727X are rail-to-rail input low power comparators,

which are characterized at supply voltage 1.8V, 2.7V and

5.0V. They consume only 9uA supply current per channel

while achieving a 800ns propagation delay.

The LMV7271/LMV7275 (single) are available in SC70 and

SOT23 packages. The LMV7272 (dual) is available in micro

SMD package. With these tiny packages, the PC board area

can be significantly reduced. They are ideal for low voltage,

low power and space critical designs.

The LMV7271/LMV7272 both feature a push-pull output stage

which allows operation with minimum power consumption

when driving a load. The LMV7275 features an open drain

output stage that allows for wired-OR configurations. The

open drain output also offers the advantage of allowing the

output to be pulled to any voltage up to 5.5V, regardless of

the supply voltage of the LMV7275.

The LMV727X are built with National Semiconductor's ad-

vance submicron silicon-gate BiCMOS process. They all have

bipolar inputs for improved noise performance and CMOS

outputs for rail-to-rail output swing.

Features

(VS = 1.8V, TA = 25°C, Typical values unless specified).

●Single or Dual Supplies

●Ultra low supply current 9µA per channel

●Low input bias current 10nA

●Low input offset current 200pA

●Low guaranteed VOS 4mV

●Propagation delay 880ns (20mV overdrive)

●Input common mode voltage range 0.1V beyond rails

●LMV7272 is available in micro SMD package

Applications

●Mobile communications

●Laptops and PDA's

●Battery powered electronics

●General purpose low voltage applications

Typical Circuit

20064024

FIGURE 1. Threshold Detector

Part Number Single/Dual Package Output

LMV7271 Single SC70, SOT23 Push/Pull

LMV7272 Dual micro SMD Push/Pull

LMV7275 Single SC70, SOT23 Open Drain

PRODUCTION DATA information is current as of

publication date. Products conform to specifications per

the terms of the Texas Instruments standard warranty.

Production processing does not necessarily include

testing of all parameters.

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for

availability and specifications.

ESD Tolerance 2KV (Note 2)

200V (Note 6)

VIN Differential ±Supply Voltage

Supply Voltage (V+ - V−)6V

Voltage at Input/Output pins V+ +0.1V, V− −0.1V

Soldering Information

Infrared or Convection (20 sec.) 235°C

Wave Soldering (10 sec.) 260°C

Storage Temperature Range −65°C to +150°C

Junction Temperature (Note 4) +150°C

Operating Ratings (Note 1)

Supply Voltage Range 1.8V to 5.5V

Temperature Range (Note 3) −40°C to +85°C

Package Thermal Resistance (Note 3)

SOT23-5 325°C/W

SC-70 265°C/W

8-Bump Thin micro SMD 220°C/W

1.8V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 1.8V, V− = 0V. Boldface limits apply at the temperature

extremes.

Symbol Parameter Condition Min

(Note 5)

Typ

(Note 4)

Max

(Note 5)Units

VOS Input Offset Voltage 0.3 4

6mV

TC VOS Input Offset Temperature Drift VCM = 0.9V (Note 7) 20 uV/°C

IBInput Bias Current 10 nA

IOS Input Offset Current 200 pA

ISSupply Current

LMV7271/LMV7275 9 12

14 µA

LMV7272 18 25

28 µA

ISC Output Short Circuit Current

Sourcing, VO = 0.9V

(LMV7271/LMV7272 only) 3.5 6

Sinking, VO = 0.9V 4 6

VOH

Output Voltage High

(LMV7271/LMV7272 only)

IO = 0.5mA 1.7 1.74 V

IO = 1.5mA 1.47 1.63

VOL Output Voltage Low IO = −0.5mA 52 100 mV

IO = −1.5mA 166 220

VCM Input Common Mode Voltage Range CMRR > 45 dB 1.9 V

−0.1 V

CMRR Common Mode Rejection Ratio 0 < VCM < 1.8V 46 78 dB

PSRR Power Supply Rejection Ratio V+ = 1.8V to 5V 55 80 dB

ILEAKAGE Output Leakage Current VO = 1.8V (LMV7275 only) 2 pA

LMV7271/LMV7275/LMV7272

1.8V AC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 1.8V, V− = 0V, VCM = 0.5V, VO = V+/2 and RL > 1MΩ to V−.

Boldface limits apply at the temperature extremes.

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)Units

tPHL

Propagation Delay

(High to Low)

Input Overdrive = 20mV

Load = 50pF//5kΩ 880 ns

Input Overdrive = 50mV

Load = 50pF//5kΩ 570 ns

tPLH

Propagation Delay

(Low to High)

Input Overdrive = 20mV

Load = 50pF//5kΩ 1100 ns

Input Overdrive = 50mV

Load = 50pF//5kΩ 800 ns

2.7V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V. Boldface limits apply at the temperature

extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)Units

VOS Input Offset Voltage 0.3 4

6mV

TC VOS Input Offset Temperature Drift VCM = 1.35V (Note 7) 20 µV/°C

IBInput Bias Current 10 nA

IOS Input offset Current 200 pA

ISSupply Current

LMV7271/LMV7275 9 13

15 µA

LMV7272 18 25

µA

ISC Output Short Circuit Current

Sourcing, VO = 1.35V

(LMV7271/LMV7272 only) 10 15

Sinking, VO = 1.35V 10 15

VOH

Output Voltage High

(LMV7271/LMV7272 only)

IO = 0.5mA 2.63 2.66 V

IO = 2.0mA 2.48 2.55

VOL Output Voltage Low IO = −0.5mA 50 70 mV

IO = −2mA 155 220

VCM Input Common Voltage Range CMRR > 45dB 2.8 V

−0.1 V

CMRR Common Mode Rejection Ratio 0 < VCM < 2.7V 46 78 dB

PSRR Power Supply Rejection Ratio V+ = 1.8V to 5V 55 80 dB

ILEAKAGE Output Leakage Current VO = 2.7V (LMV7275 only) 2 pA

LMV7271/LMV7275/LMV7272

2.7V AC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = 0.5V, VO = V+/2 and RL > 1MΩ to V−.

Boldface limits apply at the temperature extremes.

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)Units

tPHL

Propagation Delay

(High to Low)

Input Overdrive = 20mV

Load = 50pF//5kΩ 1200 ns

Input Overdrive = 50mV

Load = 50pF//5kΩ 810 ns

tPLH

Propagation Delay

(Low to High)

Input Overdrive = 20mV

Load = 50pF//5kΩ 1300 ns

Input Overdrive = 50mV

Load = 50pF//5kΩ 860 ns

5.0V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)Units

VOS Input Offset Voltage 0.3 4

6mV

TC VOS Input Offset Temperature Drift VCM = 2.5V (Note 7) 20 µV/°C

IBInput Bias Current 10 nA

IOS Input Offset Current 200 pA

ISSupply Current

LMV7271/LMV7275 10 14

16 µA

LMV7272 20 27

30 µA

ISC Output Short Circuit Current

Sourcing, VO = 2.5V

(LMV7271/LMV7272 only) 18 34 mA

Sinking, VO = 2.5V 18 34

VOH

Output Voltage High

(LMV7271/LMV7272 only)

IO = 0.5mA 4.93 4.96 V

IO = 4.0mA 4.675 4.77

VOL Output Voltage Low IO = −0.5mA 27 70 mV

IO = −4.0mA 225 315

VCM Input Common Voltage Range CMRR > 45dB 5.1 V

−0.1

CMRR Common Mode Rejection Ratio 0 < VCM < 5.0V 46 78 dB

PRSS Power Supply Rejection Ratio V+ = 1.8V to 5V 55 80 dB

ILEAKAGE Output Leakage Current VO = 5V (LMV7275 only) 2 pA

LMV7271/LMV7275/LMV7272

5.0V AC Electrical Characteristics

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5.0V, V− = 0V, VCM = 0.5V, VO = V+/2 and RL > 1MΩ to V−.

Boldface limits apply at the temperature extremes.

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)Units

tPHL

Propagation Delay

(High to Low)

Input Overdrive = 20mV

Load = 50pF//5kΩ 2100 ns

Input Overdrive = 50mV

Load = 50pF//5kΩ 1380 ns

tPLH

Propagation Delay

(Low to High)

Input Overdrive = 20mV

Load = 50pF//5kΩ 1800 ns

Input Overdrive = 50mV

Load = 50pF//5kΩ 1100 ns

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.

Note 2: Human body model, 1.5kΩ in series with 100pF.

Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is

PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.

Note 4: Typical values represent the most likely parametric norm.

Note 5: All limits are guaranteed by testing or statistical analysis.

Note 6: Machine Model, 0Ω in series with 200pF.

Note 7: Offset Voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.

Note 8: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating

of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ >

TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.

LMV7271/LMV7275/LMV7272

Connection Diagrams

5-Pin SOT23/SC70 (LMV7271/LMV7275)

20064023

Top View

8-Bump micro SMD (LMV7272)

20064041

Top View

(bump side down)

Ordering Information

Package Part Number Eco Plan

(Note 9)

Package

Marking Transport Media NSC Drawing

5-Pin SOT23

LMV7271MF/NOPB Green (RoHS

& no Sb/Br) C25A 1k Units Tape and Reel

MF05A

LMV7271MFX/NOPB 3k Units Tape and Reel

LMV7275MF/NOPB Green (RoHS

& no Sb/Br) C26A 1k Units Tape and Reel

LMV7275MFX/NOPB 3k Units Tape and Reel

5-Pin SC70

LMV7271MG/NOPB Green (RoHS

& no Sb/Br) C34 1k Units Tape and Reel

MAA05A

LMV7271MGX/NOPB 3k Units Tape and Reel

LMV7275MG/NOPB Green (RoHS

& no Sb/Br) C35 1k Units Tape and Reel

LMV7275MGX/NOPB 3k Units Tape and Reel

8-Bump

micro SMD

LMV7272TL/NOPB Green (RoHS

& no Sb/Br) I 01 250 Units Tape and Reel TLA08AAA

LMV7272TLX/NOPB 3k Units Tape and Reel

Note 9: Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://

www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances,

including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free

products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-

based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or

Sb do not exceed 0.1% by weight in homogeneous material).

LMV7271/LMV7275/LMV7272

Typical Performance Characteristics (TA = 25°C, Unless otherwise specified).

VOS vs. VCM

20064028

VOS vs. VCM

20064029

VOS vs. VCM

20064030

Short Circuit vs. Supply Voltage

20064001

Supply Current vs. Supply Voltage (LMV7271)

20064002

Supply Current vs. Supply Voltage (LMV7272)

20064031

LMV7271/LMV7275/LMV7272

Supply Current vs. Supply Voltage (LMV7272)

20064032

Output Positive Swing vs. VSUPPLY

20064033

Output Negative Swing vs. VSUPPLY

20064034

Output Positive Swing vs. ISOURCE

20064035

Output Negative Swing vs. ISINK

20064036

Output Positive Swing vs. ISOURCE

20064037

LMV7271/LMV7275/LMV7272

Output Negative Swing vs. ISINK

20064038

Output Negative Swing vs. ISINK

20064039

Output Positive Swing vs. ISOURCE

20064040

Propagation Delay (tPLH)

20064014

Propagation Delay (tPHL)

20064018

Propagation Delay (tPLH)

20064015

LMV7271/LMV7275/LMV7272

Propagation Delay (tPHL)

20064020

Propagation Delay (tPLH)

20064016

Propagation Delay (tPHL)

20064022

tPHL vs. Overdrive

20064050

tPLH vs. Overdrive

20064049

LMV7271/LMV7275/LMV7272

Application Notes

BASIC COMPARATOR

A comparator is often used to convert an analog signal to a digital signal. As shown in Figure 2, the comparator compares an input

voltage (VIN) to a reference voltage (VREF). If VIN is less than VREF, the output (VO) is low. However, if VIN is greater than VREF, the

output voltage (VO) is high.

LMV7271

20064025

20064017

FIGURE 2. LMV7271 Basic Comparator

RAIL-TO-RAIL INPUT STAGE

The LMV727X has an input common mode voltage range (VCM) of −0.1V below the V− to 0.1V above V+. This is achieved by using

paralleled PNP and NPN differential input pairs. When the VCM is near V+, the NPN pair is on and the PNP pair is off. When the

VCM is near V−, the NPN pair is off and the PNP pair is on. The crossover point between the NPN and PNP input stages is around

950mV from V+. Since each input stage has its own offset voltage (VOS), the VOS of the comparator becomes a function of the

VCM. See curves for VOS vs. VCM in Typical Performance Characteristics section. In application design, it is recommended to keep

the VCM away from the crossover point to avoid problems. The wide input voltage range makes LMV727X ideal in power supply

monitoring circuits, where the comparators are used to sense signals close to ground and power supplies.

OUTPUT STAGE

The LMV7271 and LMV7272 have a push-pull output stage. This output stage keeps the total system power consumption to the

absolute minimum. The only current consumed is the low supply current and the current going directly into the load. When the

output switches, both PMOS and NMOS at the output stage are on at the same time for a very short time. This allows current to

flow directly between V+ and V− through output transistors. The result is a short spike of current (shoot-through current) drawn from

the supply and glitches in the supply voltages. The glitches can spread to other parts of the board as noise. To prevent the glitches

in supply lines, power supply bypass capacitors must be installed. See section for supply bypassing in the Application Notes for

details.

HYSTERESIS

It is a standard procedure to use hysteresis (positive feedback) around a comparator, to prevent oscillation, and to avoid excessive

noise on the output because the comparator is a good amplifier of its own noise.

Inverting Comparator with Hysteresis

The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage VCC of the

comparator (Figure 3). When VIN at the inverting input is less than VA, the voltage at the non-inverting node of the comparator

(VIN < VA), the output voltage is high (for simplicity assume VO switches as high as VCC). The three network resistors can be

represented as R1||R3 in series with R2. The lower input trip voltage VA1 is defined as

LMV7271/LMV7275/LMV7272

When VIN is greater than VA (VIN > VA), the output voltage is low and very close to ground. In this case the three network resistors

can be presented as R2//R3 in series with R1. The upper trip voltage VA2 is defined as

The total hysteresis provided by the network is defined as

ΔVA = VA1 - VA2

A good typical value of ΔVA would be in the range of 5 to 50mV. This is easily obtained by choosing R3 as 1000 to 100 times

(R1||R2) for 5V operation, or as 300 to 30 times (R1||R2) for 1.8V operation.

20064042

FIGURE 3. Inverting Comparator with Hysteresis

LMV7271/LMV7275/LMV7272

Non-Inverting Comparator with Hysteresis

A non-inverting comparator with hysteresis requires a two resistor network, and a voltage reference (VREF) at the inverting input

(Figure 4). When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise up to VIN1, where VIN1 is

calculated by

When VIN is high, the output is also high. To make the comparator switch back to its low state, VIN must equal VREF before VA will

again equal VREF. VIN can be calculated by:

The hysteresis of this circuit is the difference between VIN1 and VIN2.

ΔVIN = VCCR1/R2

20064044

20064043

FIGURE 4. Non-Inverting Comparator with Hysteresis

CIRCUIT TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS

Feedback to almost any pin of a comparator can result in oscillation. In addition, when the input signal is a slow voltage ramp or

sine wave, the comparator may also burst into oscillation near the crossing point. To avoid oscillation or instability, PCB layout

should be engineered thoughtfully. Several precautions are recommended:

1. Power supply bypassing is critical, and will improve stability and transient response. Resistance and inductance from power

supply wires and board traces increase power supply line impedance. When supply current changes, the power supply line will

move due to its impedance. Large enough supply line shift will cause the comparator to mis-operate. To avoid problems, a small

bypass capacitor, such as 0.1uF ceramic, should be placed immediately adjacent to the supply pins. An additional 6.8μF or

greater tantalum capacitor should be placed at the point where the power supply for the comparator is introduced onto the

board. These capacitors act as an energy reservoir and keep the supply impedance low. In dual supply application, a 0.1μF

capacitor is recommended to be placed across V+ and V− pins.

2. Keep all leads short to reduce stray capacitance and lead inductance. It will also minimize any unwanted coupling from any

high-level signals (such as the output). The comparators can easily oscillate if the output lead is inadvertently allowed to ca-

pacitively couple to the inputs via stray capacitance. This shows up only during the output voltage transition intervals as the

comparator changes states. Try to avoid a long loop which could act as an inductor (coil).

3. It is a good practice to use an unbroken ground plane on a printed circuit board to provide all components with a low inductive

ground connection. Make sure ground paths are low-impedance where heavier currents are flowing to avoid ground level shift.

Preferably there should be a ground plane under the component.

LMV7271/LMV7275/LMV7272

4. The output trace should be routed away from inputs. The ground plane should extend between the output and inputs to act as

a guard. This can be achieved by running a topside ground plane between the output and inputs. A typical PCB layout is shown

in Figure 5.

20064051

FIGURE 5. Typical PCB Layout

5. When the signal source is applied through a resistive network to one input of the comparator, it is usually advantageous to

connect the other input with a resistor with the same value, for both DC and AC consideration. Input traces should be laid out

symmetrically if possible.

6. All pins of any unused comparators should be tied to the negative supply.

micro SMD LIGHT SENSITIVITY

Exposing the micro SMD device to direct sunlight will cause mis-operation of the device. Light sources such as Halogen lamps can

also affect electrical performance if brought near to the device. The wavelengths, which have the most detrimental effect, are reds

and infrareds.

micro SMD MOUNTING

The micro SMD package requires specific mounting techniques, which are detailed in National Semiconductor Application Note

AN-1112.

LMV7272 micro SMD to DIP Conversion Board

To facilitate characterization and testing, a micro SMD to DIP conversion board, LMV7272TLCONV, is available. It is a 2-layer

board, with the LMV7272 mounted on the bottom layer, and a capacitor (C1, between the positive and negative supplies) added

to the top layer.

20064060

LMV7272TLCONV Diagram

LMV7271/LMV7275/LMV7272

Typical Applications

UNIVERSAL LOGIC LEVEL SHIFTER

The output of LMV7275 is an unconnected drain of an NMOS device, which can be pulled up, through a resistor, to any desired

output level within the permitted power supply range. Hence, the following simple circuit works as a universal logic level shifter,

pulling up the signal to the desired level.

20064052

FIGURE 6. Logic Level Shifter

POSITIVE PEAK DETECTOR

A positive peak detect circuit is basically a comparator operated in a unity gain follower configuration, with a capacitor as a load to

maintain the highest voltage. A diode is added at the output to prevent the capacitor from discharging through the pull-up resistor,

and a 1MΩ resistor added in parallel to the capacitor to provide a high impedance discharge path. When the input VIN increases,

the inverting input of the comparator follows it, thus charging the capacitor. When it decreases, the cap discharges through the

1MΩ resistor. The decay time can be modified by changing the resistor. The output should be accessed through a follower circuit

to prevent loading.

20064054

FIGURE 7. Positive Peak Detector

LMV7271/LMV7275/LMV7272

OR'ING THE OUTPUT

Since the output is an unconnected NMOS drain, many drains can be tied together, pulled up to VDD by a single resistor to provide

an output OR'ing function. If any of the comparator outputs is pulled low the output VO goes down.

20064053

FIGURE 8. OR’ing the Outputs

LMV7271/LMV7275/LMV7272

NEGATIVE PEAK DETECTOR

For the negative detector, the output transistor of the comparator acts as a low impedance current sink. Since there is no pull-up

resistor, the only discharge path will be the 1MΩ resistor and any load impedance used. Decay time is changed by varying the

1MΩ resistor.

20064055

FIGURE 9. Negative Peak Detector

SQUARE WAVE GENERATOR

A typical application for a comparator is as a square wave oscillator. The circuit below generates a square wave whose period is

set by the RC time constant of the capacitor C1and resistor R4. The maximum frequency is limited by the large signal propagation

delay of the comparator, and by the capacitive loading at the output, which limits the output slew rate.

20064056

20064057

FIGURE 10. Squarewave Oscillator

LMV7271/LMV7275/LMV7272

To analyze the circuit, consider it when the output is high. That implies that the inverted input (VC) is lower than the non-inverting

input (VA). This causes the C1 to get charged through R4, and the voltage VC increases till it is equal to the non-inverting input. The

value of VA at this point is

If R1 = R2 = R3, then VA1 = 2VCC/3

At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is

If R1 = R2 = R3, then VA2 = VCC/3

The capacitor C1 now discharges through R4, and the voltage VC decreases till it is equal to VA2, at which point the comparator

switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to discharge C1 from 2VCC/3

to VCC/3, which is given by R4C1.ln2. Hence the formula for the frequency is:

F = 1/(2·R4·C1·ln2)

LMV7271/LMV7275/LMV7272

Physical Dimensions inches (millimeters) unless otherwise noted

5-Pin SOT-23

NS Package Number MF05A

5-Pin SC-70

NS Package Number MAA05A

LMV7271/LMV7275/LMV7272

NOTE: UNLESS OTHERWISE SPECIFIED

1. EPOXY COATING

2. 63Sn/37Pb EUTECTIC BUMP

3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.

4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION REMAINING PINS ARE NUMBERED COUNTERCLOCK-

WISE.

5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE

HEIGHT.

6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC.

8-Bump micro SMD

NS Package Number TLA08AAA

X1 = 1.514mm X2 = 1.514mm X3 = 0.600mm

LMV7271/LMV7275/LMV7272

Notes

LMV7271/LMV7275/LMV7272

Notes

Incorporated

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anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause

harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use

of any TI components in safety-critical applications.

In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to

help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and

requirements. Nonetheless, such components are subject to these terms.

No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties

have executed a special agreement specifically governing such use.

Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in

military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components

which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and

regulatory requirements in connection with such use.

TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which

have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such

components to meet such requirements.

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Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive

Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications

Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers

DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps

DSP dsp.ti.com Energy and Lighting www.ti.com/energy

Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial

Interface interface.ti.com Medical www.ti.com/medical

Logic logic.ti.com Security www.ti.com/security

Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com

Wireless Connectivity www.ti.com/wirelessconnectivity

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