Specifications
Processors Supported
Motorola
68000, 68020, 68030, 68040
68332, 68340, 68349, 68360, 68HC16
68302, 68306, 68307, 6809, 68HC11
Intel
8051, 8085, 8096
Zilog/Hitachi
Z80, Z180, 64180
Speed
Real-time emulation up to 40MHz
Breakpoints
128 CodeView breakpoints located in RAM
4 hardware breakpoints can be set on any memory address
or instruction located in RAM, ROM, PROM, or Flash
A breakpoint can be a logical event sequence with a
specified pass count
Events
4 Events can be any combination of addresses, address
ranges, specific data values, data ranges, status bits, banks,
or an external trigger
Status bits support read/write, program/data accesses, and
processor bus control signals
One 32-bit event controlled interval timer
Sequencer
Combined with the event system, complex break and trigger
points can be defined using AND, OR, THEN, and WITHOUT
statements
Event pass counts from 1 to 65,535 influence conditional
operations
Triggers
0 to 64K trace cycles of delay can be used to capture data
around any point of interest
16 external inputs & BNC pulse/level outputs
Trace
Dual 4K or 16K cycle deep trace buffers
Shows any combination of source, disassembly or state
information that includes cycle, address, data, control
signals, and 50ns time stamp
Freeze buffer allows viewing while emulating
Qualification using a single event or conditional sequence to
capture only cycles of interest
Full search capability
Overlay Memory
64KB to 256KB standard (depending on model)
Additional memory from 128KB to 4MB
128KB to 512KB of shadow RAM available
Zero wait state operation up to rated speed
External inputs to support banked overlay memory on 8-bit
processors
Software configurable memory mapping
Performance Analysis
Hardware-based with 50ns resolution
Code coverage with source and assembly display
Displays min, max, & average times of execution
Data can be displayed in raw or histogram format
SourceGate II Source-Level Debugger
Integrated Source Level Debugger
Native OS GUI support
Complete high-level language debugging facilities
Display and modify variable and data structure values via
Watch and Inspect windows
Access to all global, local, stack-based, and register-
based symbols
Debug directly from source files shown in high-level
source, assembly, or a combination of both source and
assembly via CodeView windows
Control tool operation (reset, single-step, etc.) directly
from your code via CodeView windows
Built-in assembler allows code to be patched directly in
memory
Processor CPU and peripheral registers can be displayed
and modified in GUI windows
Multiple Compiler/File Format Support
Full support for C, C++, and ADA compilers
Support for all major compilers including those that
provide IEEE-695, COFF, Elf/Dwarf, and other proprietary
formats
Common User Interface For All Products
No learning curves when switching processor families
Minimum Host Requirements
PC
IBM compatible 486 or higher
Windows 3.1x, 95/98, and NT systems
8MB RAM minimum
Physical Specifications
Main Unit:
Size: 9.5"W x 14.0"L x 4.0"H
Weight: 12.0 lbs.
Target Pod:
Physical specifications vary depending on processor
Power Requirements
110-240VAC, 50/60Hz
Communications
RS-232C serial port
Supported baud rates
PC: 9600 - 115,200
High-speed parallel port for downloading code
Ethernet port
IEEE 802.3 10base2 or 10baseT
Some features are not available on certain models or may
require Performance Analysis option
AVOCET DEVELOPMENT TOOLS
The Complete Solution for Embedded Systems Development Tools
Avocet Systems, Inc.
120 Union Street
P.O. Box 490
Rockport, ME 04856
Phone (800) 448-8500
(207) 236-9055
Fax (207) 236-6713
View All Our Tools At:
www.avocetsystems.com
Email Us to Request a Quote:
sales@avocetsystems.com