SN54LV07A, SN74LV07A
HEX BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES337C – MAY 2000 – REVISED AUGUST 2000
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
EPIC
(Enhanced-Performance Implanted
CMOS) Process
D
2-V to 5.5-V VCC Operation
D
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
D
Outputs Are Disabled During Power Up and
Power Down With Inputs Tied to VCC
D
Support Mixed-Mode Voltage Operation on
All Ports
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D
Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and DIPs (J)
description
These hex buffers/drivers are designed for 2-V to
5.5-V VCC operation.
The ’L V07A devices perform the Boolean function
Y = A in positive logic.
The open-drain outputs require pullup resistors to perform correctly and can be connected to other open-drain
outputs to implement active-low wired-OR or active-high wired-AND functions.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
The SN54LV07A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV07A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer/driver)
INPUT
AOUTPUT
Y
H H
L L
Copyright 2000, Texas Instruments Incorporated
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
3212019
910111213
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
SN54LV07A ...FK PACKAGE
(TOP VIEW)
1Y
1A
NC
4Y
4A 6A
3Y
GND
NC VCC
NC – No internal connection
SN54LV07A ...J OR W PACKAGE
SN74LV07A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
EPIC is a trademark of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
SN54LV07A, SN74LV07A
HEX BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES337C – MAY 2000 – REVISED AUGUST 2000
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†
1
1A 3
2A
1Y
2
5
3A 9
4A
2Y
4
11
5A 13
6A
3Y
6
4Y
8
5Y
10
6Y
12
1
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
logic diagram, each buffer/driver (positive logic)
AY
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the power-off state, VO (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) –35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
SN54LV07A, SN74LV07A
HEX BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES337C – MAY 2000 – REVISED AUGUST 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
SN54LV07A SN74LV07A
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 2 5.5 2 5.5 V
VCC = 2 V 1.5 1.5
VIH
High level in
p
ut voltage
VCC = 2.3 V to 2.7 V VCC ×0.7 VCC ×0.7
V
V
IH
High
-
le
v
el
inp
u
t
v
oltage
VCC = 3 V to 3.6 V VCC ×0.7 VCC ×0.7
V
VCC = 4.5 V to 5.5 V VCC ×0.7 VCC ×0.7
VCC = 2 V 0.5 0.5
VIL
Low level in
p
ut voltage
VCC = 2.3 V to 2.7 V VCC ×0.3 VCC ×0.3
V
V
IL
Lo
w-
le
v
el
inp
u
t
v
oltage
VCC = 3 V to 3.6 V VCC ×0.3 VCC ×0.3
V
VCC = 4.5 V to 5.5 V VCC ×0.3 VCC ×0.3
VIInput voltage 0 5.5 0 5.5 V
VOOutput voltage 0 5.5 0 5.5 V
VCC = 2 V 50 50 µA
IOL
Low level out
p
ut current
VCC = 2.3 V to 2.7 V 2 2
I
OL
Lo
w-
le
v
el
o
u
tp
u
t
c
u
rrent
VCC = 3 V to 3.6 V 8 8 mA
VCC = 4.5 V to 5.5 V 16 16
VCC = 2.3 V to 2.7 V 0 200 0 200
∆t/∆vInput transition rise or fall rate VCC = 3 V to 3.6 V 0 100 0 100 ns/V
VCC = 4.5 V to 5.5 V 0 20 0 20
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
SN54LV07A SN74LV07A
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX MIN TYP MAX
UNIT
IOL = 50 µA2 V to 5.5 V 0.1 0.1
VOL
IOL = 2 mA 2.3 V 0.4 0.4
V
V
OL IOL = 8 mA 3 V 0.44 0.44
V
IOL = 16 mA 4.5 V 0.55 0.55
IIVI = VCC or GND 0 V to 5.5 V ±1±1µA
IOH VI = VIH, VOH = VCC 5.5 V ±2.5 ±2.5 µA
ICC VI = VCC or GND, IO = 0 5.5 V 20 20 µA
Ioff VI or VO= 0 to 5.5 V 0 V 5 5 µA
CiVI = VCC or GND 3.3 V 1.6 1.6 pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LV07A, SN74LV07A
HEX BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES337C – MAY 2000 – REVISED AUGUST 2000
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C SN54LV07A SN74LV07A
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH A Y
CL=15
p
F
6.6∗10.4∗1∗13∗1 13
ns
tPHL A Y
C
L =
15
pF
7.5∗10.4∗1∗13∗1 13
ns
tPLH A Y
CL=50
p
F
11.1 15.2 1 18 1 18
ns
tPHL A Y
CL
=
50
F
9.6 15.2 1 18 1 18
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C SN54LV07A SN74LV07A
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH A Y
CL=15
p
F
5∗7.1∗1∗8.5∗1 8.5
ns
tPHL A Y
C
L =
15
pF
5∗7.1∗1∗8.5∗1 8.5
ns
tPLH A Y
CL=50
p
F
8.2 10.6 1 12 1 12
ns
tPHL A Y
CL
=
50
F
6.6 10.6 1 12 1 12
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C SN54LV07A SN74LV07A
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH A Y
CL=15
p
F
3.8∗5.5∗1∗6.5∗1 6.5
ns
tPHL A Y
C
L =
15
pF
3.4∗5.5∗1∗6.5∗1 6.5
ns
tPLH A Y
CL=50
p
F
5.7 7.5 1 8.5 1 8.5
ns
tPHL A Y
CL
=
50
F
4.5 7.5 1 8.5 1 8.5
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 5)
PARAMETER
SN74LV07A
UNIT
PARAMETER
MIN TYP MAX
UNIT
VOL(P) Quiet output, maximum dynamic VOL 0.4 0.8 V
VOL(V) Quiet output, minimum dynamic VOL –0.1 –0.8 V
VOH(V) Quiet output, minimum dynamic VOH 3.2 V
VIH(D) High-level dynamic input voltage 2.31 V
VIL(D) Low-level dynamic input voltage 0.99 V
NOTE 5: Characteristics are for surface-mount packages only.
operating characteristics, TA = 25°C
Cpd
Power dissi
p
ation ca
p
acitance
CL=50
p
F
f=10MHz
3.3 V 2.9 p
F
C
p
d
Power
dissi ation
ca acitance
CL
=
50
F
,
f
=
10
MHz
5 V 5.3
F
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LV07A, SN74LV07A
HEX BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES337C – MAY 2000 – REVISED AUGUST 2000
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tPHL tPLH
VCC
0 V
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤3 ns, tf ≤ 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
From Output
Under Test CL
(see Note A)
Test
Point
LOAD CIRCUIT FOR
OPEN-DRAIN OUTPUTS
50% VCC 50% VCC
RL = 1 kΩ
Output
VCC
VOL
≈VCC
50% VCC VOL + 0.3 V
Figure 1. Load Circuit and Voltage Waveforms
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subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
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Copyright 2000, Texas Instruments Incorporated
