UTS4ACS153/UT54ACTS 153 Radiation-Hardened Quadruple 4 to 1 Multiplexers FEATURES e 1.2u radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack DESCRIPTION The UT54ACS 153 and the UT54ACTS 153 are dual four to one line selectors/multiplexers. Common inputs A and B select a value from one of four sources for each section and routes the value from each section to their respective outputs. Separate strobe inputs, G are provided for each of the two four-line sec- tions. The devices are characterized over full military temperature range of -55C to +125C. FUNCTION TABLE SELECT DATA INPUTS INPUTS OUTPUT CONTROL OUTPUT BOA nN wo G rrartarorrree x rrrere xt Fer x x x K eK KM KM Lr MR x x K LTT K KM x x* IT -r- K KX KK OK xr rxK Ke KK KK OK -F rr Pr er cere rrexrerertrxterer|< PINOUTS 16-Pin DIP Top View 16 I} Yoo 15 [([] 2G wCla 13 (7 2c3 1G C1 B 2 1c3 (3 12 ([] 4 yor C]5 127 2c2 ico C6 vwCl7 Veg C8 Cc 117) 2c1 10 [7] 2co 9) 2Y 16-Lead Flatpack Top View 1G B 1C3 102 11 100 1v Vss 16 15 14 13 grag 12 2c2 af 2c1 10 2co 9 2v en Qoaeaaoh = LOGIC SYMBOL A B 1G 100 1C1 12 13 2G 2Cco 2Ct 2c2 2c3 Note: These symbols are in accordance with ANSIIEEE Std 91-1984 and IEC Publication 617-12. 85 Rad-Hard MSI Logic UT54ACS153/UT54ACTS153 LOGIC DIAGRAM OUTPUT contRoL 16 100 11 1v DATA1 162 103 B SE LECT A 2c0 2c1 DATA 2 oy 202 23 OUTPUT ox contro. 26 Rad-Hard MSI Logic 86 UTS4ACS153/UTS4ACTS153 RADIATION HARDNESS SPECIFICATIONS ! PARAMETER LIMIT UNITS Total Dose 1.056 rads(Si) SEU & SEL Threshold ? 80 MeV-cm?/mg Neutron Fluence 1.0E14 nfcm Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table. 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS Vpp Supply voltage -0.3 w 7.0 Vv Vio Voltage any pin -.3 0 Vpp +3 Vv TstG Storage Temperature range -65 to +150 C Ty Maximum junction temperature +175 C Tis Lead temperature (soldering 5 seconds) +300 C Ojic Thermal resistance junction to case 20 C/W q DC input current +10 mA Pp Maximum power dissipation 1 WwW Note: 1, Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMIT UNITS Vpp Supply voltage 4.510 5.5 Vv VIN Input voltage any pin 0to Vpp v Te Temperature range -55 to + 125 C 87 Rad-Hard MSI Logic UTS5S4ACS 153/UTS4ACTS153 DC ELECTRICAL CHARACTERISTICS 7 (Vpp = 5.0V 10%; Vgg = OV , -55C < Te < +125C) SYMBOL PARAMETER CONDITION MIN MAX UNIT Vit Low-level input voltage } ACTS 0.8 v Vin High-level input voltage ! ACTS 5Vpp Vv ACS -TVpp in Input leakage current ACTS/ACS Vin = Vpp or Vss -1 1 pA Vou Low-level output voltage 3 ACTS Ip, = 8.0mA 0.40 Vv ACS Ip. = 100HA 0.25 Vou High-level output voltage 3 ACTS lou = -8.0mA TVpp Vv ACS Ipy = -]00HA Vpp - 0.25 loz Three-state output leakage current Vo = Vpp and Vss -20 20 pA Ios Short-circuit output current 4 ACTS/ACS Vo = Vpp and Vss -200 200 mA Protal Power dissipation ? Cy = SOpF 2.1 mW/ MHz Ippe Quiescent Supply Current Vpp = 5.5V 10 pA Cn Input capacitance 5 f= 1MHz @ 0V 15 pF Cout Output capacitance * f = IMHz @ OV 15 pF Notes: 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: Vyq = Vyy(min) + 20%, - 0%; Vi_ = Vy_ (max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input vollage within the above specified range, but are guaranteed to Vj4y(min) and Vy, (max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-M-38510, for current density $ 5.0E5 amps/cm, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capaci is dt the desi d at frequency of IMHz and a signal amplitude of 50mV mms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All specifications valid for radiation dose S 1E6 rads(Si). 8. Power does not include power contribution of any TTL output sink current. 9. Power dissipation specified per switching output. inal and Vsg Rad-Hard MSI Logic 88 UTS4ACS153/UT54ACTS 153 AC ELECTRICAL CHARACTERISTICS ? (Vpp = 5.0V 10%; Veg = OV 1, -55C < Te < +125C) SYMBOL PARAMETER MINIMUM MAXIMUM UNIT tpt Data to output Yn 2 16 ns tpt Data to output Yn 2 12 ns teu Strobe to output Ya 1 12 ns tply Strobe to output Yn 1 11 ns teu Select to output Yn 2 16 ns toyy Select to output Yn 2 14 ns Notes: 1, Maximum allowable relative shift equals 5OmV. 2. All specifications valid for radiation dose $ 1E6 rads(Si). 89 Rad-Hard MSI Logic