2N6790 Data Sheet December 2001 3.5A, 200V, 0.800 Ohm, N-Channel Power MOSFET Features * 3.5A, 200V The 2N6790 is an N-Channel enhancement mode silicon gate power MOS field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This device can be operated directly from an integrated circuit. * rDS(ON) = 0.800 Ordering Information * Majority Carrier Device PART NUMBER 2N6790 PACKAGE TO-205AF * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" BRAND 2N6790 NOTE: When ordering, include the entire part number. Symbol D G S Packaging JEDEC TO-205AF DRAIN (CASE) SOURCE GATE (c)2001 Fairchild Semiconductor Corporation 2N6790 Rev. B 2N6790 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulse Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Above TC = 25oC, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 2N6790 200 200 3.5 2.25 14 20 3.5 14 20 0.16 -55 to 150 UNITS V V A A A V A A W W/oC oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS ID = 0.25mA, VGS = 0V 200 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 1.0mA 2 - 4 V IDSS VDS = 200V, VGS = 0V Zero-Gate Voltage Drain Current TEST CONDITIONS VDS = 160V, VGS = 0V TC = 125oC - - 250 A - - 1000 A IGSS VGS = 20V, VDS = 0 - - 100 nA Drain to Source On-Voltage (Note 2) VDS(ON) ID = 3.5A, VGS = 10V - - 2.8 V Drain to Source On Resistance rDS(ON) ID = 2.25A, VGS = 10V - .5 0.800 Gate to Source Leakage Current TC = 125oC - - 1.5 VSD IS = 3.5A, VGS = 0V 0.7 - 1.5 V gfs ID = 2.25A, VDS = 5V 1.5 2.25 4.5 S Input Capacitance CISS 450 600 pF COSS VGS = 0V, VDS = 25V f = 1MHz 200 Output Capacitance 60 150 300 pF 15 40 80 pF - - 40 ns - - 50 ns td(OFF) - - 50 ns tf - - 50 ns VDS = 160V, ID = 125mA 20 - - W VDS = 5.7V, ID = 3.5A 20 - - W - - 6.25 oC/W - - 175 oC/W ID = 2.25A, VGS = 10V Diode Forward Voltage Forward Transconductance (Note 2) Reverse-Transfer Capacitance CRSS Turn-On Delay Time td(ON) Rise Time tr Turn-Off Delay Time Fall Time Safe Operating Area SOA Thermal Resistance Junction to Case RJC Thermal Resistance Junction to Ambient RJA ID = 2.25A VGS 74V, RG = 50 Free Air Operation Source to Drain Diode Specifications PARAMETER Reverse Recovery Time Reverse Recovered Charge SYMBOL TYP MAX UNITS trr TJ = 150oC, ISD = 3.5A, dlSD/dt = 100A/s TEST CONDITIONS MIN 350 - ns QRR TJ = 150oC, ISD = 3.5A, dlSD/dt = 100A/s 2.3 - C NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). (c)2001 Fairchild Semiconductor Corporation 2N6790 Rev. B 2N6790 Typical Performance Curves Unless Otherwise Specified 5 POWER DISSIPATION MULTIPLIER 1.2 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 3 2 1 0 25 0 0 4 150 50 75 100 150 125 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 ZJC, NORMALIZED THERMAL IMPEDANCE 1.0 0.5 0.2 0.1 PDM 0.1 t1 0.05 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x ZJC x RJC + TC 0.02 0.01 0.01 10-5 SINGLE PULSE 10-4 0.1 10-2 10-3 T1, RECTANGULAR PULSE DURATION (s) 1 10 FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 50 10V 10 12 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) OPERATION IN THIS AREA LIMITED BY rDS(ON) 10s 100s 1.0ms 1 10ms TC = 25oC 0.1 TJ = MAX RATED SINGLE PULSE 0.05 1 10 100 VDS, DRAIN TO SOURCE (V) 100ms 80s PULSE TEST 7V 8 VGS = 6V 4 5V DC 4V 0 1000 FIGURE 4. FORWARD BIAS SAFE OPERATING AREAS (c)2001 Fairchild Semiconductor Corporation 8V 0 25 50 75 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 FIGURE 5. OUTPUT CHARACTERISTICS 2N6790 Rev. B 2N6790 Typical Performance Curves Unless Otherwise Specified (Continued) 12 ID, DRAIN CURRENT (A) 10V 9V 8V VGS = 7V 8 6V 4 5V 4V 0 0 2 4 6 8 VDS, DRAIN TO SOURCE VOLTAGE (V) ID(ON), ON-STATE DRAIN CURRENT (A) 16 80s PULSE TEST VDS > ID(ON) x rDS(ON) MAX 12 125oC 8 4 2 4 6 VGS, GATE TO SOURCE VOLTAGE (V) 0 10 FIGURE 6. SATURATION CHARACTERISTICS 2.2 PULSE DURATION = 2.0s INITIAL TJ = 25oC ID = 2A VGS = 10V 1.0 VGS = 20V 0.5 0 VGS = 10V 1.8 1.4 1.0 0.6 0.2 0 10 5 15 20 -40 0 40 120 80 150 TJ, JUNCTION TEMPERATURE (oC) ID, DRAIN CURRENT (A) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 1.25 1000 1.15 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 8 FIGURE 7. TRANSFER CHARACTERISTICS NORMALIZED ON RESISTANCE rDS(ON), DRAIN TO SOURCE ON RESISTANCE () 1.5 25oC -55oC 80s PULSE TEST 1.05 0.95 0.85 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD 800 600 CISS 400 200 COSS 0.75 CRSS 0 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE (c)2001 Fairchild Semiconductor Corporation 0 10 20 30 40 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 2N6790 Rev. B 2N6790 Typical Performance Curves Unless Otherwise Specified (Continued) 5.0 IDR, REVERSE DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 102 TJ = -55oC 80s PULSE TEST 4.25 3.75 TJ = 25oC 3.0 TJ = 125oC 2.25 1.50 0.75 0 TJ = 25oC TJ = 150oC 10 TJ = 150oC TJ = 25oC 1 0 2 4 6 8 10 ID, DRAIN CURRENT (A) 12 14 0 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 1 2 3 VSD, SOURCE TO DRAIN VOLTAGE (V) 4 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE VGS, GATE TO SOURCE VOLTAGE (V) 20 ID = 7A VDS = 160V VDS = 100V VDS = 40V 15 10 5 0 0 4 8 12 16 20 Qg, TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE (c)2001 Fairchild Semiconductor Corporation 2N6790 Rev. B 2N6790 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% + RG - VDD 10% 0 10% DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2F 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50k Qgd 0.3F VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT (c)2001 Fairchild Semiconductor Corporation IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS 2N6790 Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM FAST FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET VCXTM STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4