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Power Management Switch ICs for PCs and Digital Consumer Products
1ch High Side Switch ICs
for USB Devices and Memory Cards
BD2041AFJ,BD2051AFJ,BD6519FJ
Description
Single channel high side switch IC for USB port is a high side switch having over current protection used in power supply line
of universal serial bus (USB).
N-channel power MOSFET of low on resistance and low supply current are realized in this IC.
And, over current detection circuit, thermal shutdown circuit, under voltage lockout and soft start circuit are built in.
Features
1) Built-in low on resistance Nch MOS FET Switch.
Typ = 80m (BD2041AF/BD2051AFJ)
Typ = 100m (BD6519FJ)
2) Continuous current load 0.5A
3) Control input logic
Active-Low : BD2041AFJ/ BD6519FJ
Active-High : BD2051AFJ
4) Soft start circuit
5) Over current detection
6) Thermal shutdown
7) Under voltage lockout
8) Open drain error flag output
9) Reverse-current protection when power switch off
10) Power supply voltage range
2.7V~5.5V (BD2041AF/BD2051AFJ)
3.0V~5.5V (BD6519FJ)
11) Operating temperature range -40°C~85°C
Applications
USB hub in consumer appliances, Car accessory, PC, PC peripheral equipment, and so forth
Lineup
Parameter BD2041AFJ BD2051AFJ BD6519FJ
Continuous current load (A) 0.5 0.5 0.5
Output current at short (A) 1.0 1.0 1.1
Control input logic Low High Low
Absolute Maximum Ratings
Parameter Symbol Limits Unit
Supply voltage VIN -0.3 to 6.0 V
Enable voltage VEN, V/EN -0.3 to 6.0 V
/OC voltage V/OC -0.3 to 6.0 V
/OC current IS/OC 10 mA
OUT voltage VOUT -0.3 to 6.0 V
Storage temperature TSTG -55 to 150 °C
Power dissipation PD 560*1 mW
*1 In the case of exceeding Ta = 25°C, 4.48mW should be reduced per 1°C.
* This chip is not designed to protect itself against radioactive rays.
IN, EN (/EN), and /OC terminal of BD2041AFJ/BD2051AFJ correspond to VDD, CTRL, and FLAG terminal of BD6519FJ, respectively.
No.11029EBT03
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
2/18
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© 2011 ROHM Co., Ltd. All rights reserved.
Operating conditions
BD2041AF/BD2051AFJ
Parameter Symbol Limits Unit
Operating voltage VIN 2.7 to 5.5 V
Operating temperature TOPR -40 to 85 °C
Continuous output current ILO 0 to 500 mA
BD6519FJ
Parameter Symbol Limits Unit
Operating voltage VIN 3.0 to 5.5 V
Operating temperature TOPR -40 to 85 °C
Continuous output current ILO 0 to 500 mA
Electrical characteristics
BD2041AFJ (Unless otherwise specified, VIN = 5.0V, Ta = 25°C)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
Operating Current IDD - 90 120 μA V/EN = 0V, OUT = OPEN
Standby Current ISTB - 0.01 1 μA V/EN = 5V, OUT = OPEN
/EN input voltage
V/EN 2.0 - - V High input
V/EN - - 0.8 V Low input
- - 0.4 V Low input 2.7V VIN 4.5V
/EN input current I/EN -1.0 0.01 1.0 μA V/EN = 0V or V/EN = 5V
/OC output LOW voltage V/OC - - 0.5 V I/OC = 5mA
/OC output leak current IL/OC - 0.01 1 μA V/OC = 5V
ON resistance RON - 80 100 m IOUT = 500mA
Output current at short ISC 0.7 1.0 1.3 A
VIN = 5V, VOUT = 0V,
CL = 100μF (RMS)
Output rise time TON1 - 1.2 10 ms
RL = 10 , CL = OPEN
Output turn on time TON2 - 1.5 20 ms
Output fall time TOFF1 - 1 20 μs
Output turn off time TOFF2 - 3 40 μs
UVLO threshold VTUVH 2.1 2.3 2.5 V Increasing VIN
VTUVL 2.0 2.2 2.4 V Decreasing VIN
BD6519FJ (Unless otherwise specified, VDD = 5.0V, Ta = 25°C)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
Operating Current IDD - 90 140 μA VCTRL= 0V, OUT = OPEN
Standby Current - 0.01 2 μA VCTRL= 5V, OUT = OPEN
CTRL input voltage VCTRL 2.5 - - V High input
- - 0.7 V Low input
CTRL input voltage ICTRL -1.0 0.01 1.0 μA VCTRL = 0V or VCTRL = 5V
FLAG output resistance RFLAG - 180 450 IFLAG = 1mA
FLAG output leak current ILFLAG - 0.01 1 μA VFLAG = 5V
FLAG output delay TDFLAG - 2.5 8 ms
ON resistance RON - 100 140 m V
DD = 5V, IOUT = 500mA
- 140 180 m VDD = 3.3V, IOUT = 500mA
Short circuit output current ISC 0.6 - 1.6 A VDD = 5V , VOUT = 0V
Output leak current ILEAK - - 10 μA VCTRL = 5V
Output rise time TON1 - 1 4 ms
RL = 10 , CL = OPEN
Output turn on delay time TON2 - 1.3 6 ms
Output fall time TOFF1 - 1 20 μs
Output turn off delay time TOFF2 - 3 20 μs
Thermal shutdown threshold TTS - 135 - °C Tj increase
UVLO threshold VTUVH 2.3 2.5 2.7 V VDD increasing
VTUVL 2.1 2.3 2.5 V VDD decreasing
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
3/18
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© 2011 ROHM Co., Ltd. All rights reserved.
BD2051AFJ (Unless otherwise specified, VIN = 5.0V, Ta = 25°C)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
Operating Current IDD - 90 120 μA VEN = 5V, OUT = OPEN
Standby Current ISTB - 0.01 1 μA VEN = 0V, OUT = OPEN
EN input voltage
VEN 2.0 - - V High input
VEN - - 0.8 V Low input
- - 0.4 V Low input 2.7V VIN 4.5V
EN input current IEN -1.0 0.01 1.0 μA VEN = 0V or VEN = 5V
/OC output LOW voltage V/OC - - 0.5 V I/OC = 5mA
/OC output leak current IL/OC - 0.01 1 μA V/OC = 5V
ON resistance RON - 80 100 m IOUT = 500mA
Output current at short ISC 0.7 1.0 1.3 A
VIN = 5V, VOUT = 0V,
CL = 100μF (RMS)
Output rise time TON1 - 1.2 10 ms
RL = 10 , CL = OPEN
Output turn on time TON2 - 1.5 20 ms
Output fall time TOFF1 - 1 20 μs
Output turn off time TOFF2 - 3 40 μs
UVLO threshold VTUVH 2.1 2.3 2.5 V Increasing VIN
VTUVL 2.0 2.2 2.4 V Decreasing VIN
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
4/18
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© 2011 ROHM Co., Ltd. All rights reserved.
Measurement circuit
EN(/EN)
OUT
/OC
IN
GND
V
IN
IN
OUT
OUT
1uF
A
V
EN
(V
/EN
)
EN(/EN)
OUT
/OC
IN
GND
V
IN
R
L
C
L
IN
OUT
OUT
1uF
V
EN
(V
/EN
)
Operating current EN, /EN input voltage, Output rise, fall time
EN(/EN)
OUT
/OC
IN
GND
VIN
CL
IN
OUT
OUT
1uF
IOUT
VIN
10k
VEN (V/EN )
EN(/EN)
OUT
/OC
IN
GND
VIN
IN
OUT
OUT
1uF I/OC
VIN
VEN (V/EN )
ON resistance, Over current detection /OC output LOW voltage
Fig.1 Measurement circuit
Timing diagram
BD2041AFJ/BD6519FJ BD2051AFJ
TON2
TON1
10%
90%
50% 50%
90%
10%
TOFF2
TOFF1
VOUT
V/EN
TON2
TON1
10%
90%
50% 50%
90%
10%
TOFF2
TOFF1
VOUT
VEN
Fig.2 Timing diagram Fig.3 Timing diagram
IN, EN (/EN), and /OC terminal of BD2041AFJ/BD2051AFJ correspond to VDD, CTRL, and FLAG terminal of BD6519FJ, respectively.
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
5/18
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© 2011 ROHM Co., Ltd. All rights reserved.
Reference data (BD2041AFJ/BD2051AFJ)
Fig.6 Operating current
EN,/EN Disable
Fig.7 Operating current
EN,/EN Disable
Fig.4 Operating current
EN,/EN Enable
0
20
40
60
80
100
120
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
OPERATING CURRENT :
IDD [μA]
VIN=5.0V
0.0
0.2
0.4
0.6
0.8
1.0
23456
SUPPLY VOLTAGE : VIN [V]
OPERATING CURRENT :
ISTB[μA]
Ta=25 °C
Fig.5 Operating current
EN,/EN Enable
0.0
0.5
1.0
1.5
2.0
23 456
SUPPLY VOLTAGE : VIN [V]
ENABLE INPUT VOLTAGE :
VEN,
V/EN[V] 0
Low to Hi
g
h
High to Low
Ta=25 °C
Fig.8 EN,/EN input voltage
0.0
0.5
1.0
1.5
2.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
ENABLE INPUT VOLTAGE :
VEN, V/EN[V]
VIN=5.0V
High to Lo
w
Low to High
Fig.9 EN,/EN input voltage
0.0
0.1
0.2
0.3
0.4
0.5
23456
SUPPLY VOLTAGE : VIN [V]
/OC OUTPUT LOW VOLTAGE :
V/OC[V]
Ta=25 °C
Fig.10 /OC output LOW voltage
0.0
0.1
0.2
0.3
0.4
0.5
-50 0 50 100
AMBIENT TEM PERATURE : Ta[]
/OC OUTPUT LOW VOLTAGE :
V/OC[V]
VIN=5.0V
Fig.11 /OC output LOW voltage Fig.12 ON resistance
0
50
100
150
200
-50 0 50 100
AMBIENT TEM PERATURE : Ta[]
ON RESISTANCE :
RON [m]
VIN=5.0V
Fig.13 ON resistance
0
20
40
60
80
100
120
23456
SUPPLY VOLTAGE : VIN [V]
OPERATING CURRENT :
IDD [μA]
Ta=25 °C
0.0
0.2
0.4
0.6
0.8
1.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
OPERATING CURRENT :
ISTB[μA]
VIN=5.0V
0
50
100
150
200
23 456
SUPPLY VOLTAGE : VIN [V]
ON RESISTANCE :
RON[m]
Ta=25 °C
0.0
0.5
1.0
1.5
2.0
23456
SUPPLY VOLTAGE : VIN [V]
SHORT CIRCUIT CURRENT :
ISC[A]
Ta=25 °C
Fig.14 Output current at shortcircuit
(BD2041AFJ/51AFJ)
0.0
0.5
1.0
1.5
2.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
SHORT CIRCUIT CURRENT :
ISC[A]
VIN=5.0V
Fig.15 Output current at shortcircuit
(BD2041AFJ/51AFJ)
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
6/18
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Fig.19 Output turn on time
Fig.22 Output turn off time
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
TURN ON TIME :
TON2 [ms]
VIN=5.0V
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN[V]
TURN OFF TIME :
TOFF2[μs]
Ta=25 °C
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
TURN OFF TIME :
TOFF2 [μs]
VIN=5.0V
Fig.23 Output turn off time
2.0
2.1
2.2
2.3
2.4
2.5
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
UVLO THRESHOLD VOLTAGE :
VUVLOH, V UVLOL[V]
VUVLOH
VUVLOL
Fig.24 UVLO threshold voltage
0.0
0.2
0.4
0.6
0.8
1.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
UVLO HYSTERESIS VOLTAGE :
VHYS[V]
Fig.25 UVLO hysteresis voltage
Fig.16 Output rise time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN [V]
RISE TIME :
TON1 [ms]
Ta=25 °C
Fig.18 Output turn on time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN [V]
TURN ON TIME :
TON2 [ms]
Ta=25 °C
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
RISE TIME :
TON1 [ms]
VIN=5.0V
Fig.17 Output rise time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN [V]
FALL TIME :
TOFF1[μs]
Ta=25 °C
Fig.20 Output fall time
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
FALL TIME :
TOFF1s]
VIN=5.0V
Fig.21 Output fall time
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
7/18
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Waveform data (BD2041AFJ/BD2051AFJ)
Regarding the output rise/fall and over current detection characteristics of BD2051AFJ, refer to the characteristic of BD2041AFJ.
TIME(1ms/div.)
Fig.26 Output rise characteristic
(BD2041AFJ)
V/EN
(5V/div.)
V/OC
(5V/div.)
V/EN
(5V/div.)
VIN=5V
RL=10Ω
CL=100μF
VIN=5V
RL=10Ω
CL=100μF
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
TIME(1ms/div.)
Fig.27 Output fall characteristic
(BD2041AFJ)
TIME(2ms/div.)
Fig.30 Over current response
Ramped load
(BD2041AFJ)
TIME (2ms/div.)
Fig.31 Over current response
Enable to shortcircuit
(BD2041AFJ)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
TIME (500ms/div.)
Fig.33 Over current response
Output shortcircuit at Enable
(BD2041AFJ)
VIN=5V
VIN=5V
CL=100μF
V/EN
(5V/div.)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
VIN=5V
CL=100μF
Thermal Shutdown
V/EN
(1V/div.)
IOUT
(0.2A/div.)
(1V/div.)
TIME(0.5ms/div.)
Fig.28 Inush current
(BD2041AFJ)
47μF
147μF
220μF 330μF
VIN=5V
RL=10Ω
V/OC
TIME(20ms/div.)
Fig.29 Over current response
Ramped load
(BD2041AFJ)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.) VIN=5V
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(1A/div.) VIN=5V
CL=100μF
TIME (2ms/div.)
Fig.32 Over current response
Output shortcircuit at Enable
(BD2041AFJ)
TIME (10ms/div.)
Fig.34 UVLO
VDD increasing
(BD2041AFJ)
TIME (10ms/div.)
Fig.35 UVLO
VDD decreasing
(BD2041AFJ)
VOUT
(5V/div.)
V
IN
(5V/div.)
IOUT
(0.5A/div.)
V/OC
(5V/div.)
VOUT
(5V/div.)
V
IN
(5V/div.)
IOUT
(0.5A/div.)
V/OC
(5V/div.)
RL=10Ω
CL=147μF
RL=10Ω
CL=147μF
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
8/18
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© 2011 ROHM Co., Ltd. All rights reserved.
Reference data (BD6519FJ)
Fig.38 Operating current
CTRL Disable
Fig.39 Operating current
CTRL Disable
Fig.36 Operating current
CTRL Enable
0
20
40
60
80
100
120
-50 0 50 100
AMBIENT TEM PERATURE : Ta[]
OPERATING CURRENT :
IDD [μA]
VDD=5.0V
0.0
0.2
0.4
0.6
0.8
1.0
23456
SUPPLY VOLTAGE : VDD[V]
OPERATING CURRENT :
ISTB[μA]
Ta=25 °C
Fig.37 Operating current
CTRL Enable
0.0
0.5
1.0
1.5
2.0
2.5
23456
SUPPLY VOLTAGE : VDD[V]
ENABLE INPUT VOLTAGE :
VCTRL [V] 0
Low to High
High to Low
Ta=25 °C
Fig.40 CTRL input voltage
0.0
0.5
1.0
1.5
2.0
2.5
-50 0 50 100
AMBIENT TEM PERATURE : Ta[]
ENABLE INPUT VOLTAGE :
VCTRL [V]
VDD=5.0V
High to Lo
w
Low to High
Fig.41 CTRL input voltage
0
50
100
150
200
250
23456
SUPPLY VOLTAGE : VDD[V]
FLAG OUTPUT RESISTANCE
:
R FLAG[]
Ta=25 °C
Fig.42 FLAG output resistance
0
50
100
150
200
250
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
FLAG OUTPUT RESISTANCE :
RFLAG[]
VDD=5.0V
Fig.43 FLAG output resistance Fig.44 ON resistance
0
50
100
150
200
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
ON RESISTANCE :
RON[m]
VDD=5.0V
Fig.45 ON resistance
0
20
40
60
80
100
120
23456
SUPPLY VOLTAGE : VDD[V]
OPERATING CURRENT :
IDD [μA]
Ta=25 °C
0.0
0.2
0.4
0.6
0.8
1.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
OPERATING CURRENT :
ISTB[μA]
VDD=5.0V
0
50
100
150
200
23 456
SUPPLY VOLTAGE : VDD[V]
ON RESISTANCE :
RON[m]
Ta=25 °C
0.0
0.5
1.0
1.5
2.0
23456
SUPPLY VOLTAGE : VDD[V]
SHORT CIRCUIT CURRENT :
ISC[A]
Ta=25 °C
Fig.46 Output current at shortcircuit
0.0
0.5
1.0
1.5
2.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
SHORT CIRCUIT CURRENT :
ISC[A]
VDD=5.0V
Fig.47 Output current at shortcircuit
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
9/18
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Fig.52 Output turn on delay time Fig.53 Output turn on delay time
Fig.56 Output turn off delay time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VDD[V]
TURN ON TIME :
TON2 [ms]
Ta=25 °C
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
TURN ON TIME :
TON2 [ms]
VDD=5.0V
Fig.54 Output fall time
Fig.55 Output fall time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VDD[V]
FALL TIME :
TOFF1[μs]
Ta=25 °C
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
FALL TIME :
TOFF1[μs]
VDD=5.0V
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VDD[V]
TURN OFF TIME :
TOFF2 [μs]
Ta=25 °C
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
TURN OFF TIME :
TOFF2 [μs]
VDD=5.0V
Fig.57 Output turn off delay time
2.1
2.2
2.3
2.4
2.5
2.6
2.7
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
UVLO THRESHOLD VOLTAGE :
VTUVH , VTUVL[V]
VTUVH
VTUVL
Fig.58 UVLO threshold voltage
0.0
0.2
0.4
0.6
0.8
1.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
UVLO HYSTERESIS VOLTAGE :
VHYS[V]
Fig.59 UVLO hysteresis voltage
Fig.50 Output rise time
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[]
RISE TIME :
TON1 [ms]
VDD=5.0V
Fig.51 Output rise time
0.0
1.0
2.0
3.0
4.0
5.0
23 456
SUPPLY VOLTAGE : VDD[V]
RISE TIME :
TON1 [ms]
Ta=25 °C
Fig.48 FLAG output delay Fig.49 FLAG output delay
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEM PERATURE : Ta[]
FLAG OUTPUT DELAY :
TDFLAG[ms]
VDD=5.0V
0.0
1.0
2.0
3.0
4.0
5.0
23456
S UPP LY V OL TAG E : VDD[V]
FLAG OUTPUT DELAY :
TDFLAG [ms]
Ta=25 °C
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
10/18
www.rohm.com 2011.05 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
Waveform data (BD6519FJ)
.
VCTRL
(1V/div.)
VFLAG
(1V/div.)
VCTRL
(1V/div.)
VDD=5V
RL=10Ω
CL=147μF
VDD=5V
RL=10Ω
CL=147μF
VFLAG
(1V/div.)
VOUT
(1V/div.)
IOUT
(0.2A/div.)
VOUT
(1V/div.)
IOUT
(0.2A/div.)
VFLAG
(1V/div.)
VOUT
(1V/div.)
IOUT
(0.2A/div.)
TIME(1ms/div.)
Fig.60 Output rise characteristic
TIME(1ms/div.)
Fig.61 Output fall characteristic
TIME(2ms/div.)
Fig.64 Over current response
Ramped load
VDD=5V
TIME (1ms/div.)
Fig.65 Over current response
Enable to shortcircuit
VFLAG
(1V/div.)
VOUT
(1V/div.)
IOUT
(0.5A/div.)
TIME (1ms/div.)
Fig.66 Over current response
Output shortcircuit at Enable
TIME (200ms/div.)
Fig.67 Over current response
Output shortcircuit at Enable
VDD=5V
VOUT
(1V/div.)
IOUT
(0.2A/div.)
VFLAG
(1V/div.)
VDD=5V
CL=100μF
VCTRL
(1V/div.)
VOUT
(1V/div.)
VFLAG
(1V/div.)
IOUT
(0.2A/div.)
VDD=5V
CL=100μF
VOUT
(1V/div.)
VFLAG
(1V/div.)
IOUT
(0.5A/div.)
VDD=5V
CL=100μF
Thermal Shutdown
VCTRL
(5V/div.) VDD=5V
RL=10Ω
VFLAG
(5V/div.)
IOUT
(0.2A/div.)
TIME(0.5ms/div.)
Fig.62 Inrush current characteristic
TIME(20ms/div.)
Fig.63 Over current response
Ramped load
CL=47μF
CL=147μF
CL=220μF
CL=330μF
TIME (10ms/div.)
Fig.68 UVLO
VIN increasing
TIME (10ms/div.)
Fig.69 UVLO
VIN decreasing
VDD
(1V/div.)
VOUT
(1V/div.)
VFLAG
(1V/div.)
IOUT
(0.2A/div.)
VDD
(1V/div.)
VOUT
(1V/div.)
VFLAG
(1V/div.)
IOUT
(0.2A/div.)
RL=10Ω
CL=147μF
RL=10Ω
CL=147μF
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
11/18
www.rohm.com 2011.05 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
Block diagram (BD2041AFJ/2051AFJ)
IN
IN
/OC
EN(/EN)
OUT
OUT
OUT
GND
Charge
pump
Gate logic
TSD
OCD
UVLO
1
2
3
4
8
7
6
5
GND
IN
IN
/OC
OUT
OUT
OUT
Top View
EN(/EN)
Fig.70 Block diagram Fig.71 Pin Configuration
Pin description (BD2041AFJ/2051AFJ)
Pin No. Symbol I / O Pin function
1 GND I Ground.
2, 3 IN I
Power supply input.
Input terminal to the power switch and power supply input terminal of the
internal circuit.
At use, connect each pin outside.
4 EN (/EN) I
Enable input.
Power switch on at Low level. (BD2041AFJ)
Power switch on at High level. (BD2051AFJ)
High level input > 2.0V, Low level input < 0.8V.
5 /OC O
Error flag output.
Low at over current, thermal shutdown.
Open drain output.
6, 7, 8 OUT O Power switch output.
At use, connect each pin outside.
I/O circuit (BD2041AFJ/2051AFJ)
Symbol Pin No Equivalent circuit
EN(/EN) 4
/OC 5
OUT 6,7,8
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
12/18
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Block diagram (BD6519FJ)
VDD
VDD
FLAG
CTRL
OUT
OUT
OUT
GND
Charge
pump
Gate logic
TSD
OCD
UVLO
1
2
3
4
8
7
6
5
GND
VDD
VDD
FLAG
OUT
OUT
OUT
Top View
CTRL
Fig.72 Block diagram Fig.73 Pin Configuration
Pin description (BD6519FJ)
Pin No. Symbol I / O Pin function
1 GND I Ground.
2, 3 VDD I
Power supply input.
Input terminal to the power switch and power supply input terminal of the
internal circuit.
At use, connect each pin outside.
4 CTRL I
Enable input.
Power switch on at Low level. (BD6519FJ)
High level input > 2.5V, Low level input < 0.7V.
5 FLAG O
Error flag output.
Low at over current, thermal shutdown.
Open drain output.
6, 7, 8 OUT O Power switch output.
At use, connect each pin outside.
I/O circuit (BD6519FJ)
Symbol Pin No Equivalent circuit
CTRL 4
FLAG 5
OUT 6,7,8
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
13/18
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© 2011 ROHM Co., Ltd. All rights reserved.
Functional description (BD2041AFJ/2051AFJ)
1. Switch operation
IN terminal and OUT terminal are connected to the drain and the source of switch MOSFET respectively. And the IN
terminal is used also as power source input to internal control circuit.
When the switch is turned on from EN/EN control input, IN terminal and OUT terminal are connected by a 80m switch. In
on status, the switch is bidirectional. Therefore, when the potential of OUT terminal is higher than that of IN terminal,
current flows from OUT terminal to IN terminal.
Since a parasitic diode between the drain and the source of switch MOSFET is canceled, in the off status, it is possible to
prevent current from flowing reversely from OUT to IN.
2. Thermal shutdown circuit (TSD)
If over current would continue, the temperature of the IC would increase drastically. If the junction temperature were
beyond 140°C (typ.) in the condition of over current detection, thermal shutdown circuit operates and makes power switch
turn off and outputs error flag (/OC). Then, when the junction temperature decreases lower than 120°C (typ.), power switch
is turned on and error flag (/OC) is cancelled. Unless the fact of the increasing chips temperature is removed or the output
of power switch is turned off, this operation repeats.
The thermal shutdown circuit operates when the switch is on (EN,/EN signal is active).
3. Over current detection (OCD)
The over current detection circuit limits current (ISC) and outputs error flag (/OC) when current flowing in each switch
MOSFET exceeds a specified value. There are three types of response against over current. The over current detection
circuit works when the switch is on (EN,/EN signal is active).
3-1. When the switch is turned on while the output is in shortcircuit status
When the switch is turned on while the output is in shortcircuit status or so, the switch gets in current limit status soon.
3-2. When the output shortcircuits while the switch is on
When the output shortcircuits or large capacity is connected while the switch is on, very large current flows until the
over current limit circuit reacts. When the current detection, limit circuit works, current limitation is carried out.
3-3. When the output current increases gradually
When the output current increases gradually, current limitation does not work until the output current exceeds the over
current detection value. When it exceeds the detection value, current limitation is carried out.
4. Under voltage lockout (UVLO)
UVLO circuit prevents the switch from turning on until the VIN exceeds 2.3V(Typ.). If the VIN drops below 2.2V(Typ.) while
the switch turns on, then UVLO shuts off the power switch. UVLO has hysteresis of a 100mV(Typ).
Under voltage lockout circuit works when the switch is on (EN,/EN signal is active).
5. Error flag (/OC) output
Error flag output is N-MOS open drain output. At detection of over current, thermal shutdown, low level is output.
Over current detection has delay filter. This delay filter prevents instantaneous current detection such as inrush current at
switch on, hot plug from being informed to outside.
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
14/18
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Functional description (BD6519FJ)
1. Switch operation
VDD terminal and OUT terminal are connected to the drain and the source of switch MOSFET respectively. And the VDD
terminal is used also as power source input to internal control circuit.
When the switch is turned on from CTRL control input, VDD terminal and OUT terminal are connected by a 100m switch.
In on status, the switch is bidirectional. Therefore, when the potential of OUT terminal is higher than that of VDD terminal,
current flows from OUT terminal to VDD terminal.
Since a parasitic diode between the drain and the source of switch MOSFET is canceled, in the off status, it is possible to
prevent current from flowing reversely from OUT to VDD.
2. Thermal shutdown circuit (TSD)
If over current would continue, the temperature of the IC would increase drastically. If the junction temperature were
beyond 135°C (typ.) in the condition of over current detection, thermal shutdown circuit operates and makes power switch
turn off and outputs error flag (FALG). Then, when the junction temperature decreases lower than 125°C (typ.), power
switch is turned on and error flag (FLAG) is cancelled. Unless the fact of the increasing chips temperature is removed or
the output of power switch is turned off, this operation repeats.
The thermal shutdown circuit operates when the switch is on (CTRL signal is active).
3. Over current detection (OCD)
The over current detection circuit limits current (ISC) and outputs error flag (FLAG) when current flowing in each switch
MOSFET exceeds a specified value. There are three types of response against over current. The over current detection
circuit works when the switch is on (CTRL signal is active).
3-1. When the switch is turned on while the output is in shortcircuit status
When the switch is turned on while the output is in shortcircuit status or so, the switch gets in current limit status soon.
3-2. When the output shortcircuits while the switch is on
When the output shortcircuits or large capacity is connected while the switch is on, very large current flows until the
over current limit circuit reacts. When the current detection, limit circuit works, current limitation is carried out.
3-3. When the output current increases gradually
When the output current increases gradually, current limitation does not work until the output current exceeds the over
current detection value. When it exceeds the detection value, current limitation is carried out.
4. Under voltage lockout (UVLO)
UVLO circuit prevents the switch from turning on until the VDD exceeds 2.5V(Typ.). If the VDD drops below 2.3V(Typ.)
while the switch turns on, then UVLO shuts off the power switch. UVLO has hysteresis of a 200mV(Typ).
Under voltage lockout circuit works when the switch is on (CTRL signal is active).
5. Error flag (FLAG) output
Error flag output (FLAG) is N-MOS open drain output. At detection of over current, thermal shutdown, low level is output.
Over current detection has delay filter on 2.5ms(Typ.). This delay filter prevents instantaneous current detection such as
inrush current at switch on, hot plug from being informed to outside.
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
15/18
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V/EN
VOUT
IOUT
V/OC
Out
p
ut shortcircuit
Thermal shut down
delay
Fig.74 Over current detection, thermal shutdown timing
(BD2041AFJ/BD6519FJ)
VEN
VOUT
IOUT
V/OC
Out
p
ut shortcircuit
Thermal shut down
delay
Fig.75 Over current detection, thermal shutdown timing
(BD2051AFJ)
IN, EN (/EN), and /OC terminal of BD2041AFJ/BD2051AFJ correspond to VDD, CTRL, and FLAG terminal of BD6519FJ, respectively.
Typical application circuit
IN
OUT
Regulator
OUT
OUT
OUTIN
IN
/
O
C
GND VBUS
D-
D+
GND
USB
Controlle
VBUS
D
-
D+
GND
5V(typ.)
10k~
100k
CL
CIN
-
+
EN
(
/
EN
)
Ferrite
Beads
Ferrite
Beads
Fig.76 Typical application circuit (BD2041AFJ/51AFJ)
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
16/18
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© 2011 ROHM Co., Ltd. All rights reserved.
Application information
When excessive current flows owing to output shortcircuit or so, ringing occurs by inductance of power source line to IC, and
may cause bad influences upon IC actions. In order to avoid this case, connect a bypath capacitor by IN terminal and GND
terminal of IC. 1μF or higher is recommended.
Pull up /OC output by resistance 10k ~ 100k.
Set up value which satisfies the application as CL and Ferrite Beads.
This system connection diagram doesn’t guarantee operating as the application.
The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account
external parts or dispersion of IC including not only static characteristics but also transient characteristics.
IN, EN (/EN), and /OC terminal of BD2041AFJ/BD2051AFJ correspond to VDD, CTRL, and FLAG terminal of BD6519FJ, respectively.
Power dissipation character
(SOP-J8)
Fig.77 Power dissipation curve (Pd-Ta Curve)
Notes for use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any
special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety
measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected.
The electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown
due to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply
terminal.
0
100
200
300
400
500
600
0 25 50 75 100 125 150
AMBIENT TEMPERATURE: Ta []
POWER DISSIPATION: Pd[mW]
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
17/18
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© 2011 ROHM Co., Ltd. All rights reserved.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard,
for the digital block power supply and the analog block power supply, even though these power supplies has the same
level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing
the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns.
For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At
the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to
be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the
constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can
break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between
the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig.
After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition,
for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the
transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the
input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a
voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to
the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is
applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of
electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
(12) Thermal shutdown circuit (TSD)
When junction temperatures become detected temperatures or higher, the thermal shutdown circuit operates and turns a
switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible,
is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit
operating or use the LSI assuming its operation.
(13) Thermal design
Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual
states of use.
BD2041AFJ,BD2051AFJ,BD6519FJ
Technical Note
18/18
www.rohm.com 2011.05 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
Ordering part number
B D 6 5 1 9 F J - E 2
Part No. Part No.
2041A
2051A
6519
Package
FJ: SOP-J8
Packaging and forming specification
E2: Embossed tape and reel
(SOP-J8)
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP-J8
4°+6°
4°
0.2±0.1
0.45MIN
234
5678
1
4.9±0.2
0.545
3.9±0.2
6.0±0.3
(MAX 5.25 include BURR)
0.42±0.1
1.27
0.175
1.375±0.1
0.1 S
S
R1120
A
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© 2011 ROHM Co., Ltd. All rights reserved.
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The content specied herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specied herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
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