FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7
May 2010
FODM8071
3.3V/5V Logic Gate Output Optocoupler with
High Noise Immunity
Features
■
High noise immunity characterized by common mode
rejection
– 20kV/µs minimum common mode rejection
■
High speed
– 20Mbit/sec date rate (NRZ)
– 55ns max. propagation delay
– 20ns max. pulse width distortion
– 30ns max. propagation delay skew
■
3.3V and 5V CMOS compatibility
■
Specifications guaranteed over 3V to 5.5V supply
voltage and -40°C to +110°C temperature range
■
Safety and regulatory approvals
– UL1577, 3750 VAC
RMS
for 1 min.
– IEC60747-5-2 (pending)
Applications
■
Microprocessor system interface
– SPI, I
2
C
■
Industrial fieldbus communications
– DeviceNet, CAN, RS485
■
Programmable logic control
■
Isolated data acquisition system
■
Voltage level translator
Description
The FODM8071 is a 3.3V/5V high-speed logic gate
output Optocoupler, which supports isolated communi-
cations allowing digital signals to communicate between
systems without conducting ground loops or hazardous
®
This high-speed logic gate output optocoupler, housed in
a compact 5-Pin Mini-Flat package, consists of a high-
speed AlGaAs LED at the input coupled to a CMOS
detector IC at the output. The detector IC comprises an
integrated photodiode, a high-speed transimpedance
amplifier and a voltage comparator with an output driver.
The CMOS technology coupled with a high efficiency
LED achieves low power consumption as well as very
high speed (55ns propagation delay, 20ns pulse width
distortion).
Related Resources
■
www.fairchildsemi.com/products/opto/
■
www.fairchildsemi.com/pf/FO/FOD8001.html
■
www.fairchildsemi.com/pf/FO/FOD0721.html
Functional Schematic
1
3 4
5
6
VO
VDD
GND
ANODE
CATHODE
Truth Table
LED Output
Off High
On Low
voltages. It utilizes Fairchild’s proprietary coplanar pack-
aging technology, Optoplanar , and optimized IC design
to achieve high noise immunity, characterized by high
common mode rejection specifications.
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 2
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Pin Definitions
Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin)
As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for “safe electrical insulation” only within the
safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Number Name Function Description
1 ANODE Anode
3CATHODE Cathode
4 GND Output Ground
5V
O
Output Voltage
6V
DD
Output Supply Voltage
Symbol Parameter Min. Typ. Max. Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For rated main voltage < 150Vrms I-IV
For rated main voltage < 300Vrms I-III
Climatic Classification 40/110/21
Pollution Degree (DIN VDE 0110/1.89) 2
CTI Comparative Tracking Index 175
V
PR
Input to Output Test Voltage, Method b,
VIORM x 1.875 = V
PR
, 100% Production Test with
t
m
= 1 sec, Partial Discharge < 5 pC
1060 V
V
PR
Input to Output Test Voltage, Method a,
VIORM x 1.5 = V
PR
, Type and Sample Test with
t
m
= 60 sec, Partial Discharge < 5 pC
848 V
V
IORM
Max Working Insulation Voltage 565 V
peak
V
IOTM
Highest Allowable Over Voltage 4000 V
peak
External Creepage 5.0 mm
External Clearance 5.0 mm
Insulation Thickness 0.5 mm
T
Case
Safety Limit Values, Maximum Values allowed in the event
of a failure, Case Temperature
150
°
C
R
IO
Insulation Resistance at T
STG
,V
IO
= 500V 10
9
Ω
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 3
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Absolute Maximum Ratings
(T
A
= 25ºC unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. .
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Isolation Characteristics
(Apply over all recommended conditions, typical value is measured at T
A
= 25ºC)
Notes:
1.
Derate linearly from 95˚C at a rate of -1.4mW/˚C
2.
Derate linearly from 100˚C at a rate of -3.47mW/˚C.
3.
Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
4. 0.1µF bypass capacitor must be connected between 4 and 6.
5. Device is considered a two terminal device: Pins 1, and 3 are shorted together and Pins 4, 5, and 6 are shorted
together.
6. 3,750 VAC
RMS
for 1 minute duration is equivalent to 4,500 VAC
RMS
for 1 second duration.
Symbol Parameter Value Units
T
STG
Storage Temperature -40 to +125 ºC
T
OPR
Operating Temperature -40 to +110 ºC
T
J
Junction Temperature -40 to +125 ºC
T
SOL
Lead Solder Temperature (Refer to Reflow
Temperature Profile)
260 for 10sec ºC
I
F
Forward Current 20 mA
V
R
Reverse Voltage 5 V
V
DD
Supply Voltage 0 to 6.0 V
V
O
Output Voltage -0.5 to V
DD
+0.5 V
I
O
Average Output Current 10 mA
PD
I
Input Power Dissipation
(1)(3)
40 mW
PD
O
Output Power Dissipation
(2)(3)
70 mW
Symbol Parameter Min. Max. Unit
T
A
Ambient Operating Temperature -40 +110 ºC
V
DD
Supply Voltages
(4)
3.0 5.5 V
V
FL
Logic Low Input Voltage 0 0.8 V
I
FH
Logic High Input Current 5 16 mA
I
OL
Logic Low Output Current 0 7 mA
Symbol Parameter Conditions Min. Typ. Max. Units
V
ISO
Input-Output Isolation Voltage freq = 60Hz, t = 1.0min,
I
I-O
≤
10µA
(5)(6)
3750 Vac
RMS
R
ISO
Isolation Resistance V
I-O
= 500V
(5)
10
11
Ω
C
ISO
Isolation Capacitance V
I-O
= 0V, freq = 1.0MHz
(5)
0.2 pF
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 4
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Electrical Characteristics
(Apply over all recommended conditions)
(T
A
= -40ºC to +110ºC, 3.0V
≤
V
DD
≤
5.5V), unless otherwise specified.
Typical value is measured at T
A
= 25ºC and V
DD
= 3.3V.
Symbol Parameter Test Conditions Min. Typ. Max. Units
INPUT CHARACTERISTICS
V
F
Forward Voltage I
F
= 10mA, Fig. 1 1.05 1.35 1.8 V
BV
R
Input Reverse Breakdown
Voltage
I
R
= 10µA 5 15 V
I
FHL
Threshold Input Current Fig. 2 2.8 5 mA
OUTPUT CHARACTERISTICS
I
DDL
Logic Low Output Supply
Current
V
DD
= 3.3V, I
F
= 10mA, Fig. 3, 5 3.3 4.8 mA
V
DD
= 5.0V, I
F
= 10mA, Fig. 3, 6 4.0 5.0 mA
I
DDH
Logic High Output Supply
Current
V
DD
= 3.3V, I
F
= 0mA, Fig. 4 3.3 4.8 mA
V
DD
= 5.0V, I
F
= 0mA, Fig. 4 4.0 5.0 mA
V
OH
Logic High Output Voltage V
DD
= 3.3V, I
O
= -20µA, I
F
= 0mA V
DD
– 0.1V 3.3 V
V
DD
= 3.3V, I
O
= -4mA, I
F
= 0mA V
DD
– 0.5V 3.1 V
V
DD
= 5.0V, I
O
= -20µA, I
F
= 0mA V
DD
– 0.1V 5.0 V
V
DD
= 5.0V, I
O
= -4mA, I
F = 0mA VDD – 0.5V 4.9 V
VOL Logic Low Output Voltage IO = 20µA, IF = 10mA 0.0027 0.01 V
IO = 4mA, IF = 10mA 0.27 0.8 V
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 5
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Switching Characteristics (Apply over all recommended conditions)
(TA = -40ºC to +110ºC, 3.0V ≤ VDD ≤ 5.5V, IF = 5mA), unless otherwise specified.
Typical value is measured at TA = 25ºC and VDD = 3.3V
Notes:
7. Data rate is based on 10MHz, 50% NRZ pattern with a 50nsec minimum bit time.
8. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between any two units
from the same manufacturing date code that are operated at same case temperature (±5°C), at same operating
conditions, with equal loads (RL = 350Ω and CL = 15pF), and with an input rise time less than 5ns.
9. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of
the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity
at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm,
to assure that the output will remain low.
10.Unloaded dynamic power dissipation is calculated as follows: CPD x VDD x f + IDD + VPD where f is switched
time in MHz.
Symbol Parameter Test Conditions Min. Typ. Max. Units
Date Rate(7) 20 Mbps
tPW Pulse Width 50 ns
tPHL Propagation Delay Time
to Logic Low Output
CL = 15pF, Fig. 7, 8, 12 31 55 ns
tPLH Propagation Delay Time
to Logic High Output
CL = 15pF, Fig. 7, 8, 12 25 55 ns
PWD Pulse Width Distortion,
| tPHL - tPLH|
CL = 15pF, Fig. 9, 10 5.5 20 ns
tPSK Propagation Delay Skew CL = 15pF(8) 30 ns
tROutput Rise Time
(10% to 90%)
Fig. 11, 12 5.8 ns
tFOutput Fall Time
(90% to 10%)
Fig. 11, 12 5.3 ns
| CMH | Common Mode Transient
Immunity at Output High
IF = 0mA, VO > 0.8VDD,
VCM = 1000V, TA = 25ºC,
Fig. 13(9)
20 40 kV/µs
| CML | Common Mode Transient
Immunity at Output Low
IF = 5mA, VO < 0.8V,
VCM = 1000V, TA = 25ºC,
Fig. 13(9)
20 40 kV/µs
CPDO Output Dynamic Power
Dissipation
Capacitance(10)
4pF
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 6
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Typical Performance Curves (Continued)
0.01
0.1
1
10
100
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
V
F
– FORWARD VOLTAGE (V)
I
F
– INPUT FORWARD CURRENT (mA)
I
FHL
– INPUT THRESHOLD CURRENT (mA)
I
DDH
– LOGIC HIGH OUTPUT SUPPLY CURRENT (mA)
T
A
– AMBIENT TEMPERATURE (°C)
T
A
– AMBIENT TEMPERATURE (°C)
TA
= 110°C TA
= 25°C TA
= -40°C
4.0
3.5
3.0
2.5
2.0
-40 -20 0 20 40 60 80 100
Fig. 2 Input Threshold Current vs. Ambient Temperature
V
DD
V
DD
= 3.3V
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-40 -20 0 20 40 60 80 100
Fig 4. Logic High Output Supply Current
vs. Ambient Temperature
I
DDL
– LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
T
A
– AMBIENT TEMPERATURE (°C)
Fig 3. Logic Low Output Supply Current
vs. Ambient Temperature
VDD = 3.3V
VDD = 5.0V
IF = 0mA
2.0
2.5
3.0
3.5
4.0
4.5
-40 -20 0 20 40 60 80 100
VDD = 3.3V
VDD = 5.0V
IF = 10mA
5.0
Fig. 1 Input Forward Current vs. Forward Voltage
= 5.0V
5.5
5.0
4.5
4.0
3.5
3.0
5.0
4.5
4.0
3.5
3.0
2.5
0 2000 4000 6000 8000 10000
Fig. 5 Dynamic Logic Low Output Supply Current
vs. Input Frequency (V
DD
= 3.3V) Fig. 6 Dynamic Logic Low Output Supply Current
vs. Input Frequency (V
DD
= 5.0V)
f – INPUT FREQUENCY (kHz)
TA
= -40°C
Frequency = 10MHz
Duty Cycle = 50%
IF
= 10mA
VDD = 3.3V
TA
= 25°C
TA
= 110°C
0 2000 4000 6000 8000 10000
Frequency = 10MHz
Duty Cycle = 50%
IF
= 10mA
VDD = 5.0V
TA
= 110°C
TA
= -40°C
TA
= 25°C
I
DDL
– DYNAMIC LOGIC LOW OUTPUT
SUPPLY CURRENT (mA)
f – INPUT FREQUENCY (kHz)
I
DDL
– DYNAMIC LOGIC LOW OUTPUT
SUPPLY CURRENT (mA)
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 7
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Typical Performance Curves (Continued)
t
P
– PROPAGATION DELAY (ns)
I
F
– PULSE INPUT CURRENT (mA)
15
12
9
6
3
0
46810121416
Fig 10. Pulse Width Distortion vs Pulse Input Current
VDD = 5.0V
VDD = 3.3V
Frequency = 10MHz
Duty Cycle = 50%
TA
= 25°C
10
15
20
25
30
35
40
45
50
-40 -20 0 20 40 60 80 100
Fig 7. Propagation Delay vs. Ambient Temperature
VDD = 3.3V
VDD = 5.0V
Frequency = 10MHz
Duty Cycle = 50%
F
= 5mA
PHL
t
t
PHL
t
PLH
tPLH
I
10
9
8
7
6
5
4
3
-40 -20 0 20 40 60 80 100
Fig 11. Rise and Fall Time vs. Ambient Temperature
VDD = 3.3V
VDD = 5.0V
tR
tFtR
tF
Frequency = 10MHz
Duty Cycle = 50%
IF
= 5mA
20
15
10
5
0
-5
-40 -20 0 20 40 60 80 100
Fig 9. Pulse Width Distortion vs. Ambient Temperature
VDD = 3.3V
Frequency = 10MHz
Duty Cycle = 50%
IF
= 5mA
VDD = 5.0V
T
A
– AMBIENT TEMPERATURE (°C)
(| t
PHL
– t
PLH
|) – PULSE WIDTH DISTORTION (ns)
(| t
PHL
– t
PLH
|) – PULSE WIDTH DISTORTION (ns)
t
R
, t
F
– RISE, FALL TIME (ns)
T
A
– AMBIENT TEMPERATURE (°C)
T
A
– AMBIENT TEMPERATURE (°C)
t
P
– PROPAGATION DELAY (ns)
I
F
– PULSE INPUT CURRENT (mA)
10
15
20
25
30
35
40
46810121416
Fig 8. Propagation Delay vs. Pulse Input Current
VDD = 3.3V
VDD = 5.0V
tPLH
tPHL
tPLH
tPHL
Frequency = 10MHz
Duty Cycle = 50%
TA
= 25°C
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 8
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Schematics
Figure 12. Test Circuit for Propagation Delay Time, Rise Time and Fall Time
Figure 13. Test Circuit for Instantaneous Common Mode Rejection Voltage
Output
V
O
Monitoring
Node
t
PHL
C
L
= 15pF
R
IN
V
CC
0.1µF
Pulse Gen.
t
f
= tr = 5ns
Z
O
= 50Ω
Input
Monitoring
Node
t
f
t
r
t
PLH
I
F
= 5mA
50%
V
OL
90%
50%
10%
90%
10%
Input
V
OL
Pulse Gen
V
CM
V
CM
CM
H
CM
L
V
FF
V
DD
A
B
I
F
0.1µF
Bypass Output
(Vo)
V
OH
GND
0.8 x V
DD
Switching Pos. (A), IF = 0
Switching Pos. (B), IF = 5mA
0.8V
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 9
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Package Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
Notes:
1. No standard applies to this package.
2. All dimensions are in millimeters.
3. Dimensions are exclusive of burrs, mold flash, and tie bar extrusion.
4. Drawings filesname and revision: MKT-MFP05A.
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 10
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Ordering Information
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
Option Order Entry Identifier Description
No Suffix FODM8071 Mini-Flat 5-pin, shipped in tubes (100 units per tube)
R2 FODM8071R2 Mini-Flat 5-pin, tape and reel (2,500 units per reel)
1
2
6
43 5
Definitions
1Fairchild logo
2Device number
3IEC60747-5-2 (VDE marking)
4 One digit year code, e.g., ‘9’
5Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
M8071
MYYX
V
V
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 11
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Tape and Reel Dimensions
D
D
W
Kt
d
1
0PP
A
P
0
B0
0
2
E
F
W
1
0
Reel Diameter
Devices Per Reel
Max. Component Rotation or Tilt
Cover Tape Thickness
Cover Tape Width
Pocket Hole Diameter
Pocket Dimension
Pocket Location
Sprocket Hole Location
Sprocket Hole Diameter
Sprocket Hole Pitch
Tape Thickness
Pocket Pitch
Tape Width
Symbol
Description
B
d
W
1
D
K
0
1
0
E
A
P
0
P
F
2
D
P
0
0
t
W
330mm (13")
Dimensions (mm)
12.00 +0.30 / -0.10
7.30 ±0.10
10° Max.
2500
1.50 Min.
2.30 ±0.10
0.065 ±0.010
9.20
1.75 ±0.10
8.00 ±0.10
2.00 ±0.10
5.50 ±0.10
4.40 ±0.10
1.50 +0.10 / -0.0
4.00 ±0.10
0.30 ±0.05
2.54 Pitch
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 12
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Reflow Profile
Profile Feature Pb-Free Assembly Profile
Temperature Min. (Tsmin) 150°C
Temperature Max. (Tsmax) 200°C
Time (tS) from (Tsmin to Tsmax) 60–120 seconds
Ramp-up Rate (tL to tP) 3°C/second max.
Liquidous Temperature (TL) 217°C
Time (tL) Maintained Above (TL) 60–150 seconds
Peak Body Package Temperature 260°C +0°C / –5°C
Time (tP) within 5°C of 260°C 30 seconds
Ramp-down Rate (TP to TL) 6°C/second max.
Time 25°C to Peak Temperature 8 minutes max.
Time (seconds)
Temperature (°C)
Time 25°C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsmax
Tsmin
120
Preheat Area
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
240 360
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
FODM8071 Rev. 1.0.7 13
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safety or effectiveness.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com,
under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance,failed
applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customersfromthe
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized FairchildDistributors
are genuine parts, have full traceability, meet Fairchild's quality standards for handling and storage and provide access to Fairchild's full range of up-to-date technical
and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise.
Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global
problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet
Identification
Product Status Definition
Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve the design.
Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
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FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
