LEADLESS CHIP CARRIER Q-TECH CRYSTAL CLOCK OSCILLATORS 1.8 to 15Vdc - 732.4Hz to 125MHz CORPORATION Description Q-Tech's Leadless Chip Carrier crystal oscillators consist of a source clock square wave generator, logic output buffers and/or logic divider stages, and a round AT high-precision quartz crystal built in a ceramic true SMD package. Features * Made in the USA * ECCN: EAR99 * DFARS 252-225-7014 Compliant: Electronic Component Exemption * USML Registration # M17677 * Wide frequency range from 732.4Hz to 125MHz * Available as QPL MIL-PRF-55310/19 (QT66T), /20 (QT62T), and /29 (QT66HCD) * Choice of packages and pin outs * Choice of supply voltages * Choice of output logic options ( CMOS, ACMOS, HCMOS, LVHCMOS, TTL, ECL, PECL, and LVPECL) * AT-Cut crystal * True SMD hermetically sealed package * Tight or custom symmetry available * Low height available * External tuning capacitor option * Fundamental and third overtone designs * Tristate function option D * Four-point crystal mounts * Custom design available tailors to meet customer's needs * Q-Tech does not use pure lead or pure tin in its products * RoHS compliant Applications * Designed to meet today's requirements for all voltage applications * Wide military clock applications * Industrial controls * Microcontroller driver Ordering Information Model # C AC HC T L N R Z = = = = = = = = QTXX -- XX -- D -- XX -- M -- 60.000MHz CMOS +5V to +15V * ACMOS +5V HCMOS +5V TTL +5V LVHCMOS + 3.3V LVHCMOS + 2.5V LVHCMOS + 1.8V Z output Tristate Option D (Left blank if no Tristate) Output frequency 1 3** 4 5 6 9 10 11 12 Screened to MIL-PRF-55310,level B (Left blank if no screening) = = = = = = = = = 100ppm 5ppm 50ppm 25ppm 50ppm 50ppm 100ppm 50ppm 100ppm at at at at at at at at at 0C 0C 0C -20C -55C -55C -55C -40C -40C to +70C to +50C to +70C to +70C to +105C to +125C to +125C to +85C to +85C (*) Please specify supply voltage when ordering CMOS (**) Require an external capacitor For frequency stability vs. temperature options not listed herein, please request a custom part number. For Non-Standard requirements, contact Q-Tech Corporation at Sales@Q-Tech.com Package Information * Package material (Header): 90% AL2O3 , (Metalization): Tungsten * Lead finish: Gold Plated - 50 ~ 80 inches Nickel Underplate - 100 ~ 250 inches * Cover: Kovar, Gold Plated - 60 ~ 90 inches Nickel Underplate - 50 ~ 100 inches With attached Preform - 80% Au, 20% Sn * Package to lid attachment: Seam weld Packaging Options * Standard packaging in anti-static plastic tube * Optional Tape and Reel Other Options Available For An Additional Charge * Solder Dip Sn/Pb 60/40% * P. I. N. D. test * J-leads attached Specifications subject to change without prior notice. Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech.com Leadless Chip Carrier (Revision D, August 2008) (ECO# 9414) 1 LEADLESS CHIP CARRIER CRYSTAL CLOCK OSCILLATORS 1.8 to 15Vdc - 732.4Hz to 125MHz Q-TECH CORPORATION Electrical Characteristics Parameters Output freq. range (Fo) C QT62, 70 732.4Hz -- 15MHz QT71 100kHz -- 15MHz 732.4Hz -- 15MHz QT66 HC AC 732.4Hz -- 85MHz 3.3Vdc 10% 5.0Vdc 10% See Option codes Storage temp. (Tsto) -62C to + 125C Operating temp. (Topr) See Option codes F and Vdd dependent 3 mA max. at 5V up to 5MHz 25 mA max. at 15V up to 15MHz Symmetry (50% of ouput waveform or 1.4Vdc for TTL) 20 mA max. 25 mA max. 35 mA max. 45 mA max. - 45/55% max. Fo < 4MHz 40/60% max. Fo 4MHz (Measured from 10% to 90%) 10ms max. Start-up time (Tstup) Output voltage (Voh/Vol) 1mA typ. at 5V 6.8mA typ. at 15V 0.9 x Vdd min.; 0.1 x Vdd max. Call for details Jitter RMS 1 (at 25C) Aging (at 70C) (*) Z Available in 2.5Vdc (N) or 1.8Vdc (R) Output logic can drive up to 200 pF load with typical 6ns rise & fall times (tr, tf) ECL, PECL, LVPECL are available. Please contact Q-Tech for details. Q-TECH Corporation - 24mA 8 mA VIH 2.2V Oscillation; VIL 0.8V High Impedance 10TTL Fo < 20MHz 6TTL Fo 20MHz 2.4V min.; 0.4V max. -1.6mA / TTL +40A / TTL 8ps typ. - < 40MHz 5ps typ. - 40MHz 15pF // 10k 0.9 x Vdd min.; 0.1 x Vdd max. 4mA . VIH 0.7 x Vdd Oscillation; VIL 0.3 x Vdd High Impedance 15ps typ. - < 40MHz 8ps typ. - 40MHz 5ppm max. first year / 2ppm typ. per year thereafter 10150 W. Jefferson Boulevard, Culver City 90232 Leadless Chip Carrier (Revision D, August 2008) (ECO# 9414) 3 mA max. - 732.4Hz ~ < 500kHz 6 mA max. - 500kHz ~ < 16MHz 10 mA max. - 16MHz ~ < 32MHz 20 mA max. - 32MHz ~ < 60MHz 30 mA max. - 60MHz ~ < 100MHz 40 mA max. - 100MHz ~ 125MHz 15ns max. Fo < 15kHz 6ns max. Fo 15kHz ~ 39.999MHz 3ns max. Fo 40MHz ~ 160 MHz (Measured from 10% to 90% CMOS or from 0.8V to 2.0V TTL) 15pF // 10k Output Load Enable/Disable Tristate function Pin 1 732.4Hz ~ < 16MHz 16MHz ~ < 40MHz 40MHz ~ < 60MHz 60MHz ~ 85MHz 45/55% max. Fo < 12MHz 40/60% max. Fo 12MHz 30ns max. Rise and Fall times (with typical load) Output Current (Ioh/Iol) 732.4Hz -- 125MHz 100kHz -- 125MHz Freq. stability (F/T) Operating supply current (Idd) (No Load) 732.4Hz -- 85MHz 100kHz -- 85MHz 5V ~ 15Vdc 10% Supply voltage (Vdd) L (*) T 732.4Hz -- 85MHz - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech .co m 2 LEADLESS CHIP CARRIER Q-TECH CRYSTAL CLOCK OSCILLATORS 1.8 to 15Vdc - 732.4Hz to 125MHz CORPORATION Package Configuration Versus Pin Connections A B QT62 6 C QT66 1 44 QT70 QT71 40 6 12 D 5 Q-TECH P/N FREQ. D/C S/N 1 40 1 43 36 4 Q-TECH P/N FREQ. D/C S/N 34 10 .085 MAX. (2.16) .500 12 31 .050 .360 SQ. (9.14) (1.27) .650 34 12 (16.51) .440 SQ. (11.18) .040 31 .480 SQ. (12.19) 6 1 44 40 1 40 36 37 6 1 48 .050 22 .085 MAX. (2.16) .300 SQ. (7.62) .040 (1.02) 12 .040 (1.02) 26 Q-TECH P/N FREQ. D/C S/N .560 SQ. (14.22) 43 .050 (1.27) 22 8 4 5 1 28 .025 (.635) (1.02) 10 SQ. 8 .020 (.508) .020 (.508) SQ. 37 .085 MAX. (2.16) .085 MAX. (2.16) .025 (.635) (12.70 Q-TECH P/N FREQ. D/C S/N 1 28 .450 SQ. (11.43) 26 .050 (1.27) .040 (1.02) (1.27) Dimensions are in inches (mm) QT # Conf QT62 A QT70 C QT66 QT71 B D Vcc GND 6 & 12 34 & 40 4 & 10 31 & 37 5 44 4 & 8 22 & 26 Case Output E/D 34 & 40 42 41 44 47 N/A 31 & 37 22 & 26 39 28 32 27 Equivalent MIL-PRF-55310 Configuration /20 = QT62T /19 = QT66T /29 = QT66HCD N/A N/A Please contact factory for pin connections on external capacitor (code 3). Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech.com Leadless Chip Carrier (Revision D, August 2008) (ECO# 9414) 3 LEADLESS CHIP CARRIER Q-TECH CORPORATION Output Waveform (Typical) Tape and Reel TH SYMMETRY = CRYSTAL CLOCK OSCILLATORS 1.8 to 15Vdc - 732.4Hz to 125MHz x 100% T Tr Tf Vdd VOH 1.750.1 o1.5 2.00.1 4.00.1 0.3.005 5.50.1 5 Max 0.5xVdd Bo 0.1xVdd VOL 24.00.3 0.9xVdd GND TH o1.5 Test Circuit T P Ao Ko 26 2.0 o13.00.5 Vdd RL mA + + POWER SUPPLY - 2.5 Vdd OUT OUT E/D GND o801 + 0.1F or 0.01F Vdc - LOAD 6 TTL CL(*) 12pF RL 430 RS 10k 10 TTL 20pF 270 6k CL o1781 or o3301 Typical test circuit for TTL logic. Rs 120 Dimensions are in mm. Tape is compliant to EIA-481-A. (*) CL inclides the loading effect of the oscilloscope probe. Typical test circuit for CMOS logic + mA + Power supply - Vdd Out Vdc - QT# Output 0.1F or E/D GND 0.01F + Ao (mm) Bo (mm) Ko (mm) QT66 16 12.57 12.57 2.54 QT71 16 12.00 12.00 3.00 QT62 10k 15pF (*) P (mm) Ground Tristate Function 20 17 17.30 2.70 The Tristate function on pin 1 has a built-in pull-up resistor typical 50k, so it can be left floating or tied to Vdd without deteriorating the electrical performance. (*) CL includes probe and jig capacitance Reel size Qty per reel (Diameter in mm) (pcs) 178mm 330mm 100 600 178mm 330mm 280 1200 178mm 330mm 280 1200 Frequency vs. Temperature Curve 50 FREQUENCY STABILITY VS. TEMPERATURE QT66T-64.000MHz Frequency Stability (PPM) 40 30 20 10 0 -10 -20 -30 -40 -50 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 Temperature (C) 1_5 2_5 3_5 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 4_5 Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech.com Leadless Chip Carrier (Revision D, August 2008) (ECO# 9414) 4 LEADLESS CHIP CARRIER Q-TECH CRYSTAL CLOCK OSCILLATORS 1.8 to 15Vdc - 732.4Hz to 125MHz CORPORATION Thermal Characteristics The heat transfer model in a hybrid package is described in figure 1. Heat spreading occurs when heat flows into a material layer of increased cross-sectional area. It is adequate to assume that spreading occurs at a 45 angle. The total thermal resistance is calculated by summing the thermal resistances of each material in the thermal path between the device and hybrid case. RT = R1 + R2 + R3 + R4 + R5 D/A epoxy Die D/A epoxy 45 Substrate Hybrid Case R1 R2 Die D/A epoxy The total thermal resistance RT (see figure 2) between the heat source (die) to the hybrid case is the Theta Junction to Case (Theta JC) inC/W. R3 (Figure 1) Substrate R4 D/A epoxy T * Theta junction to case (Theta JC) for this product is 30C/W. * Theta case to ambient (Theta CA) for this part is 100C/W. * Theta Junction to ambient (Theta JA) is 130C/W. R5 Hybrid Case A CA T C T J Die JC Maximum power dissipation PD for this package at 25C is: * PD(max) = (TJ (max) - TA)/Theta JA * With TJ = 175C (Maximum junction temperature of die) * PD(max) = (175 - 25)/130 = 1.15W 45 Heat JA JC (Figure 2) CA Environmental Specifications Q-Tech Standard Screening/QCI (MIL-PRF55310) is available for all of our Leadless Chip Carrier packages. Q-Tech can also customize screening and test procedures to meet your specific requirements. The Leadless Chip Carrier packages are designed and processed to exceed the following test conditions: Environmental Test Temperature cycling Constant acceleration Seal Fine Leak Burn-in Aging Vibration sinusoidal Shock, non operating Thermal shock, non operating Ambient pressure, non operating Resistance to solder heat Moisture resistance Terminal strength Resistance to solvents Solderability Test Conditions MIL-STD-883, Method 1010, Cond. B MIL-STD-883, Method 2001, Cond. A, Y1 MIL-STD-883, Method 1014, Cond. A 160 hours, 125C with load 30 days, 70C, 1.5ppm max MIL-STD-202, Method 204, Cond. D MIL-STD-202, Method 213, Cond. I MIL-STD-202, Method 107, Cond. B MIL-STD-202, 105, Cond. C, 5 minutes dwell time minimum MIL-STD-202, Method 210, Cond. B MIL-STD-202, Method 106 MIL-STD-202, Method 211, Cond. C MIL-STD-202, Method 215 MIL-STD-202, Method 208 Please contact Q-Tech for higher shock requirements Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech.com Leadless Chip Carrier (Revision D, August 2008) (ECO# 9414) 5 LEADLESS CHIP CARRIER Q-TECH CRYSTAL CLOCK OSCILLATORS 1.8 to 15Vdc - 732.4Hz to 125MHz CORPORATION Period Jitter As data rates increase, effects of jitter become critical with its budgets tighter. Jitter is the deviation of a timing event of a signal from its ideal position. Jitter is complex and is composed of both random and deterministic jitter components. Random jitter (RJ) is theoretically unbounded and Gaussian in distribution. Deterministic jitter (DJ) is bounded and does not follow any predictable distribution. DJ is also referred to as systematic jitter. A technique to measure period jitter (RMS) one standard deviation (1) and peak-to-peak jitter in time domain is to use a high sampling rate (>8G samples/s) digitizing oscilloscope. Figure shows an example of peak-to-peak jitter and RMS jitter (1) of a QT66T-24MHz, at 5.0Vdc. Phase Noise and Phase Jitter Integration RMS jitter (1): 8.20ps Peak-to-peak jitter: 70.89ps Phase noise is measured in the frequency domain, and is expressed as a ratio of signal power to noise power measured in a 1Hz bandwidth at an offset frequency from the carrier, e.g. 10Hz, 100Hz, 1kHz, 10kHz, 100kHz, etc. Phase noise measurement is made with an Agilent E5052A Signal Source Analyzer (SSA) with built-in outstanding low-noise DC power supply source. The DC source is floated from the ground and isolated from external noise to ensure accuracy and repeatability. In order to determine the total noise power over a certain frequency range (bandwidth), the time domain must be analyzed in the frequency domain, and then reconstructed in the time domain into an rms value with the unwanted frequencies excluded. This may be done by converting L(f) back to S(f) over the bandwidth of interest, integrating and performing some calculations. L(f) Symbol S (f)=(180/)x2 L(f)df RMS jitter = S (f)/(fosc.360) Definition Integrated single side band phase noise (dBc) Spectral density of phase modulation, also known as RMS phase error (in degrees) Jitter(in seconds) due to phase noise. Note S (f) in degrees. The value of RMS jitter over the bandwidth of interest, e.g. 10kHz to 20MHz, 10Hz to 20MHz, represents 1 standard deviation of phase jitter contributed by the noise in that defined bandwidth. Figure below shows a typical Phase Noise/Phase jitter of a QT66T10M, 5.0Vdc, 24MHz clock at offset frequencies 10Hz to 5MHz, and phase jitter integrated over the bandwidth of 12kHz to 1MHz. QT66T10M, 5.0Vdc, 24MHz Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech.com Leadless Chip Carrier (Revision D, August 2008) (ECO# 9414) 6