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FEATURES DESCRIPTION
Typical Application
21
27
25
22
6
28
1
15
24326
10kW
3kW10kW2 19
20
16
11
20mF
100nF
20mF
100nF +
ROSC
33kW
2200pF
COSC
68kW
RT
3nF
CT
BRAKE
5nF
100nF
23 8 9 10 4 5 7
2nF
2nF
2nF
100nF
10kW
5nF 240W
240W
17
18
14
13
12
3kW
2N3906
100nF
1k
4kW
TO OTHER
CHANNELS
TO OTHER
CHANNELS
10W
2N3904
10W
IRF9350
IRF532
3kW
FROM
HALL
SENSORS
VMOTOR+15V
+5V TO HALL
SENSORS
VREF
0.02
W
RS
TO
MOTOR
0.02
W
RD
REQUIRED
FOR
AVERAGE
CURRENT
SENSING
REQUIRED
FOR BRAKE
AND FAST
REVERSE
100mF
+
UC3625
DIR
QUAD
51kW
VREF
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
Brushless DC Motor Controller
•Drives Power MOSFETs or Power Darlingtons
The UC3625 family of motorcontroller devicesDirectly
integrate most of the functions required forhigh-performance brushless dc motor control into•50-V Open Collector High-Side Drivers
one package. When coupled with external power•Latched Soft Start
MOSFETs or Darlingtons, these devices perform•High-speed Current-Sense Amplifier with Ideal
fixed-frequency PWM motor control in either voltageDiode
or current mode while implementing closed loopspeed control and braking with smart noise rejection,•Pulse-by-Pulse and Average Current Sensing
safe direction reversal, and cross–conduction•Over-Voltage and Under-Voltage Protection
protection.•Direction Latch for Safe Direction Reversal
Although specified for operation from power supplies•Tachometer
between 10 V and 18 V, the UC1625 can control•Trimmed Reference Sources 30 mA
higher voltage power devices with externallevel-shifting components. The UC1625 contains•Programmable Cross-Conduction Protection
fast, high-current push-pull drivers for low-side power•Two-Quadrant and Four-Quadrant Operation
devices and 50-V open-collector outputs forhigh-side power devices or level shifting circuitry.
The UC1625 is characterized for operation over themilitary temperature range of –55°C to 125°C, whilethe UC2625 is characterized from –40°C to 105°Cand the UC3625 is characterized from 0°C to 70°C.(Note: ESD Protection to 2 kV)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
(1)
PWR VCC
RC-OSC
PWM IN
E/A OUT
VCC
SSTART
OV-COAST
QUAD SEL
E/A IN(-)
ISENSE
VREF
H3
SPEED-IN
H2
ISENSE1
ISENSE2
DIR
E/A IN(+)
H1
PDC PUB
RC-BRAKE
TACH-OUT
PUA
PDB
PDA GND
PUC
14
13
12
11
10
9
8
7
6
5
4
3
2
1
15
16
17
18
19
20
21
22
23
24
25
26
27
28
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
VCC 20Supply voltagePwr
20VCC
PWM IN –0.3 to 6E/A IN(+), E/A IN(–) –0.3 to 12
VISENSE1, ISENSE2 –1.3 to 6OV–COAST, DIR, SPEED-IN, SSTART, QUAD SEL –0.3 to 8H1, H2, H3 –0.3 to 12PU Output Voltage –0.3 to 50PU +200 continuousPD ±200 continuousE/A ±10Output Current mAI
SENSE
–10Tach
±10Out
V
REF
–50 continuousOperating Temperature Range UC1625 –55 to 125T
J
Operating Temperature Range UC2625 –40 to 105 °COperating Temperature Range UC3625 0 to 70
(1) Currents are positive into and negative out of the spec-ified terminal.
CONNECTION DIAGRAM
A. This pinout applies to the SOIC (DW), PLCC (Q), and LCC (L) packages (ie. pin 22 has the same function on allpackages.)
2
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ELECTRICAL CHARACTERISTICS
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
ELECTRICAL CHARACTERISTICS:Unless otherwise stated, these specifications apply for: T
A
= 25°C; Pwr V
CC
= V
CC
= 12V; R
OSC
= 20 k Ωto V
REF
; C
OSC
= 2 nF; R
TACH
= 33 k Ω; C
TACH
= 10 nF; and all outputs unloaded. T
A
= T
J
.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Overall
Supply current 14.5 30.0 mAVCC turn-on threshold Over operating range 8.65 8.95 9.45
VVCC turn-off threshold 7.75 8.05 8.55
Overvoltage/Coast
OV-COAST inhibit threshold 1.65 1.75 1.85OV-COAST restart threshold 1.55 1.65 1.75 VOver operating rangeOV-COAST hysteresis 0.05 0.10 0.15OV-COAST input current -10 -1 0 µA
Logic Inputs
H1, H2, H3 low threshold 0.8 1.0 1.2Over operating range VH1, H2, H3 high threshold 1.6 1.9 2.0H1, H2, H3 input current Over operating range, to 0 V -400 -250 -120 µAQUAD SEL, dir thresholds Over operating range 0.8 1.4 2.0 VQUAD SEL hysteresis 70 mVDIR hysteresis 0.6 VQUAD SEL input current -30 50 150
µADIR input current -30 -1 30
PWM Amp/Comparator
E/A IN(+), E/A IN(–) input current To 2.5 V -5.0 -0.1 5.0
µAPWM IN input current To 2.5 V 0 3 30Error amp input offset 0 V < V
COMMON-MODE
< 3 V -10 10 mVError amp voltage gain 70 90 dBE/A OUT range 0.25 3.50 VPull-up current To 0 V -16 -10 -5 µAS
START
Discharge current To 2.5 V 0.1 0.4 3.0 mARestart threshold 0.1 0.2 0.3 V
Current Amp
I
SENSE1
= 0.3 V, I
SENSE2
= 0.5 V toGain 1.75 1.95 2.15 V/V0.7 VLevel shift I
SENSE1
= 0.3 V, I
SENSE2
= 0.3 V 2.4 2.5 2.65Peak current threshold 0.14 0.20 0.26 VI
SENSE1
= 0 V, force I
SENSE2Over current threshold 0.26 0.30 0.36I
SENSE1
, I
SENSE2
input current -850 -320 0To 0 V µAI
SENSE1
, I
SENSE2
offset current ±2±12Range I
SENSE1
, I
SENSE2
-1 2 V
Tachometer/Brake
TACH-OUT high level 4.7 5 5.3Over operating range, 10 k Ωto 2.5
VVTACH-OUT low level 0.2On time 170 220 280 µsOn time change with temp Over operating range 0.1%RC-BRAKE input current To 0 V -4.0 -1.9 mAThreshold to brake, RC-brake Over operating range 0.8 1.0 1.2
VBrake hysteresis, RC-brake 0.09SPEED-IN threshold Over operating range 220 257 290 mV
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UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
ELECTRICAL CHARACTERISTICS (continued)ELECTRICAL CHARACTERISTICS:Unless otherwise stated, these specifications apply for: T
A
= 25°C; Pwr V
CC
= V
CC
= 12V; R
OSC
= 20 k Ωto V
REF
; C
OSC
= 2 nF; R
TACH
= 33 k Ω; C
TACH
= 10 nF; and all outputs unloaded. T
A
= T
J
.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SPEED-IN input current -30 -5 30 µA
Low-Side Drivers
Voh, –1 mA, down from V
CC
1.60 2.1V Voh, –50 mA, down from V
CC
1.75 2.2Over operating range VVol, 1 mA 0.05 0.4Vol, 50 mA 0.36 0.8Rise/fall time 10% to 90% slew time, into 1 nF 50 ns
High-Side Drivers
Vol, 1 mA 0.1 0.4Over operating range VVol, 50 mA 1.0 1.8Leakage current Output voltage = 50 V 25 µAFall time 10% to 90% slew time, 50 mA load 50 ns
Oscillator
40 50 60Frequency kHzOver operating range 35 65
Reference
4.9 5.0 5.1Output voltage VOver operating range 4.7 5.0 5.3Load regulation 0 mA to –20 mA load -40 -5
mVLine regulation 10 V to 18 V V
CC
-10 -1 10Short circuit current Over operating range 50 100 150 mA
Miscellaneous
Output turn-on delay 1
µsOutput turn-off delay 1
4
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Block Diagram
22
26
25 2
Quad Sel
RC-Osc
PWM In
27
28
1
E/A Out
E/A In(+)
E/A In (–)
OSC S Q
R
S
QR
PWM CLOCK
24SSTART
3ISENSE
4ISENSE1
5ISENSE2
19VCC
23OV-Coast
6Dir
7Speed-In
2X
2.5V 250W
2.9V
Q1
10mA
3.1V
9V
DIRECTION
LATCH
0.25V
PWM CLOCK
8H1
9H2
L
QD
L
QD
L
QD
10H3
+5V
+5V
+5V
EDGE
DETECT
ONE
SHOT
21RC-Brake
2k
1V
DIR COAST CHOP QUAD
H2
H1
H3
BRAKE
DECODER
CROSS
CONDUCTION
PROTECTION
LATCHES
18 PUA
17 PUB
16 PUC
14 PDA
13 PDB
12 PDC
15 GND
20 Tach-Out
11 Pwr Vcc
+5V
VREF
5V
REFERENCE
PWM
CLOCK
1.75V
ABS VALUE 0.2V
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
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DEVICE INFORMATION
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME NO.
The position decoder logic translates the Hall signals and the DIR signal to thecorrect driver signals (PUs and PDs). To prevent output stage damage,the signalon DIR is first loaded into a direction latch, then shifted through a two-bit register.As long as SPEED-IN is less than 250 mV, the direction latch is transparent.When SPEED-IN is higher than 250 mV, the direction latch inhibits all changesindirection. SPEED-IN can be connected to TACH-OUT through a filter, so that thedirection latch is only transparent when the motor is spinning slowly, and has toolittle stored energy to damage power devices.Additional circuitry detects when the input and output of the direction latch areDIR, SPEED-IN 6, 7
different, or when the input and output of the shift register are different, andinhibits all output drives during that time. This can be used to allow the motor tocoast to a safe speed before reversing.The shift register ensures that direction can not be changed instantaneously. Theregister is clocked by the PWM oscillator, so the delay between direction changesis always going to be between one and two oscillator periods. At 40 kHz, thiscorresponds to a delay of between 25 µs and 50 µs. Regardless of output stage,25 µs deadtime should be adequate to ensure no overlap cross-conduction.Toggling DIR causes an output pulse on TACH-OUT regardless of motor speed.E/A IN(+) and E/A IN(–) are not internally committed to allow for a wide variety ofuses. They can be connected to the ISENSE, to TACH-OUT through a filter, to anexternal command voltage, to a D/A converter for computer control, or to anotherop amp for more elegant feedback loops. The error amplifier is compensated forunity gain stability, so E/A OUT can be tied to E/A IN(–) for feedback and majorE/A IN(+), E/A IN(–), E/A 1, 28, 27, loop compensation.OUT, PWM IN 26 E/A OUT and PWM In drive the PWM comparator. For voltage-mode PWMsystems, PWM In can be connected to RC-OSC. The PWM comparator clears thePWM latch, commanding the outputs to chop.The error amplifier can be biased off by connecting E/A IN(–) to a higher voltagethan /EA IN(+). When biased off, E/A OUT appears to the application as a resistorto ground. E/A OUT can then be driven by an external amplifier.All thresholds and outputs are referred to the GND pin except for the PD and PUGND 15
outputs.
The three shaft position sensor inputs consist of hysteresis comparators with inputpull-up resistors. Logic thresholds meet TTL specifications and can be driven by5-V CMOS, 12-V CMOS, NMOS, or open-collectors.Connect these inputs to motor shaft position sensors that are positioned 120electrical degrees apart.If noisy signals are expected, zener clamp and filter theseH1, H2, H3 8, 9, 10 inputs with 6-V zeners and an RC filter. Suggested filtering components are 1 k Ωand 2 nF. Edge skew in the filter is not a problem, because sensors normallygenerate modified gray code with only one output changing at a time, but rise andfall times must be shorter than 20 µs for correct tachometer operation. Motors with60 electrical degree position sensor coding can be used if one or two of theposition sensor signals is inverted.The current sense amplifier has a fixed gain of approximately two. It also has abuilt-in level shift of approximately 2.5 V. The signal appearing on ISENSE is:I
SENSE
= 2.5 V + (2 x ABS ( I
SENSE1
- I
SENSE2
) )I
SENSE1
and I
SENSE2
are interchangeable and can be used as differential inputs.The differential signal applied can be as high as ±0.5 V before saturation.If spikes are expected on ISENSE1 or ISENSE2, they are best filtered by acapacitor from ISENSE to ground. Filtering this way allows fast signal inversions tobe correctly processed by the absolute value circuit. The peak-current comparatorISENSE1, ISENSE2,
3, 4, 5 allows the PWM to enter a current-limit mode with current in the windings neverISENSE
exceeding approximately 0.2 V / R
SENSE
. The overcurrent comparator provides afail-safe shutdown in the unlikely case of current exceeding 0.3 V / R
SENSE
. Then,softstart is commanded, and all outputs are turned off until the high currentcondition is removed. It is often essential to use some filter driving ISENSE1 andISENSE2 to reject extreme spikes and to control slew rate. Reasonable startingvalues for filter components might be 250- Ωseries resistors and a 5-nF capacitorbetween ISENSE1 and ISENSE2. Input resistors should be kept small andmatched to maintain gain accuracy.This input can be used as an over-voltage shut-down input, as a coast input, orOV-COAST 23
both. This input can be driven by TTL, 5-V CMOS, or 12-V CMOS.
6
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UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
DEVICE INFORMATION (continued)Terminal Functions (continued)
TERMINAL
I/O DESCRIPTIONNAME NO.
These outputs can drive the gates of N-channel power MOSFETs directly or theycan drive the bases of power Darlingtons if some form of current limiting is used.They are meant to drive low-side power devices in high-current output stages.PDA, PDB, PDC 12, 13, 14 Current available from these pins can peak as high as 0.5 A. These outputsfeature a true totem-pole output stage. Beware of exceeding device powerdissipation limits when using these outputs for high continuous currents. Theseoutputs pull high to turn a “low-side” device on (active high).These outputs are open-collector, high-voltage drivers that are meant to drivehigh-side power devices in high-current output stages.These are active lowoutputs, meaning that these outputs pull low to command a high-side device on.These outputs can drive low-voltage PNP Darlingtons and P-channel MOSFETsPUA, PUB, PUC 16, 17, 18
directly, and can drive any high-voltage device using external charge pumptechniques, transformer signal coupling, cascode level-shift transistors, oropto-isolated drive (high-speed opto devices are recommended). (Seeapplications).
This supply pin carries the current sourced by the PD outputs. When connectingPD outputs directly to the bases of power Darlingtons, the PWR VCC pin can bePWR VCC 11
current limited with a resistor. Darlington outputs can also be "Baker Clamped"with diodes from collectors back to PWR VCC. (See Applications)The device can chop power devices in either of two modes, referred to as“two-quadrant” (Quad Sellow) and “four quadrant” (Quad Sel high). Whentwo-quadrant chopping, the pull-down power devices are chopped by the output ofthe PWM latch while the pull-up drivers remain on. The load chops into onecommutation diode, and except for back-EMF, will exhibit slow discharge currentand faster charge current. Two-quadrant chopping can be more efficient thanQUAD SEL 22
four-quadrant.
When four-quadrant chopping, all power drivers are chopped by the PWM latch,causing the load current to flow into two diodes during chopping. This modeexhibits better control of load current when current is low, and is preferred in servosystems for equal control over acceleration and deceleration. The QUAD SELinput has no effect on operation during braking.Each time the TACH-OUT pulses, the capacitor tied to RC-BRAKE dischargesfrom approximately 3.33 V down to 1.67 V through a resistor. The tachometerpulse width is approximately T = 0.67 R
T
C
T
, where R
T
and C
T
are a resistor andcapacitor from RC-BRAKE to ground. Recommended values for R
T
are 10 k Ωto500 k Ω, and recommended values for C
T
are 1 nF to 100 nF, allowing timesbetween 5 µs and 10 ms. Best accuracy and stability are achieved with values inthe centers of those ranges.RC-BRAKE also has another function. If RC-BRAKE pin is pulled below the brakeRC-BRAKE 21 threshold, the device enters brake mode. This mode consists of turning off allthree high-side devices, enabling all three low-side devices, and disabling thetachometer. The only things that inhibit low-side device operation in braking arelow-supply, exceeding peak current, OV-COAST command, and the PWMcomparator signal. The last of these means that if current sense is implementedsuch that the signal in the current sense amplifier is proportional to brakingcurrent, the low-side devices will brake the motor with current control. (Seeapplications) Simpler current sense connections results in uncontrolled brakingand potential damage to the power devices.The UC3625 can regulate motor current using fixed-frequency pulse widthmodulation (PWM). The RC-OSC pin sets oscillator frequency by means of timingresistor R
OSC
from the RC-OSC pin to VREF and capacitor COSC from RC-OSCto Gnd. Resistors 10 k Ωto 100 k Ωand capacitors 1 nF to 100 nF works the best,but frequency should always be below 500 kHz. Oscillator frequency isapproximately:RC-OSC 25 F = 2/(R
OSC
x C
OSC
)Additional components can be added to this device to cause it to operate as afixed off-time PWM rather than a fixed frequency PWM, using the RC-OSC pin toselect the monostable time constant.The voltage on the RC-OSC pin is normally a ramp of about 1.2 V peak-to-peak,centered at approximately 1.6 V. This ramp can be used for voltage-mode PWMcontrol, or can be used for slope compensation in current-mode control.
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UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
DEVICE INFORMATION (continued)Terminal Functions (continued)
TERMINAL
I/O DESCRIPTIONNAME NO.
Any time that VCC drops below threshold or the sensed current exceeds theover-current threshold, the soft-start latch is set. When set, it turns on a transistorthat pulls down on SSTART. Normally, a capacitor is connected to this pin, andthe transistor will completely discharge the capacitor. A comparator senses whenthe NPN transistor has completely discharged the capacitor, and allows thesoft-start latch to clear when the fault is removed. When the fault is removed, thesoft-start capacitor charges from the on-chip current source.SSTART clamps the output of the error amplifier, not allowing the error amplifierSSTART 24
output voltage to exceed SSTART regardless of input. The ramp on RC-OSC canbe applied to PWM In and compared to E/A OUT. With SSTART discharged below0.2 V and the ramp minimum being approximately 1.0 V, the PWM comparatorkeeps the PWM latch cleared and the outputs off. As SSTART rises, the PWMcomparator begins to duty-cycle modulate the PWM latch until the error amplifierinputs overcome the clamp. This provides for a safe and orderly motor start-upfrom an off or fault condition. A 51-k Ωresister is added between VREF andSSTART to ensure switching.Any change in the H1, H2, or H3 inputs loads data from these inputs into theposition sensor latches. At the same time data is loaded, a fixed-width 5-V pulse istriggered on TACH-OUT. The average value of the voltage on TACH-OUT isdirectly proportional to speed, so this output can be used as a true tachometer forspeed feedback with an external filter or averaging circuit which usually consists ofTACH-OUT 20 a resistor and capacitor.Whenever TACH-OUT is high, the position latches are inhibited, such that duringthe noisiest part of the commutation cycle, additional commutations are notpossible. Although this effectively sets a maximum rotational speed, the maximumspeed can be set above the highest expected speed, preventing falsecommutation and chatter.This device operates with supplies between 10 V and 18 V. Under-voltage lockoutkeeps all outputs off below 7.5 V, insuring that the output transistors never turn onVCC 19 until full drive capability is available. Bypass VCC to ground with an 0.1- µFceramic capacitor. Using a 10- µF electrolytic bypass capacitor as well can bebeneficial in applications with high supply impedance.This pin provides regulated 5 V for driving Hall-effect devices and speed controlcircuitry. VREF reachs 5 V before VCC enables, ensuring that Hall-effect devicesVREF 2 powered from VREF becomes active before the UC3625 drives any output.Although VREF is current limited, operation over 30 mA is not advised. For properperformance VREF should be bypassed with at least a 0.1- µF capacitor to ground.
8
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TYPICAL CHARACTERISTICS
µ
µ
µ
µ
0.001 0.01 0.1
100Hz
1kHz
10kHz
100kHz
1MHz
OscillatorFrequency
µ
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
Oscillator Frequency Tachometer on Timevs vsC
OSC
and R
OSC
RT and CT
Figure 1. Figure 2.
Supply Current Soft-Start Pull-Up Currentvs vsTemperature Temperature
Figure 3. Figure 4.
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APPLICATION INFORMATION
Cross Conduction Prevention
EDGE
FINDER
SHIFT
REG S Q
QR
S Q
QR
PUA
PDA
PULL
DOWN
PULL UP
FROM
DECODER
PWM
CLK
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
The UC3625 inserts delays to prevent cross conduction due to overlapping drive signals. However, somethought must always be given to cross conduction in output stage design because no amount of dead time canprevent fast slewing signals from coupling drive to a power device through a parasitic capacitance.
The UC3625 contains input latches that serve as noise blanking filters. These latches remain transparentthrough any phase of a motor rotation and latch immediately after an input transition is detected. They remainlatched for two cycles of the PWM oscillator. At a PWM oscillator speed of 20 kHz, this corresponds to 50 µs to100 µs of blank time which limits maximum rotational speed to 100 kRPM for a motor with six transitions perrotation or 50 kRPM for a motor with 12 transitions per rotation.
This prevents noise generated in the first 50 µs of a transition from propagating to the output transistors andcausing cross-conduction or chatter.
The UC3625 also contains six flip flops corresponding to the six output drive signals. One of these flip flops isset every time that an output drive signal is turned on, and cleared two PWM oscillator cycles after that drivesignal is turned off. The output of each flip flop is used to inhibit drive to the opposing output (Figure 7 ). In thisway, it is impossible to turn on driver PUA and PDA at the same time. It is also impossible for one of thesedrivers to turn on without the other driver having been off for at least two PWM oscillator clocks.
Figure 7. Cross Conduction Prevention
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Power Stage Design
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
APPLICATION INFORMATION (continued)
The UC3625 is useful in a wide variety of applications, including high-power in robotics and machinery. Thepower output stages used in such equipment can take a number of forms, according to the intendedperformance and purpose of the system. Figure 8 show four different power stages with the advantages anddisadvantages of each.
For high-frequency chopping, fast recovery circulating diodes are essential. Six are required to clamp thewindings. These diodes should have a continuous current rating at least equal to the operating motor current,since diode conduction duty-cycle can be high. For low-voltage systems, Schottky diodes are preferred. Inhigher voltage systems, diodes such as Microsemi UHVP high voltage platinum rectifiers are recommended.
In a pulse-by-pulse current control arrangement, current sensing is done by resistor R
S
, through which thetransistor's currents are passed (Fig. A, B, and C). In these cases, R
D
is not needed. The low-side circulatingdiodes go to ground and the current sense terminals of the UC3625 (I
SENSE1
and I
SENSE2
) are connected to R
Sthrough a differential RC filter. The input bias current of the current sense amplifier causes a common modeoffset voltage to appear at both inputs, so for best accuracy, keep the filter resistors below 2 k Ωand matched.
The current that flows through R
S
is discontinuous because of chopping. It flows during the on time of the powerstage and is zero during the off time. Consequently, the voltage across R
S
consists of a series of pulses,occurring at the PWM frequency, with a peak value indicative of the peak motor current.
To sense average motor current instead of peak current, add another current sense resistor (R
D
in Fig. D) tomeasure current in the low-side circulating diodes, and operate in four quadrant mode (pin 22 high). Thenegative voltage across R
D
is corrected by the absolute value current sense amplifier. Within the limitationsimposed by Table 1 , the circuit of Fig. B can also sense average current.
12
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TO
MOTOR
RS
FIGURE A
TO
MOTOR
RS
FIGURE B
TO
MOTOR
RS
FIGURE C
TO
MOTOR
RS
RD
FIGURE D
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
APPLICATION INFORMATION (continued)
Figure 8. Four Power Stage Designs
Table 1. Imposed limitations for Figure 8
CURRENT SENSESAFE2 QUADRANT 4 QUADRANT POWER REVERSE
Pulse-by-BRAKING
AveragePulse
Figure A Yes No No N0 Yes NoFigure B Yes Yes No In 4-quad mode only Yes YesFigure C Yes Yes Yes In 4-quad mode only Yes NoFigure D Yes Yes Yes In 4-quad mode only Yes Yes
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UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
For drives where speed is critical, P-Channel MOSFETs can be driven by emitter followers as shown in Figure 9 .Here, both the level shift NPN and the PNP must withstand high voltages. A zener diode is used to limitgate-source voltage on the MOSFET. A series gate resistor is not necessary, but always advisable to controlovershoot and ringing.
High-voltage optocouplers can quickly drive high-voltage MOSFETs if a boost supply of at least 10 V greaterthan the motor supply is provided (See Figure 10 ) To protect the MOSFET, the boost supply should not behigher than 18 V above the motor supply.
For under 200-V 2-quadrent applications, a power NPN driven by a small P-Channel MOSFET performs well asa high-side driver as in Figure 11 . A high voltage small-signal NPN is used as a level shift and a high voltagelow-current MOSFET provides drive. Although the NPN will not saturate if used within its limitations, thebase-emitter resistor on the NPN is still the speed limiting component.
Figure 12 shows a power NPN Darlington drive technique using a clamp to prevent deep saturation. By limitingsaturation of the power device, excessive base drive is minimized and turn-off time is kept fairly short. Lack ofbase series resistance also adds to the speed of this approach.
Figure 9. Fast High-Side P-Channel Driver Figure 10. Optocoupled N-Channel High-Side Driver
Figure 11. Power NPN High-Side Driver Figure 12. Power NPN Low-Side Driver
14
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Fast High-Side N-Channel Driver with Transformer Isolation
28
7
1
6
5
4
31
2
6
7
4
8
UC3724N UC3725N
1:2
PUA
33kW
3
+12V
1nF5kW100nF
VMOTOR
TO MOTOR
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
A small pulse transformer can provide excellent isolation between the UC3625 and a high-voltage N-ChannelMOSFET while also coupling gate drive power. In this circuit (shown in Figure 13 ), a UC3724 is used as atransformer driver/encoder that duty-cycle modulates the transformer with a 150-kHz pulse train. The UC3725rectifies this pulse train for gate drive power, demodulates the signal, and drives the gate with over 2-A peakcurrent.
Figure 13. Fast High-Side N-Channel Driver with Transformer Isolation
Both the UC3724 and the UC3725 can operate up to 500 kHz if the pulse transformer is selected appropriately.To raise the operating frequency, either lower the timing resistor of the UC3724 (1 k Ωmin), lower the timingcapacitor of the UC3724 (500 pF min) or both.
If there is significant capacitance between transformer primary and secondary, together with very high outputslew rate, then it may be necessary to add clamp diodes from the transformer primary to 12 V and ground.General purpose small signal switching diodes such as 1N4148 are normally adequate.
The UC3725 also has provisions for MOSFET current limiting. Consult the UC3725 data sheet for moreinformation on implementing this.
15Submit Documentation Feedback
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Computational Truth Table
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
Table 2 shows the outputs of the gate drive and open collector outputs for given hall input codes and directionsignals. Numbers at the top of the columns are pin numbers.
These devices operate with position sensor encoding that has either one or two signals high at a time, never alllow or all high. This coding is sometimes referred to as "120° Coding" because the coding is the same as codingwith position sensors spaced 120 magnetic degrees about the rotor. In response to these position sense signals,only one low-side driver turns on (go high) and one high-side driver turns on (pull low) at any time.
Table 2. Computational Truth Table
INPUTS OUTPUTS
DIR H1 H2 H3 Low-Side High-Side
6 8 9 10 12 13 14 16 17 181 0 0 1 L H L L H H1 0 1 1 L L H L H H1 0 1 0 L L H H L H1 1 1 0 H L L H L H1 1 0 0 H L L H H L1 1 0 1 L H L H H L0 1 0 1 L L H H L H0 1 0 0 L L H L H H0 1 1 0 L H L L H H0 0 1 0 L H L H H L0 0 1 1 H L L H H L0 0 0 1 H L L H L HX 1 1 1 L L L H H HX 0 0 0 L L L H H H
16
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21
27
25
22
6
28
1
15
24326
10kW
3kW10kW2 19
20
16
11
20mF
100nF
20mF
100nF +
ROSC
33kW
2200pF
COSC
68kW
RT
3nF
CT
BRAKE
5nF
100nF
23 8 9 10 4 5 7
2nF
2nF
2nF
100nF
10kW
5nF 240W
240W
17
18
14
13
12
3kW
2N3906
100nF
1k
4kW
TO OTHER
CHANNELS
TO OTHER
CHANNELS
10W
2N3904
10W
IRF9350
IRF532
3kW
FROM
HALL
SENSORS
VMOTOR+15V
+5V TO HALL
SENSORS
VREF
0.02
W
RS
TO
MOTOR
0.02
W
RD
REQUIRED
FOR
AVERAGE
CURRENT
SENSING
REQUIRED
FOR BRAKE
AND FAST
REVERSE
100mF
+
UC3625
DIR
QUAD
51kW
VREF
UC1625
UC2625
UC3625
SLUS353B – NOVEMBER 2003 – REVISED APRIL 2007
Figure 14. 45-V/8-A Brushless DC Motor Drive Circuit
N-Channel power MOSFETs are used for low-side drivers, while P-Channel power MOSFETs are shown forhigh-side drivers. Resistors are used to level shift the UC3625 open-collector outputs, driving emitter followersinto the MOSFET gate. A 12-V zener clamp insures that the MOSFET gate-source voltage never exceeds 12 V.Series 10- Ωgate resistors tame gate reactance, preventing oscillations and minimizing ringing.
The oscillator timing capacitor should be placed close to pins 15 and 25, to keep ground current out of thecapacitor. Ground current in the timing capacitor causes oscillator distortion and slaving to the commutationsignal.
The potentiometer connected to pin 1 controls PWM duty cycle directly, implementing a crude form of speedcontrol. This control is often referred to as "voltage mode" because the potentiometer position sets the averagemotor voltage. This controls speed because steady-state motor speed is closely related to applied voltage.
Pin 20 (Tach-Out) is connected to pin 7 (SPEED IN) through an RC filter, preventing direction reversal while themotor is spinning quickly. In two-quadrant operation, this reversal can cause kinetic energy from the motor to beforced into the power MOSFETs.
A diode in series with the low-side MOSFETs facilitates PWM current control during braking by insuring thatbraking current will not flow backwards through low-side MOSFETs. Dual current-sense resistors givecontinuous current sense, whether braking or running in four-quadrant operation, an unnecessary luxury fortwo-quadrant operation.
The 68-k Ωand 3-nF tachometer components set maximum commutation time at 140 µs. This permits smoothoperation up to 35,000 RPM for four-pole motors, yet gives 140 µs of noise blanking after commutation.
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PACKAGE OPTION ADDENDUM
www.ti.com 24-Jan-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9168901MXA OBSOLETE CDIP J 28 TBD Call TI Call TI Samples Not Available
UC1625J OBSOLETE CDIP J 28 TBD Call TI Call TI Samples Not Available
UC1625J883B OBSOLETE CDIP J 28 TBD Call TI Call TI Samples Not Available
UC1625L OBSOLETE LCCC FK 28 TBD Call TI Call TI Samples Not Available
UC1625L883B OBSOLETE LCCC FK 28 TBD Call TI Call TI Samples Not Available
UC2625DW ACTIVE SOIC DW 28 20 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UC2625DWG4 ACTIVE SOIC DW 28 20 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UC2625DWTR ACTIVE SOIC DW 28 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UC2625DWTRG4 ACTIVE SOIC DW 28 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UC2625N ACTIVE PDIP N 28 13 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Purchase Samples
UC2625NG4 ACTIVE PDIP N 28 13 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Purchase Samples
UC2625Q ACTIVE PLCC FN 28 37 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
UC3625DW ACTIVE SOIC DW 28 20 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UC3625DWG4 ACTIVE SOIC DW 28 20 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Request Free Samples
UC3625DWTR ACTIVE SOIC DW 28 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UC3625DWTRG4 ACTIVE SOIC DW 28 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Purchase Samples
UC3625N ACTIVE PDIP N 28 13 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Request Free Samples
UC3625NG4 ACTIVE PDIP N 28 13 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Request Free Samples
UC3625Q ACTIVE PLCC FN 28 37 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Request Free Samples
PACKAGE OPTION ADDENDUM
www.ti.com 24-Jan-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UC3625QG4 ACTIVE PLCC FN 28 37 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Request Free Samples
UC3625QTR ACTIVE PLCC FN 28 750 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
UC3625QTRG4 ACTIVE PLCC FN 28 750 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1625, UC2625, UC3625 :
•Catalog: UC3625
•Enhanced Product: UC2625-EP
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UC2625DWTR SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
UC3625DWTR SOIC DW 28 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
UC3625QTR PLCC FN 28 750 330.0 24.4 12.95 12.95 5.0 16.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UC2625DWTR SOIC DW 28 1000 367.0 367.0 55.0
UC3625DWTR SOIC DW 28 1000 367.0 367.0 55.0
UC3625QTR PLCC FN 28 750 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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