IRS21844MPBF - International Rectifier

August 9, 2011

IRS21844MPBF

HALF-BRIDGE DRIVER

Features

• Floating channel designed for bootstrap operation

• Fully operational to + 600 V

• Tolerant to negative transient voltage, dV/dt

immune

• Gate drive supply range from 10 V to 20 V

• Undervoltage lockout for both channels

• 3.3 V and 5 V input logic compatible

• Matched propagation delay for both channels

• Logic and power ground +/- 5 V offset

• Lower di/dt gate driver for better noise immunity

• Output source/sink current capability 1.4 A/1.8 A

• Lead free, RoHS compliant

Product Summary

Topology Half-Bridge

VOFFSET 600 V

VOUT 10 V – 20 V

Io+ & I o- (typical) 1.9 A & 2.3 A

ton & toff (typical) 680 ns & 270 ns

Deadtime (typical) 400 ns (RDT = 0 Ω)

5 µs (RDT = 200 kΩ)

Package Options

Typical Connection

MLPQ4x4 16- Leads

(Without 2 leads)

2

IRS21844MPBF

Description

The IRS21844MPBF is a high voltage, high speed power MOSFET and IGBT drivers with dependent high

and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable

ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output,

down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver

cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the

high-side configuration which operates up to 600 V.

Feature Comparison: IRS2181(4)/IRS2183(4)/IRS2184(4)

Qualification Information†

Industrial††

(per JEDEC JESD 47)

Qualification Level Comments: This IC has passed JEDEC’s Industrial

qualification. IR’s Consumer qualification level is

granted by extension of the higher Industrial level.

Moisture Sensitivity Level MLPQ4x4 14L MSL2†††

(per IPC/JEDEC J-STD-020)

Machine Model Class A (+/-100V)

(per JEDEC standard JESD22-A115)

Human Body Model Class 1C (+/-1500V)

(per EIA/JEDEC standard EIA/JESD22-A114)

ESD

Charged Device Model Class III (+/-1000V)

(per JEDEC standard JESD22-C101)

IC Latch-Up Test Class II, Level A

(per JESD78A)

RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/

†† Higher qualification ratings may be available should the user have such requirements. Please

contact your International Rectifier sales representative for further information.

†††

Higher MSL ratings may be available for the specific package types listed here. Please contact your

International Rectifier sales representative for further information.

Part

Input

Logic

Cross-

Conduction

Prevention

logic

Dead-Time

Ground

Pins

Ton/Toff

2181 COM

21814

HIN/LIN

no

none VSS/COM 180/220 ns

2183 Internal 500ns COM

21834

HIN/LIN

yes Programmable 0.4 – 5 us VSS/COM 180/220 ns

2184 Internal 500ns COM

21844

IN/SD

yes Programmable 0.4 – 5 us VSS/COM 680/270 ns

3

IRS21844MPBF

Recommended Operating Conditions

The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used

within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V

differential.

†† Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to –VBS. (Please refer to Design

Tip DT97-3 for more details).

††† HIN and LIN are internally clamped with a 5.2 V zener diode.

Absolute Maximum Ratings

Absolute Maximum Ratings indica

te sustained limits beyond which damage to the device may occur. All

voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation

ratings are measured under board mounted and still air conditions.

Symbol Definition Min Max Units

VB High-side floating absolute voltage -0.3 620

VS High-side floating supply offset voltage VB - 25 VB + 0.3

VHO High-side floating output voltage VS - 0.3 VB + 0.3

VCC Low-side and logic fixed supply voltage -0.3 20†

VLO Low-side output voltage -0.3 VCC + 0.3

DT Programmable deadtime pin voltage VSS -0.3 VCC + 0.3

VIN

Logic input voltage

(

IN

&

SD

)

VSS -0.3 VCC + 0.3

VSS Logic ground VCC - 20 VCC + 0.3

V

dVS/dt Allowable offset supply voltage transient — 50 V/ns

PD Package power dissipation @ TA ≤ 25°C — 2.08 W

RthJA Thermal resistance, junction to ambient — 36 °C/W

TJ Junction temperature — 150

TS Storage temperature -50 150

TL Lead temperature (soldering, 10 seconds) — 300

°C

† All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.

Symbol

Definition Min Max Units

VB High-side floating supply absolute voltage VS + 10 VS + 20

VS High-side floating supply offset voltage (††) 600

VHO High-side floating output voltage VS VB

VCC Low-side and logic fixed supply voltage 10 20

VLO Low-side output voltage 0 VCC

VIN

Logic input voltage

(

IN

&

SD

)

(†††)

VSS VCC

DT Programmable deadtime pin voltage VSS VCC

VSS Logic ground -5 5

V

TA Ambient temperature -40 125 °C

4

IRS21844MPBF

Dynamic Electrical Characteristics

VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.

Symbol Definition Min

Typ

Max

Units

Test Conditions

ton Turn-on propagation delay — 680

900

VS = 0 V

toff Turn-off propagation delay — 270

400

VS = 0 V or 600 V

tsd Shut-down propagation delay — 180

270

MTon Delay matching, HS & LS turn-on — 0 90

MToff Delay matching , HS & LS turn-off — 0 40

t

r Turn-on rise time — 40 60

t

f

Turn-off fall time — 20 35 VS = 0 V

280

400

520

ns

RDT = 0 Ω

DT Deadtime: LO turn-off to HO turn-on (DTLO-HO) &

HO turn-off to LO turn-on (DTHO-LO) 4 5 6 µs RDT = 200 kΩ

— 0 50 RDT = 0 Ω

MDT Deadtime matching DTLO-HO - DTHO-LO — 0 600

ns RDT = 200 kΩ

Static Electrical Characteristics

VBIAS (VCC, VBS) = 15 V, VSS = COM, DT = VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN

parameters are referenced to VSS/COM and are applicable to the respective input leads: IN and SD . The VO,

IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol Definition Min

Typ

Max

Units

Test Conditions

VIH Logic “1” input voltage for HO & logic “0” for LO 2.5

— —

VIL Logic “0” input voltage for HO & logic “1” for LO — — 0.8

VSD,TH+

SD

input positive going threshold

2.5

— —

VSD,TH-

SD

input negative going threshold

— — 0.8

VCC = 10 V to 20 V

VOH High level output voltage, VBIAS - VO — — 1.4 IO = 0 A

VOL Low level output voltage, VO — — 0.2

V

IO = 20 mA

ILK Offset supply leakage current — — 50 VB = VS = 600 V

IQBS Quiescent VBS supply current 20 60 150

µA

IQCC Quiescent VCC supply current 0.4

1.0

1.6 mA VIN = 0 V or 5 V

IIN+ Logic “1” input bias current — 25 60

IN = 5 V,

SD

= 0 V

IIN- Logic “0” input bias current — — 5.0 µA

IN = 0 V,

SD

= 5 V

VCCUV+

VBSUV+

VCC and VBS supply undervoltage positive going

threshold 8.0

8.9

9.8

VCCUV-

VBSUV-

VCC and VBS supply undervoltage negative going

threshold 7.4

8.2

9.0

VCCUVH

VBSUVH Hysteresis 0.3

0.7

—

V

IO+ Output high short circuit pulsed current 1.4

1.9

— VO = 0 V,

PW ≤ 10 µs

IO- Output low short circuit pulsed current 1.8

2.3

—

A VO = 15 V,

PW ≤ 10 µs

5

IRS21844MPBF

Functional Block Diagram: IRS21844

6

IRS21844MPBF

Input/Output Pin Equivalent Circuit Diagrams: IRS21844

7

IRS21844MPBF

Lead Definitions

PIN Symbol

Description

1

SD Logic input for shutdown (referenced to VSS)

2 VSS Logic ground

3 DT Programmable deadtime lead, referenced to VSS

4 COM Low-side return

5 LO Low-side gate drive output

6 NC No Connection

7 VCC Low-side and logic fixed supply

8 NC No Connection

9 NC No Connection

10 NC No Connection (removed lead)

11 VS High-side floating supply return

12 HO High-side gate drive output

13 VB High-side floating supply

14 NC No Connection

15 NC No Connection (removed lead)

16 IN Logic input for high-side gate driver output (HO), in phase

Lead Assignments: IRS21844

IRS21844MPBF

16L- MLPQ 4x 4

with 2 leads

removed

= Removed lead

1

2

3

4

5 6 7 8

9

10

11

12

13141516

SD

Vss

DT

COM

VS

HO

NC

IRS21844MPBF

8

IRS21844MPBF

Application Information and Additional Details

SD

Figure 1: Input/Output Timing Diagram Figure 2: Switching Time Waveform Definitions

SD

Figure 3: Shutdown Waveform Definitions Figure 4: Deadtime Waveform Definitions

50%

10%

90%

MT

LO HO

50%

HO

MT

LO

IN (LO)

IN (HO)

Figure 5: Delay Matching Waveform Definitions

9

IRS21844MPBF

10

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11

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12

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13

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14

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15

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16

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17

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18

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19

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20

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21

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22

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23

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24

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Package Details: MLPQ 4x4 -16L

25

IRS21844MPBF

Tape and Reel Details: MLPQ 4x4

26

IRS21844MPBF

Part Marking Information

Ordering Information

Standard Pack

Base Part Number Package Type

Form Quantity

Complete Part Number

Tube/Bulk 92 IRS21844MPBF

IRS21844 MLPQ 4x4-16L

Tape and Reel 3,000 IRS21844MTRPBF

The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no

responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any

infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by

implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are

subject to change without notice. This document supersedes and replaces all information previously supplied.

For technical support, please contact IR’s Technical Assistance Center

http://www.irf.com/technical-info/

WORLD HEADQUARTERS:

233 Kansas St., El Segundo, California 90245

Tel: (310) 252-7105