Freescale Semiconductor, Inc.
Data Sheet: Technical Data
© 2015 Freescale Semiconductor, Inc. All rights reserved.
Rev. 10 of the MC9S08LG32 Series data sheet (covering MC9S08LG32 and MC9S08LG16) has two parts:
• The addendum to revision 9 of the data sheet, immediately following this cover page.
• Revision 9 of the data sheet, following the addendum. The changes described in the addendum have
not been implemented in the specified pages.
MC9S08LG32 Series with Addendum
Covers: MC9S08LG32 and
MC9S08LG16
Document Number: MC9S08LG32
Rev. 10, 04/2015
Freescale Semiconductor, Inc.
Data Sheet Addendum
© 2015 Freescale Semiconductor, Inc. All rights reserved.
This addendum identifies changes to Rev. 9 of the MC9S08LG32 Series data sheet (covering
MC9S08LG32 and MC9S08LG16). The changes described in this addendum have not been
implemented in the specified pages.
1 Add min values for IIC (DC injection current)
In Table 8, “DC Characteristics,” add min values for IIC (row number 14) as follows:
2 Change the max value of tLPO (low power oscillator
period)
In Table 14, “Control Timing,” change the max value of tLPO (row number 2) from 1300 to 1500 µs.
Location: Table 8. DC Characteristics, Page 14
Num C Characteristic Symbol Min Typ1Max Unit
14 D DC injection
current 5, 6, 7
VIN < VSS (min)
VIN > VDD (max)
Single pin limit IIC -0.2 —2mA
Total MCU limit, includes sum of
all stressed pins
-5 —25mA
Location: Table 14. Control Timing, Page 29
Document Number: MC9S08LG32AD
Rev. 0, 04/2015
Addendum to Rev. 9 of the
MC9S08LG32 Series
Covers: MC9S08LG32 and
MC9S08LG16
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08LG32
Rev. 9 , 09/2011
© Freescale Semiconductor, Inc., 2009-2011. All rights reserved.
Freescale reserves the right to change the detail specifications as may be required to permit
improvements in the design of its products.
MC9S08LG32
80-LQFP
Case 917A
14 mm × 14 mm
64-LQFP
Case 840F
10 mm × 10 mm
48-LQFP
Case 932
7 mm × 7mm
Features
• 8-bit HCS08 Central Processor Unit (CPU)
– Up to 40 MHz CPU at 5.5 V to 2.7 V across temperature
range of –40 °C to 85 °C and –40 °C to 105 °C
– HCS08 instruction set with added BGND instruction
– Support for up to 32 interrupt/reset sources
• On-Chip Memory
– 32 KB or 18 KB dual array flash; read/program/erase
over full operating voltage and temperature
– 1984 byte random access memory (RAM)
– Security circuitry to prevent unauthorized access to
RAM and flash contents
• Power-Saving Modes
– Two low-power stop modes (stop2 and stop3)
– Reduced-power wait mode
– Peripheral clock gating register can disable clocks to
unused modules, thereby reducing currents
– Low power On-Chip crystal oscillator (XOSC) that can
be used in low-power modes to provide accurate clock
source to real time counter and LCD controller
–100 s typical wakeup time from stop3 mode
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
38.4 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage; supports
bus frequencies from 1 MHz to 20 MHz.
• System Protection
– COP reset with option to run from dedicated 1 kHz
internal clock or bus clock
– Low-voltage warning with interrupt
– Low-voltage detection with reset
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash and RAM protection
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging and plus two more
breakpoints in On-Chip debug module
– On-Chip in-circuit emulator (ICE) debug module containing
three comparators and nine trigger modes; eight deep FIFO
for storing change-of-flow addresses and event-only data;
debug module supports both tag and force breakpoints
• Peripherals
–LCD — Up to 4 × 41 or 8 × 37 LCD driver with internal
charge pump.
–ADC — Up to 16-channel, 12-bit resolution, 2.5 s
conversion time, automatic compare function, temperature
sensor, internal bandgap reference channel, runs in stop3 and
can wake up the system, fully functional from 5.5 V to 2.7 V
–SCI — Full duplex non-return to zero (NRZ), LIN master
extended break generation, LIN slave extended break
detection, wakeup on active edge
–SPI — Full-duplex or single-wire bidirectional,
double-buffered transmit and receive, master or slave mode,
MSB-first or LSB-first shifting
–IIC — With up to 100 kbps with maximum bus loading,
multi-master operation, programmable slave address,
interrupt driven byte-by-byte data transfer, supports
broadcast mode and 10-bit addressing
–TPMx — One 6 channel and one 2 channel, selectable input
capture, output compare, or buffered edge or center-aligned
PWM on each channel
–MTIM — 8-bit counter with match register,, four clock
sources with prescaler dividers, can be used for periodic
wakeup
–RTC — 8-bit modulus counter with binary or decimal based
prescaler, three clock sources including one external source,
can be used for time base, calendar, or task scheduling
functions
–KBI — One keyboard control module capable of supporting
8 × 8 keyboard matrix
–IRQ — External pin for wakeup from low-power modes
•Input/Output
– 39, 53, or 69 GPIOs
– 8 KBI and 1 IRQ interrupt with selectable polarity
– Hysteresis and configurable pullup device on all input pins,
configurable slew rate and drive strength on all output pins.
• Package Options
– 48-pin LQFP, 64-pin LQFP, and 80-pin LQFP
MC9S08LG32 Series
Covers: MC9S08LG32 and
MC9S08LG16
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor2
Table of Contents
1 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.2 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . .10
2.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .10
2.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .11
2.5 ESD Protection and Latch-Up Immunity . . . . . . . . . . . .12
2.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .17
2.8 External Oscillator (XOSC) Characteristics . . . . . . . . .22
2.9 Internal Clock Source (ICS) Characteristics . . . . . . . . .24
2.10 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .25
2.11 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
2.11.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . .29
2.11.2 TPM Module Timing . . . . . . . . . . . . . . . . . . . . .30
2.11.3 SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
2.12 LCD Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.13 Flash Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .34
2.14 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
2.14.1 Radiated Emissions. . . . . . . . . . . . . . . . . . . . . .35
2.14.2 Conducted Transient Susceptibility . . . . . . . . . .35
3 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
3.1 Device Numbering System . . . . . . . . . . . . . . . . . . . . . .39
4 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.1 Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.1.1 80-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .40
4.1.2 64-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .43
4.1.3 48-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . .46
5 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
List of Figures
Figure 1.MC9S08LG32 Series Block Diagram . . . . . . . . . . . . . . 3
Figure 2.80-Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3.64-Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4.48-Pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5.Typical Low-side Drive (sink) characteristics –
High Drive (PTxDSn = 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 6.Typical Low-side Drive (sink) characteristics –
Low Drive (PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7.Typical High-side Drive (source) characteristics –
High Drive (PTxDSn = 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8.Typical High-side Drive (source) characteristics –
Low Drive (PTxDSn = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9.Typical Run IDD for FBE Mode at 1 MHz. . . . . . . . . . . 19
Figure 10.Typical Run IDD for FBE Mode at 20 MHz . . . . . . . . . 20
Figure 11.Typical Run IDD for FEE Mode at 1 MHz . . . . . . . . . . 20
Figure 12.Typical Run IDD for FEE Mode at 20 MHz . . . . . . . . . 21
Figure 13.Typical Stop2 IDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 14.Typical Stop3 IDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 15.Typical Crystal or Resonator Circuit: High Range and Low
Range/High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 16.Typical Crystal or Resonator Circuit: Low Range/Low
Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 17.Internal Oscillator Deviation from Trimmed Frequency 25
Figure 18.ADC Input Impedance Equivalency Diagram. . . . . . . 26
Figure 19.Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 20.IRQ/KBIPx Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 21.Timer External Clock . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 22.Timer Input Capture Pulse . . . . . . . . . . . . . . . . . . . . . 30
Figure 23.SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . 32
Figure 24.SPI Master Timing (CPHA =1) . . . . . . . . . . . . . . . . . . 32
Figure 25.SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . 33
Figure 26.SPI Slave Timing (CPHA = 1) . . . . . . . . . . . . . . . . . . 33
Figure 27.4 MHz, Positive Polarity Pins 1 – 41 . . . . . . . . . . . . . 36
Figure 28.4 MHz, Positive Polarity Pins 42 – 80 . . . . . . . . . . . . 36
Figure 29.4 MHz, Negative Polarity Pins 1 – 41. . . . . . . . . . . . . 37
Figure 30.4 MHz, Negative Polarity Pins 42 – 80. . . . . . . . . . . . 37
Figure 31.Device Number Example for Auto Parts. . . . . . . . . . . 39
Figure 32.Device Number Example for IMM Parts. . . . . . . . . . . 39
Figure 33.80-pin LQFP Package Drawing
(Case 917A, Doc #98ASS23237W) . . . . . . . . . . . . . . . . . . . . . . 42
Figure 34.64-pin LQFP Package Drawing
(Case 840F, Doc #98ASS23234W) . . . . . . . . . . . . . . . . . . . . . . 45
Figure 35.48-pin LQFP Package Drawing
(Case 932, Doc #98ASH00962A) . . . . . . . . . . . . . . . . . . . . . . . 47
List of Tables
Table 1. MC9S08LG32 Series Features by MCU and Package . 4
Table 2. Pin Availability by Package Pin-Count . . . . . . . . . . . . . . 8
Table 3. Parameter Classifications . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . 11
Table 5. Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. ESD and Latch-Up Test Conditions . . . . . . . . . . . . . . . 12
Table 7. ESD and Latch-Up Protection Characteristics. . . . . . . 13
Table 8. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 9. Supply Current Characteristics. . . . . . . . . . . . . . . . . . 17
Table 10.Oscillator Electrical Specifications
(Temperature Range = –40 C to 105 C Ambient) . . . . . . . . . . 22
Table 11.ICS Frequency Specifications
(Temperature Range = –40 C to 105 C Ambient) . . . . . . . . . . 24
Table 12.12-bit ADC Operating Conditions . . . . . . . . . . . . . . . . 25
Table 13.12-bit ADC Characteristics
(VREFH = VDDAD, VREFL = VSSAD) . . . . . . . . . . . . . . . . . . . . . . . 27
Table 14.Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 15.TPM Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 16.SPI Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 17.LCD Electricals, 3 V Glass . . . . . . . . . . . . . . . . . . . . . 34
Table 18.Flash Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 19.Radiated Emissions, Electric Field . . . . . . . . . . . . . . . 35
Table 20.Conducted Susceptibility, EFT/B . . . . . . . . . . . . . . . . . 35
Table 21.Susceptibility Performance Classification . . . . . . . . . . 38
Table 22.Device Numbering System . . . . . . . . . . . . . . . . . . . . . 38
Table 23.Package Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 24.Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 3
Figure 1. MC9S08LG32 Series Block Diagram
8-BIT KEYBOARD
INTERRUPT (
KBI
)
IIC MODULE (
IIC
)
SERIAL PERIPHERAL
INTERFACE (
SPI
)
USER FLASH B
USER RAM
On-Chip ICE (
ICE
) and
DEBUG MODULE (
DBG
)
(LG32 = 16K BYTES)
HCS08 CORE
CPU
BKGD
INT
BKP
2-CHANNEL TIMER/PWM
(
TPM1
)
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
IRQ LVD
LOW-POWER OSCILLATOR
INTERNAL CLOCK
Source (
ICS
)
SERIAL COMMUNICATIONS
6-CHANNEL TIMER/PWM
(
TPM2
)
V
LL3
(LCD)
V
LL1
V
LL2
V
CAP1
V
CAP2
LCD[44:0]
V
SS
V
DD
VO LTAG E
REGULATOR
USER FLASH A
(LG16 = 2K BYTES)
LCD28/ADC5/TPMCLK
/PTA7
LCD27/ADC4/TPM2CH1/KBI7/
PTA6
LCD25/ADC2/RX2/KBI5/
PTA4
INTERFACE (
SCI1
)
TxD1
RxD1
SS
SPSCK
SCL
SDA
MOSI
MISO
V
SSA
/V
REFL
V
DDA
/V
REFH
XTAL
EXTAL
IRQ
KBI[7:0]
PORT A
RESET
LIQUID CRYSTAL
DISPLAY DRIVER
ANALOG-TO-DIGITAL
CONVERTER (
ADC
)
12-BIT
AD[15:0]
TPM2CH[5:0]
TPMCLK
TPMCLK
LCD24/ADC1/TX2/KBI4/
PTA3
LCD23/ADC0/SDA/
PTA2
LCD22/SCL/
PTA1
LCD21/
PTA0
(LG32 = 16K BYTES)
(LG16 = 16K BYTES)
LCD26/ADC3/TPM2CH0/KBI6/
PTA5
BKGD/MS
TPM1CH[1:0]
COP
Real Time Counter
(
RTC
)
TMRCLK
SERIAL COMMUNICATIONS
INTERFACE (
SCI2
)
TxD2
RxD2
PORT C
EXTAL/
PTF7
XTAL/
PTF6
TPM2CH4/KBI1/MISO
/
PTF4
PORT F
TPM2CH5/KBI0/SS/
PTF3
ADC14/IRQ/TPM1CH1/SPSCK/
PTF2
ADC13/TPM1CH0/RX1/
PTF1
ADC12/TPM2CH2/KBI3/TX1/
PTF0
TPM2CH3/KBI2/MOSI/
PTF5
SPSCK/SDA/TPM2CH1/
PTI4
PORT I
MOSI/TPM2CH2/
PTI3
MISO/TPM2CH3/
PTI2
TX2/TMRCLK/
PTI1
RX2
/PTI0
SS/SCL/TPM2CH0/
PTI5
PORT D
PORT E
LCD[40:37]
/PTB[7:4]
LCD[32:29]
/PTB[3:0]
LCD[7:0]
/PTD[7:0]
PORT B
LCD[15:8]/
PTE[7:0]
LCD[44:41]/
PTG[7:4]
LCD[36:33]
/PTG[3:0]
PORT G
ADC11/TPM1CH0/KBI3/TX1/
PTH5
ADC10/TPM1CH1/KBI2/RX1/
PTH4
ADC[9:6]/KBI[7:4]/
PTH[3:0]
TPM2CH4/KBI1/
PTH7
ADC15/KBI0/TPM2CH5/
PTH6
PORT H
V
SS2
V
LL3_2
Available only on 80-pin package
Available only on 64-pin and 80-pin package
*/
Default function out of reset
/*
BKGD/MS
/PTC5
RESET
/PTC6
Modulo Timer
(
MTIM
)
1984 BYTES
LCD[20:16]/
PTC[4:0]
MC9S08LG32 Series Data Sheet, Rev. 9
Pin Assignments
Freescale Semiconductor4
1 Pin Assignments
This section shows the pin assignments for the MC9S08LG32 series devices. The priority of functions on a pin is in ascending
order from left to right and bottom to top. Another view of pinouts and function priority is given in Table 2.
Table 1. MC9S08LG32 Series Features by MCU and Package
Feature MC9S08LG32 MC9S08LG16
Flash size (bytes) 32,768 18,432
RAM size (bytes) 1984
Pin quantity 80 64 48 64 48
ADC 16 ch 12 ch 9 ch 12 ch 9 ch
LCD 8 x 37
4 x 41
8 x 29
4 x 33
8 x 21
4 x 25
8 x 29
4 x 33
8 x 21
4 x 25
ICE + DBG yes
ICS yes
IIC yes
IRQ yes
KBI 8 pin
GPIOs 695339 53 39
RTC yes
MTIM yes
SCI1 yes
SCI2 yes
SPI yes
TPM1 channels 2
TPM2 channels 6
XOSC yes
Pin Assignments
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 5
Figure 2. 80-Pin LQFP
NOTE
VREFH/VREFL are internally connected to VDDA/VSSA.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
80-Pin LQFP
PTE0/LCD8
PTE1/LCD9
PTE2/LCD10
PTE3/LCD11
PTE4/LCD12
PTE5/LCD13
PTG0/LCD33
PTG1/LCD34
PTG4/LCD41
PTG5/LCD42
PTG6/LCD43
PTG7/LCD44
VLL3_2
VSS2
PTE6/LCD14
PTE7/LCD15
PTC0/LCD16
PTC1/LCD17
PTC2/LCD18
PTC3/LCD19
PTD7/LCD7
PTD6/LCD6
PTD5/LCD5
PTD4/LCD4
PTD3/LCD3
PTD2/LCD2
PTB3/LCD32
PTB2/LCD31
PTB7/LCD40
PTB6/LCD39
PTB5/LCD38
PTB4/LCD37
PTB1/LCD30
PTB0/LCD29
PTD1/LCD1
PTD0/LCD0
VCAP1
VCAP2
VLL1
VLL2
VLL3
PTF5/MOSI/KBI2/TPM2CH3
PTF4/MISO/KBI1/TPM2CH4
PTI5/TPM2CH0/SCL/SS
PTI4/TPM2CH1/SDA/SPSCK
PTI3/TPM2CH2/MOSI
PTI2/TPM2CH3/MISO
PTI1/TMRCLK/TX2
PTI0/RX2
PTH7/KBI1/TPM2CH4
VSS
VDD
PTF7/EXTAL
PTF6/XTAL
VDDA/VREFH
VSSA/VREFL
PTH6/TPM2CH5/KBI0/ADC15
PTF2/SPSCK/TPM1CH1/IRQ/ADC14
PTF1/RX1/TPM1CH0/ADC13
PTF0/TX1/KBI3/TPM2CH2/ADC12
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
PTC4/LCD20
PTA0/LCD21
PTG2/LCD35
PTG3/LCD36
PTA1/SCL/LCD22
PTA2/SDA/ADC0/LCD23
PTA3/KBI4/TX2/ADC1/LCD24
PTA4/KBI5/RX2/ADC2/LCD25
PTA5/KBI6/TPM2CH0/ADC3/LCD26
PTA6/KBI7/TPM2CH1/ADC4/LCD27
PTA7/TPMCLK/ADC5/LCD28
PTC5/BKGD/MS
PTC6/RESET
PTH0/KBI4/ADC6
PTH1/KBI5/ADC7
PTH2KBI6/ADC8
PTH3/KBI7/ADC9
PTH4/RX1/KBI2/TPM1CH1/ADC10
PTH5/TX1/KBI3/TPM1CH0/ADC11
PTF3/SS/KBI0/TPM2CH5
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
MC9S08LG32 Series Data Sheet, Rev. 9
Pin Assignments
Freescale Semiconductor6
Figure 3. 64-Pin LQFP
NOTE
VREFH/VREFL are internally connected to VDDA/VSSA.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64-Pin LQFP
PTE0/LCD8
PTE1/LCD9
PTE2/LCD10
PTE3/LCD11
PTE4/LCD12
PTE5/LCD13
PTG0/LCD33
PTG1/LCD34
VLL3_2
VSS2
PTE6/LCD14
PTE7/LCD15
PTC0/LCD16
PTC1/LCD17
PTC2/LCD18
PTC3/LCD19
PTD7/LCD7
PTD6/LCD6
PTD5/LCD5
PTD4/LCD4
PTD3/LCD3
PTD2/LCD2
PTB3/LCD32
PTB2/LCD31
PTB1/LCD30
PTB0/LCD29
PTD1/LCD1
PTD0/LCD0
VCAP1
VCAP2
VLL1
VLL2
VLL3
PTF5/MOSI/KBI2/TPM2CH3
PTF4/MISO/KBI1/TPM2CH4
PTI5/TPM2CH0/SCL/SS
PTI4/TPM2CH1/SDA/SPSCK
PTH7/KBI1/TPM2CH4
VSS
VDD
PTF7/EXTAL
PTF6/XTAL
VDDA/VREFH
VSSA/VREFL
PTH6/TPM2CH5/KBI0/ADC15
PTF2/SPSCK/TPM1CH1/IRQ/ADC14
PTF1/RX1/TPM1CH0/ADC13
PTF0/TX1/KBI3/TPM2CH2/ADC12
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
PTC4/LCD20
PTA0/LCD21
PTG2/LCD35
PTG3/LCD36
PTA1/SCL/LCD22
PTA2/SDA/ADC0/LCD23
PTA3/KBI4/TX2/ADC1/LCD24
PTA4/KBI5/RX2/ADC2/LCD25
PTA5/KBI6/TPM2CH0/ADC3/LCD26
PTA6/KBI7/TPM2CH1/ADC4/LCD27
PTA7/TPMCLK/ADC5/LCD28
PTC5/BKGD/MS
PTC6/RESET
PTH4/RX1/KBI2/TPM1CH1/ADC10
PTH5/TX1/KBI3/TPM1CH0/ADC11
PTF3/SS/KBI0/TPM2CH5
Pin Assignments
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 7
Figure 4. 48-Pin LQFP
NOTE
VREFH/VREFL are internally connected to VDDA/VSSA.
PTD0/LCD0
1
2
3
4
5
6
7
8
PTD3/LCD3
VDDA/VREFH
PTF6/XTAL
VDD
VSS
PTF4/MISO/KBI1/TPM2CH4
PTF5/MOSI/KBI2/TPM2CH3
PTA7/TPMCLK/ADC5/LCD28
PTC6/RESET
PTC2/LCD18
PTE7/LCD15
PTC0/LCD16
PTC1/LCD17
31
30
29
28
27
26
14 15 17 18 19
37
3839
13 24
25
36
48
9
10
11
VCAP1
12
VLL2
VSSA/VREFL
20
PTF2/SPSCKS/TPM1CH1/IRQ/ADC14
21
PTF1/RX1/TPM1CH0/ADC13
22 23
PTC5/BKGD/MS
PTE6/LCD14
40
PTE5/LCD13
41
PTE4/LCD12
42
PTE3/LCD11
43
PTD2/LCD2
VCAP2
VLL1
32
33
34
35
PTE1/LCD9
47 46 45
PTE2/LCD10
44
PTD5/LCD5
PTD4/LCD4
VLL3
PTF3/SS/KBI0/TPM2CH5
PTC3/LCD19
48-Pin LQFP
PTD1/LCD1
PTD7/LCD7
PTD6/LCD6
PTA1/SCL/LCD22
PTA2/SDA/ADC0/LCD23
PTA3/KBI4/TX2/ADC1/LCD24
PTA4/KBI5/RX2/ADC2/LCD25
PTA6/KBI7/TPM2CH1/ADC4/LCD27
PTA5/KBI6/TPM2CH0/ADC3/LCD26
PTC4/LCD20
PTA0/LCD21
PTE0/LCD8
PTF0/TX1/KBI3/TPM2CH2/ADC12
16
PTF7/EXTAL
MC9S08LG32 Series Data Sheet, Rev. 9
Pin Assignments
Freescale Semiconductor8
Table 2. Pin Availability by Package Pin-Count
Packages <-- Lowest Priority --> Highest
80 64 48 Port Pin Alt 1 Alt 2 Alt 3 Alt 4
1 1 1 PTD7 LCD7 — — —
2 2 2 PTD6 LCD6 — — —
3 3 3 PTD5 LCD5 — — —
4 4 4 PTD4 LCD4 — — —
5 5 5 PTD3 LCD3 — — —
6 6 6 PTD2 LCD2 — — —
77—PTB3 LCD32 — — —
88—PTB2 LCD31 — — —
9—— PTB7 LCD40 — — —
10 — — PTB6 LCD39 — — —
11 — — PTB5 LCD38 — — —
12 — — PTB4 LCD37 — — —
13 9 — PTB1 LCD30 — — —
14 10 — PTB0 LCD29 — — —
15 11 7 PTD1 LCD1 — — —
16 12 8 PTD0 LCD0 — — —
17 13 9 VCAP1 —— — —
18 14 10 VCAP2 —— — —
19 15 11 VLL1 —— — —
20 16 12 VLL2 —— — —
21 17 13 VLL3 —— — —
22 18 14 PTF5 MOSI KBI2 TPM2CH3 —
23 19 15 PTF4 MISO KBI1 TPM2CH4 —
24 20 — PTI5 TPM2CH0 SCL SS —
25 21 — PTI4 TPM2CH1 SDA SPSCK —
26 — — PTI3 TPM2CH2 MOSI — —
27 — — PTI2 TPM2CH3 MISO — —
28 — — PTI1 TMRCLK TX2 — —
29 — — PTI0 RX2 — — —
30 22 — PTH7 KBI1 TPM2CH4 — —
31 23 16 VSS —— — —
32 24 17 VDD —— — —
33 25 18 PTF7 EXTAL — — —
34 26 19 PTF6 XTAL — — —
35 27 20 VDDA VREFH ———
36 28 21 VSSA VREFL ———
37 29 — PTH6 TPM2CH5 KBI0 ADC15 —
38 30 22 PTF2 SPSCK TPM1CH1 IRQ ADC14
Pin Assignments
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 9
39 31 23 PTF1 RX1 TPM1CH0 ADC13 —
40 32 24 PTF0 TX1 KBI3 TPM2CH2 ADC12
41 33 25 PTF3 SS KBI0 TPM2CH5 —
42 34 — PTH5 TX1 KBI3 TPM1CH0 ADC11
43 35 — PTH4 RX1 KBI2 TPM1CH1 ADC10
44 — — PTH3 KBI7 ADC9 — —
45 — — PTH2 KBI6 ADC8 — —
46 — — PTH1 KBI5 ADC7 — —
47 — — PTH0 KBI4 ADC6 — —
48 36 26 PTC6 RESET ———
49 37 27 PTC5 BKGD/MS — — —
50 38 28 PTA7 TPMCLK ADC5 LCD28 —
51 39 29 PTA6 KBI7 TPM2CH1 ADC4 LCD27
52 40 30 PTA5 KBI6 TPM2CH0 ADC3 LCD26
53 41 31 PTA4 KBI5 RX2 ADC2 LCD25
54 42 32 PTA3 KBI4 TX2 ADC1 LCD24
55 43 33 PTA2 SDA ADC0 LCD23 —
56 44 34 PTA1 SCL LCD22 — —
57 45 — PTG3 LCD36 — — —
58 46 — PTG2 LCD35 — — —
59 47 35 PTA0 LCD21 — — —
60 48 36 PTC4 LCD20 — — —
61 49 37 PTC3 LCD19 — — —
62 50 38 PTC2 LCD18 — — —
63 51 39 PTC1 LCD17 — — —
64 52 40 PTC0 LCD16 — — —
65 53 41 PTE7 LCD15 — — —
66 54 42 PTE6 LCD14 — — —
67 55 — VSS2 —— — —
68 56 — VLL3_2 —— — —
69 — — PTG7 LCD44 — — —
70 — — PTG6 LCD43 — — —
71 — — PTG5 LCD42 — — —
72 — — PTG4 LCD41 — — —
73 57 — PTG1 LCD34 — — —
74 58 — PTG0 LCD33 — — —
75 59 43 PTE5 LCD13 — — —
76 60 44 PTE4 LCD12 — — —
Table 2. Pin Availability by Package Pin-Count (continued)
Packages <-- Lowest Priority --> Highest
80 64 48 Port Pin Alt 1 Alt 2 Alt 3 Alt 4
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor10
2 Electrical Characteristics
2.1 Introduction
This section contains electrical and timing specifications for the MC9S08LG32 series of microcontrollers available at the time
of publication.
2.2 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better
understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate:
NOTE
The classification is shown in the column labeled “C” in the parameter tables where
appropriate.
2.3 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the
limits specified in Table 4 may affect device reliability or cause permanent damage to the device. For functional operating
conditions, refer to the remaining tables in this section.
This device contains circuitry that protects against damage due to high static voltage or electrical fields. However, it is advised
that normal precautions should be taken to avoid application of any voltages higher than maximum-rated voltages to this
high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for
instance, either VSS or VDD) or the programmable pull-up resistor associated with the pin is enabled.
77 61 45 PTE3 LCD11 — — —
78 62 46 PTE2 LCD10 — — —
79 63 47 PTE1 LCD9 — — —
80 64 48 PTE0 LCD8 — — —
Table 3. Parameter Classifications
PThose parameters are guaranteed during production testing on each individual device.
CThose parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
T
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
DThose parameters are derived mainly from simulations.
Table 2. Pin Availability by Package Pin-Count (continued)
Packages <-- Lowest Priority --> Highest
80 64 48 Port Pin Alt 1 Alt 2 Alt 3 Alt 4
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 11
2.4 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power
dissipation on I/O pins is usually small compared to the power dissipation in On-Chip logic and voltage regulator circuits, and
it is user-determined rather than being controlled by the MCU design. To take PI/O into account in power calculations, determine
the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of
unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small.
The average chip-junction temperature (TJ) in C can be obtained from:
TJ = TA + (PD JA)Eqn. 1
Table 4. Absolute Maximum Ratings
Rating Symbol Value Unit
Supply voltage VDD –0.3 to +5.8 V
Maximum current into VDD IDD 120 mA
Digital input voltage VIn –0.3 to VDD +0.3 V
Instantaneous maximum current
Single pin limit (applies to all port pins)1, 2, 3
1 Input must be current limited to the value specified. To determine the value of the required
current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp
voltages and use the largest of the two resistance values.
2All functional non-supply pins are internally clamped to VSS and VDD.
3Power supply must maintain regulation within operating VDD range during instantaneous and
operating maximum current conditions. If positive injection current (VIn > VDD) is greater than
IDD, the injection current may flow out of VDD and could result in an external power supply going
out of regulation. Ensure that the external VDD load will shunt current greater than maximum
injection current, this will be of greater risk when the MCU is not consuming power. For instance,
if no system clock is present, or if the clock rate is very low (which would reduce overall power
consumption).
ID25
2
mA
Storage temperature range Tstg –55 to 150 C
Table 5. Thermal Characteristics
Rating Symbol Value Unit
Operating temperature range
(packaged)
TATL to TH
–40 to +105
C
Maximum junction temperature TJ125 C
Thermal resistance
Single-layer board
80-pin LQFP
64-pin LQFP
48-pin LQFP
JA 61
71
80
C/W
Thermal resistance
Four-layer board
80-pin LQFP
64-pin LQFP
48-pin LQFP
JA 48
52
56
C/W
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor12
where:
TA = Ambient temperature, C
JA = Package thermal resistance, junction-to-ambient, C/W
PD = Pint PI/O
Pint = IDD VDD, Watts — chip internal power
PI/O = Power dissipation on input and output pins — user determined
For most applications, PI/O  Pint and can be neglected. An approximate relationship between PD and TJ (if PI/O is neglected)
is:
PD = K (TJ + 273 C) Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD (TA + 273C) + JA (PD)2Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring PD (at equilibrium)
for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively
for any value of TA.
2.5 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits,
normal handling precautions should be taken to avoid exposure to static discharge. Qualification tests are performed to ensure
that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for automotive grade integrated circuits. During the
device qualification, ESD stresses were performed for the human body model (HBM), the machine model (MM) and the charge
device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless instructed otherwise in the device specification.
Table 6. ESD and Latch-Up Test Conditions
Model Description Symbol Value Unit
Human Body
Model
Series resistance R1 1500
Storage capacitance C 100 pF
Number of pulses per pin — 3 —
Latch-up Minimum input voltage limit — –2.5 V
Maximum input voltage limit — 7.5 V
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 13
2.6 DC Characteristics
This section includes information about power supply requirements and I/O pin characteristics.
Table 7. ESD and Latch-Up Protection Characteristics
No. Rating1
1Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol Min Max Unit
1 Human body model (HBM) VHBM 2500 — V
2 Charge device model (CDM) VCDM 750 — V
3 Latch-up current at TA = 85 CI
LAT 100 — mA
Table 8. DC Characteristics
Num C Characteristic Symbol Min Typ1Max Unit
1 — Operating Voltage — 2.7 — 5.5 V
2 P Output high voltage — Low Drive (PTxDSn = 0)
5 V, ILoad = –2 mA
3 V, ILoad = –0.6 mA
VOH
VDD – 0.8
VDD – 0.8
—
—
—
—
V
Output high voltage — High Drive (PTxDSn = 1) V
5 V, ILoad = –10 mA
3 V, ILoad = –3 mA
VDD – 0.8
VDD – 0.8
—
—
—
—
3 P Output low voltage — Low Drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 0.6 mA
VOL —
—
—
0.8
0.8
V
Output low voltage — High Drive (PTxDSn = 1)
5 V, ILoad = 10 mA
3 V, ILoad = 3 mA
—
—
0.8
0.8
4 P Output high current — Max total IOH for all ports
5 V
3 V
IOHT ——
100
60
mA
5 C Output high current — Max total IOL for all ports
5 V
3 V
IOLT ——
100
60
mA
6 P Bandgap voltage reference VBG —1.225— V
7 P Input high voltage; all digital inputs VIH 0.65 x VDD ——V
8 P Input low voltage; all digital inputs VIL — — 0.35 x VDD V
9 P Input hysteresis; all digital inputs Vhys 0.06 x VDD ——mV
10 P Input leakage current; input only pins2
VIn = VDD or VSS
|IIn|—0.11A
11 P High impedence (off-state) leakage current
VIn = VDD or VSS
|IOZ|—0.11A
12 P Internal pullup resistors3RPU 20 45 65 k
13 P Internal pulldown resistors4RPD 20 45 65 k
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor14
14 D DC injection
current 5, 6, 7
VIN < VSS, VIN >
VDD
Single pin limit IIC ——2mA
Total MCU limit, includes sum of
all stressed pins
——25mA
15 C Input Capacitance, all non-supply pins CIn ——8pF
16 C RAM retention voltage VRAM 2——V
17 P POR rearm voltage VPOR 0.9 1.4 2.0 V
18 D POR rearm time tPOR 10 — — s
19 P Low-voltage detection threshold — high range
VDD falling
VDD rising
VLVD 1
3.9
4.0
4.0
4.1
4.1
4.2
V
20 P Low-voltage detection threshold — low range
VDD falling
VDD rising
VLVD 0
2.48
2.54
2.56
2.62
2.64
2.70
V
21 P Low-voltage warning threshold — high range 1
VDD falling
VDD rising
VLVW 3
4.5
4.6
4.6
4.7
4.7
4.8
V
22 P Low-voltage warning threshold — high range 0
VDD falling
VDD rising
VLVW 2
4.2
4.3
4.3
4.4
4.4
4.5
V
23 P Low-voltage warning threshold — low range 1
VDD falling
VDD rising
VLVW 1
2.84
2.90
2.92
2.98
3.00
3.06
V
24 P Low-voltage warning threshold — low range 0
VDD falling
VDD rising
VLVW 0
2.66
2.72
2.74
2.80
2.82
2.88
V
25 P Low-voltage inhibit reset/recover hysteresis
5 V
3 V
Vhys —
100
60
—mV
1Typical values are measured at 25 C. Characterized, not tested
2Measured with VIn = VDD or VSS.
3Measured with VIn = VSS.
4Measured with VIn = VDD.
5All functional non-supply pins, except for PTC6 are internally clamped to VSS and VDD.
6Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
7Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If the positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure that external VDD load will shunt current greater than maximum
injection current. This will be the greatest risk when the MCU is not consuming power. For instance, if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
Table 8. DC Characteristics (continued)
Num C Characteristic Symbol Min Typ1Max Unit
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 15
Figure 5. Typical Low-side Drive (sink) characteristics – High Drive (PTxDSn = 1)
Figure 6. Typical Low-side Drive (sink) characteristics – Low Drive (PTxDSn = 0)
Figure 7. Typical High-side Drive (source) characteristics – High Drive (PTxDSn = 1)
Typical VOL vs. IOL AT VDD = 5V
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
IOL (mA)
VOL
(v)
Hot (105°C)
Room (25°C)
Cold (-40°C)
Typical VOL vs. IOL AT VDD = 3V
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
0123 45678910111213
IOL (mA)
VOL (v)
Hot ( 105°C)
Room ( 25°C)
Cold (-40°C)
Typical VOL vs. IOL AT VDD
= 5
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
012345
IOL (mA)
VOL (v)
Hot (105°C)
Room (25°C)
Cold ( - 40°C)
Typical VOL vs. IOL AT VDD = 3V
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
0123
IOL (mA)
VOL (v)
Hot (105°C)
Room (25°C)
Cold (-40°C)
Typical VDD - VOH vs. IOH AT VDD
= 5
V
0.0
0.2
0.4
0.6
0.8
0 -1-2-3-4-5-6-7-8-9-10-11-12-13-14-15
IOH (mA)
VDD - VOH (v)
Hot (105°C)
Room (25°C)
Col d (-40°C)
Typical VDD - VOH vs. IOH AT VDD=3V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0 -1-2-3-4-5-6-7-8-9-10-11-12-13
IOH (mA)
VDD
- VOH
(v)
Hot (105°C)
Room (25°C)
Cold (-40°C)
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor16
Figure 8. Typical High-side Drive (source) characteristics – Low Drive (PTxDSn = 0)
Typical VDD - VOH vs. IOH AT VDD = 5V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0 -1-2-3-4-5
IOH (mA)
VDD - VOH (v)
Hot (105°C)
Room (25°C)
Cold (-40°C)
Typical VDD - VOH vs. IOH AT VDD=3V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0 -1-2-3
IOH (mA)
VDD - VOH (v)
Hot (105°C)
Room (25°C)
Cold (-40°C)
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 17
2.7 Supply Current Characteristics
This section includes information about power supply current in various operating modes.
Table 9. Supply Current Characteristics
Num C Parameter Symbol Bus
Freq
VDD
(V) Typ1Max Unit Temp
(C)
1 C Run supply current
FEI mode, all modules on
RIDD 20 MHz 3 16.38 27.85 mA –40 C to 85 C
C28.05 –40 C to105 C
C 1 MHz 1.67 2.84 –40 C to 85 C
C2.87 –40 C to105 C
P 20 MHz 5 16.55 28.14 mA –40 C to 85 C
P28.35 –40 C to105 C
C 1 MHz 1.77 3.01 –40 C to 85 C
C3.05 –40 C to105 C
2 T Run supply current
FEI mode, all modules off
RIDD 20 MHz 3 11.9 20.25 mA –40 C to 85 C
T21.72 –40 C to105 C
T 1 MHz 1.16 1.95 –40 C to 85 C
T1.98 –40 C to105 C
T 20 MHz 5 12.68 21.56 mA –40 C to 85 C
T23.12 –40 C to105 C
T 1 MHz 1.4 2.39 –40 C to 85 C
T2.41 –40 C to105 C
3 T Wait mode supply current
FEI mode, all modules off
WIDD 20 MHz 3 7.9 13.42 mA –40 C to 85 C
T13.59 –40 C to105 C
T 1 MHz 0.88 1.49 –40 C to 85 C
T1.51 –40 C to105 C
P 20 MHz 5 8.13 13.81 mA –40 C to 85 C
P13.98 –40 C to105 C
T 1 MHz 1.12 1.91 –40 C to 85 C
T1.94 –40 C to105 C
4 C Stop2 mode supply current S2IDD n/a 3 1.1 16.0 A –40 C to 85 C
C39.0 –40 C to105 C
P 5 1.2 18.7 A –40 C to 85 C
P46.1 –40 C to105 C
5 C Stop3 mode supply current
No clocks active
S3IDD n/a 3 1.2 22.4 A –40 C to 85 C
C56.2 –40 C to105 C
P 5 1.32 25.5 A –40 C to 85 C
P63.9 –40 C to105 C
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor18
6 T Stop2 adders: RTC using LPO — n/a 3 210 — nA –40 C to 105 C
RTC using low
power crystal
oscillator
4.25 — A
LCD2 with rbias
(Low Gain)
1.23—
LCD2 with rbias
(High Gain)
184—
LCD2 with Cpump 4.053— –40 C to 85 C
RTC using LPO 5 210 — nA –40 C to 105 C
RTC using low
power crystal
oscillator
4.22 — A
LCD2 with rbias
(Low Gain)
1.53—
LCD2 with rbias
(High Gain)
324—
LCD2 with Cpump 7.123— –40 C to 85 C
7 T Stop3 adders: RTC using LPO — n/a 3 210 — nA –40 C to 105 C
RTC using low
power crystal
oscillator
4.75 — A
LCD2 with rbias
(Low Gain)
1.23—
LCD2 with rbias
(High Gain)
184—
LCD2 with Cpump 4.353— –40 C to 85 C
RTC using LPO 5 230 — nA –40 C to 105 C
RTC using low
power crystal
oscillator
4.74 — A
LCD2 with rbias
(Low Gain)
1.53—
LCD2 with rbias
(High Gain)
324—
LCD2 with Cpump 7.493— –40 C to 85 C
Table 9. Supply Current Characteristics (continued)
Num C Parameter Symbol Bus
Freq
VDD
(V) Typ1Max Unit Temp
(C)
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 19
Figure 9. Typical Run IDD for FBE Mode at 1 MHz
8 T Stop3 adders: EREFSTEN = 1 — n/a 3 4.58 — A –40 C to 105 C
IREFSTEN = 1 71.7 —
LVD 94.35 —
EREFSTEN = 1 5 4.61 — A
IREFSTEN = 1 71.69 —
LVD 107.34 —
1Typical values are measured at 25 C. Characterized, not tested.
2LCD configured for Charge Pump Enabled VLL3 connected to VDD.
3This does not include current required for 32 kHz oscillator.
4This is the maximum current when all LCD inputs/outputs are used.
Table 9. Supply Current Characteristics (continued)
Num C Parameter Symbol Bus
Freq
VDD
(V) Typ1Max Unit Temp
(C)
I
DD
V
DD
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor20
Figure 10. Typical Run IDD for FBE Mode at 20 MHz
Figure 11. Typical Run IDD for FEE Mode at 1 MHz
I
DD
V
DD
V
DD
I
DD
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 21
Figure 12. Typical Run IDD for FEE Mode at 20 MHz
Figure 13. Typical Stop2 IDD
V
DD
I
DD
V
DD
I
DD
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor22
Figure 14. Typical Stop3 IDD
2.8 External Oscillator (XOSC) Characteristics
Table 10. Oscillator Electrical Specifications (Temperature Range = –40 C to 105 C Ambient)
Num C Characteristic Symbol Min Typ1Max Unit
1 D Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)
• Low range (RANGE = 0)
• High range (RANGE = 1) FEE or FBE mode2
• High range (RANGE = 1, HGO = 1) BLPE mode
• High range (RANGE = 1, HGO = 0) BLPE mode
flo
fhi
fhi-hgo
fhi-lp
32
1
1
1
—
—
—
—
38.4
5
16
8
kHz
MHz
MHz
MHz
2 D Load capacitors C1
C2
See crystal or resonator
manufacturer’s recommendation.
V
DD
I
DD
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 23
Figure 15. Typical Crystal or Resonator Circuit: High Range and Low Range/High Gain
3 D Feedback resistor
• Low range (32 kHz to 100 kHz)
• High range (1 MHz to 16 MHz)
RF
—
—
10
1
—
—
M
4 D Series resistor
• Low range, low gain (RANGE = 0, HGO = 0)
• Low range, high gain (RANGE = 0, HGO = 1)
RS
0
100
k
5 D Series resistor
• High range, low gain (RANGE = 1, HGO = 0)
• High range, high gain (RANGE = 1, HGO = 1)
8 MHz
4 MHz
1 MHz
RS
—
—
—
0
0
0
0
10
20
k
6 T Crystal start-up time3, 4
• Low range (HGO = 0)
• Low range (HGO = 1)
• High range (HG0 = 0)5
• High range (HG0 = 1)5
tCSTL-LP
tCSTL-HGO
tCSTH-LP
tCSTH-HGO
—
—
—
—
500
3570
4
4
—
—
—
—
ms
7 D Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)
• FEE or FBE mode2
• BLPE mode
fextal
0.03125
0
—
—
5
40
MHz
1Data in Typical column was characterized at 5.0 V, 25 C or is typical recommended value.
2When ICS is configured for FEE or FBE mode, input clock source must be divisible using RDIV to within the range of 31.25 kHz
to 39.0625 kHz.
3This parameter is characterized and not tested on each device.
4Proper PC board layout procedures must be followed to achieve specifications.
54 MHz crystal
Table 10. Oscillator Electrical Specifications (Temperature Range = –40 C to 105 C Ambient) (continued)
Num C Characteristic Symbol Min Typ1Max Unit
XOSC
EXTAL XTAL
Crystal or Resonator
R
S
C2
RF
C1
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor24
Figure 16. Typical Crystal or Resonator Circuit: Low Range/Low Power
2.9 Internal Clock Source (ICS) Characteristics
Table 11. ICS Frequency Specifications (Temperature Range = –40 C to 105 C Ambient)
Num C Characteristic Symbol Min Typ1
1Data in Typical column was characterized at 5.0 V, 25 C or is typical recommended value.
Max Unit
1 P Average internal reference frequency — factory trimmed
at VDD = 5.0 V and temperature = 25 C
fint_ft — 32.768 — kHz
2 C Average internal reference frequency — user trimmed fint_t 31.25 — 39.0625 kHz
3 C Internal reference start-up time tIRST —60100s
4 P DCO output frequency range —
trimmed2
2The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.
Low range (DRS = 00) fdco_t 16 — 20 MHz
P Mid range (DRS = 01) 32 — 40
5 P DCO output frequency2
Reference = 32768 Hz
and
DMX32 = 1
Low range (DRS = 00) fdco_DMX32 — 19.92 — MHz
P Mid range (DRS = 01) — 39.85 —
6 C Resolution of trimmed DCO output frequency at fixed
voltage and temperature (using FTRIM)3
3This parameter is characterized and not tested on each device.
fdco_res_t —0.1 0.2 %fdco
7 C Resolution of trimmed DCO output frequency at fixed
voltage and temperature (not using FTRIM)3
fdco_res_t —0.2 0.4 %fdco
8 P Total deviation of trimmed DCO output frequency over
voltage and temperature
fdco_t —–1.0
to +0.5
2%f
dco
9 C Total deviation of trimmed DCO output frequency over
fixed voltage and temperature range of 0 C to 70 C3
fdco_t —0.5 1%f
dco
10 C FLL acquisition time3, 4
4This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
tAcquire ——1mS
11 C Long term jitter of DCO output clock (averaged over 2 ms
interval)5
5Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in the crystal oscillator frequency increase the CJitter percentage
for a given interval.
CJitter —0.020.2%f
dco
XOSC
EXTAL XTAL
Crystal or Resonator
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 25
Figure 17. Internal Oscillator Deviation from Trimmed Frequency
2.10 ADC Characteristics
Table 12. 12-bit ADC Operating Conditions
Characteristic Conditions Symb Min Typ1Max Unit Comment
Supply voltage Absolute VDDAD 2.7 — 5.5 V —
Delta to VDD
(VDD –V
DDAD)2
VDDAD –100 0 +100 mV —
Ground voltage Delta to VSS
(VSS –V
SSAD)2
VSSAD –100 0 +100 mV —
Ref Voltage
High
—V
REFH ———VV
REFH shorted to
VDDAD
Ref Voltage
Low
—V
REFL ———VV
REFLshorted to
VSSAD
Input Voltage — VADIN VREFL —V
REFH V—
Input
Capacitance
—C
ADIN —4.55.5pF —
20.00
25.00
30.00
35.00
40.00
45.00
50.00
55.00
60.00
65.00
'00000000
'00001101
'00011010
'00100111
'00110100
'01000001
'01001110
'01011011
'01101000
'01110101
'10000010
'10001111
'10011100
'10101001
'10110110
'11000011
'11010000
'11011101
'11101010
'11110111
ICS Trim values
ICS Frequency (khz)
-40°C 25°C 110°C
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor26
Figure 18. ADC Input Impedance Equivalency Diagram
Input
Resistance
—R
ADIN —5 7k—
Analog Source
Resistance
12-bit mode
fADCK > 4MHz
fADCK < 4MHz
RAS
—
—
—
—
2
5
kExternal to MCU
10-bit mode
fADCK > 4MHz
fADCK < 4MHz
—
—
—
—
5
10
8-bit mode (all valid fADCK)——10
ADC
Conversion
Clock Freq.
High Speed (ADLPC = 0) fADCK 0.4 — 8.0 MHz —
Low Power (ADLPC = 1) 0.4 — 4.0
1Typical values assume VDDAD = 5.0 V, Temp = 25 C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2DC potential difference.
Table 12. 12-bit ADC Operating Conditions (continued)
Characteristic Conditions Symb Min Typ1Max Unit Comment
+
–
+
–
V
AS
R
AS
C
AS
V
ADIN
Z
AS
Pad
leakage
due to
input
protection
Z
ADIN
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
R
ADIN
ADC SAR
ENGINE
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
INPUT PIN
R
ADIN
C
ADIN
INPUT PIN
R
ADIN
INPUT PIN
R
ADIN
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 27
Table 13. 12-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD)
Num C Characteristic Conditions Symb Min Typ1Max Unit Comment
1 T Supply Current
ADLPC = 1
ADLSMP = 1
ADCO = 1
—I
DDAD — 195 — A—
2 T Supply Current
ADLPC = 1
ADLSMP = 0
ADCO = 1
—I
DDAD — 347 — A—
3 T Supply Current
ADLPC = 0
ADLSMP = 1
ADCO = 1
—I
DDAD — 407 — A—
4 P Supply Current
ADLPC = 0
ADLSMP = 0
ADCO = 1
—I
DDAD —0.755 1 mA —
5 — Supply Current Stop, Reset, Module Off IDDAD 0.011 1 A—
6PADC
Asynchronous
Clock Source
High Speed (ADLPC=0) fADACK 23.35MHzt
ADACK =
1/fADACK
Low Power (ADLPC=1) 1.25 2 3.3
7 C Conversion
Time (Including
sample time)
Short sample (ADLSMP=0) tADC — 20 — ADCK
cycles
See ADC
chapter in the
LG32
Reference
Manual for
conversion
time variances
Long sample (ADLSMP=1) — 40 —
8 C Sample Time Short sample (ADLSMP=0) tADS — 3.5 — ADCK
cycles
Long sample (ADLSMP=1) — 23.5 —
9TTotal
Unadjusted
Error
12-bit mode ETUE —3.0 — LSB2Includes
quantization
P 10-bit mode — 12.5
T8-bit mode —0.5 1
10 T Differential
Non-Linearity
12-bit mode DNL — 1.75 — LSB2
P 10-bit mode3—0.5 1.0
T8-bit mode
3—0.3 0.5
11 T Integral
Non-Linearity
12-bit mode INL — 1.5 — LSB2
P 10-bit mode — 0.5 1
T8-bit mode —0.3 0.5
12 T Zero-Scale
Error
12-bit mode EZS —1.5 — LSB2VADIN = VSSAD
P 10-bit mode — 0.5 1.5
T8-bit mode —0.5 0.5
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor28
13 T Full-Scale
Error
12-bit mode EFS —1—LSB
2VADIN = VDDAD
P 10-bit mode — 0.5 1
T8-bit mode —0.5 0.5
14 D Quantization
Error
12-bit mode EQ— –1 to 0 — LSB2—
10-bit mode — — 0.5
8-bit mode — — 0.5
15 D Input Leakage
Error
12-bit mode EIL —1—LSB
2Pad leakage4 *
RAS
10-bit mode — 0.2 2.5
8-bit mode — 0.1 1
16 C Temp Sensor
Slope
–40 C to 25 Cm—1.646—mV/C—
25 C to 125C—1.769—
17 C Temp Sensor
Voltage
25 CV
TEMP25 — 701.2 — mV —
1Typical values assume VDDAD = 5.0 V, Temp = 25 C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only
and are not tested in production.
21 LSB = (VREFH – VREFL)/2N
3Monotonicity and no-missing-codes guaranteed in 10-bit and 8-bit modes
4Based on input pad leakage current. Refer to pad electricals.
Table 13. 12-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD) (continued)
Num C Characteristic Conditions Symb Min Typ1Max Unit Comment
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 29
2.11 AC Characteristics
This section describes timing characteristics for each peripheral system.
2.11.1 Control Timing
Figure 19. Reset Timing
Table 14. Control Timing
Num C Rating Symbol Min Typ1
1Typical values are based on characterization data at VDD = 5.0 V, 25 C unless otherwise stated.
Max Unit
1 D Bus frequency (tcyc = 1/fBus)f
Bus dc — 20 MHz
2 D Internal low power oscillator period tLPO 700 — 1300 s
3 D External reset pulse width2
2This is the shortest pulse that is guaranteed to be recognized as a reset pin request.
textrst 100 — — ns
4 D Reset low drive trstdrv 66 x tcyc ——ns
5 D BKGD/MS setup time after issuing background debug
force reset to enter user or BDM modes
tMSSU 500 — — ns
6 D BKGD/MS hold time after issuing background debug
force reset to enter user or BDM modes 3
3To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of tMSH after VDD
rises above VLVD.
tMSH 100 — — s
7 D IRQ pulse width
Asynchronous path2
Synchronous path4
4This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized.
tILIH
tIHIL
100
1.5 x tcyc
—
—
—
—
ns
8 D Keyboard interrupt pulse width
Asynchronous path2
Synchronous path4
tILIH
tIHIL
100
1.5 x tcyc
—
—
—
—
ns
9 C Port rise and fall time — (load = 50 pF)5, 6
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
5Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 C to 105C.
6Except for LCD pins in Open Drain mode.
tRise
tFall
—
—
3
30
—
—
ns
textrst
RESET PIN
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor30
Figure 20. IRQ/KBIPx Timing
2.11.2 TPM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the
optional external source to the timer counter. These synchronizers operate from the current bus rate clock.
Figure 21. Timer External Clock
Figure 22. Timer Input Capture Pulse
Table 15. TPM Input Timing
No. C Function Symbol Min Max Unit
1 D External clock frequency fTCLK 0f
Bus/4 Hz
2 D External clock period tTCLK 4—t
cyc
3 D External clock high time tclkh 1.5 — tcyc
4 D External clock low time tclkl 1.5 — tcyc
5 D Input capture pulse width tICPW 1.5 — tcyc
tIHIL
IRQ/KBIPx
tILIH
IRQ/KBIPx
tTCLK
tclkh
tclkl
TPMCLK
t
ICPW
TPMCHn
t
ICPW
TPMCHn
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 31
2.11.3 SPI Timing
Table 16 and Figure 23 through Figure 26 describe the timing requirements for the SPI system.
Table 16. SPI Timing
No. C Function Symbol Min Max Unit
— D Operating frequency
Master
Slave
fop
fBus/2048
0
fBus/2
fBus/4
Hz
D SPSCK period
Master
Slave
tSPSCK
2
4
2048
—
tcyc
tcyc
D Enable lead time
Master
Slave
tLead
12
1
—
—
tSPSCK
tcyc
D Enable lag time
Master
Slave
tLag
12
1
—
—
tSPSCK
tcyc
D Clock (SPSCK) high or low time
Master
Slave
tWSPSCK
tcyc –30
tcyc – 30
1024 tcyc
—
ns
ns
D Data setup time (inputs)
Master
Slave
tSU
15
15
—
—
ns
ns
D Data hold time (inputs)
Master
Slave
tHI
0
25
—
—
ns
ns
D Slave access time ta—1t
cyc
D Slave MISO disable time tdis —1t
cyc
D Data valid (after SPSCK edge)
Master
Slave
tv
—
—
25
25
ns
ns
D Data hold time (outputs)
Master
Slave
tHO
0
0
—
—
ns
ns
D Rise time
Input
Output
tRI
tRO
—
—
tcyc – 25
25
ns
ns
D Fall time
Input
Output
tFI
tFO
—
—
tcyc – 25
25
ns
ns
1
2
3
4
5
6
7
8
9
10
11
12
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor32
Figure 23. SPI Master Timing (CPHA = 0)
Figure 24. SPI Master Timing (CPHA =1)
SPSCK
(OUTPUT)
SPSCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
SS1
(OUTPUT)
MS BIN2
BIT 6 . . . 1
LSB IN
MSB OUT2LSB OUT
BIT 6 . . . 1
(CPOL = 0)
(CPOL = 1)
NOTES:
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
1. SS output mode (DDS7 = 1, SSOE = 1).
1
2 3
4
56
910
11
12
4
9
SPSCK
(OUTPUT)
SPSCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
MSB IN2
BIT 6 . . . 1
LSB IN
MASTER MSB OUT2MASTER LSB OUT
BIT 6 . . . 1
PORT DATA
(CPOL = 0)
(CPOL = 1)
PORT DATA
SS1
(OUTPUT)
1. SS output mode (DDS7 = 1, SSOE = 1).
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
NOTES:
2
1
12 11 3
4 4 11 12
56
910
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 33
Figure 25. SPI Slave Timing (CPHA = 0)
Figure 26. SPI Slave Timing (CPHA = 1)
SPSCK
(INPUT)
SPSCK
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
SS
(INPUT)
MSB IN
BIT 6 . . . 1
LSB IN
MSB OUT SLAVE LSB OUT
BIT 6 . . . 1
(CPOL = 0)
(CPOL = 1)
NOTE:
SLAVE
SEE
NOTE 1
1. Not defined but normally MSB of character just received.
1
2
3
4
56
7
8
910
11
12
411 12
10
SPSCK
(INPUT)
SPSCK
(INPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
MSB IN
BIT 6 . . . 1
LSB IN
MSB OUT SLAVE LSB OUT
BIT 6 . . . 1
SEE
(CPOL = 0)
(CPOL = 1)
SS
(INPUT)
NOTE:
SLAVE
NOTE 1
1. Not defined but normally LSB of character just received
1
2
3
4
o6
7
c
910
11
12
411 12
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor34
2.12 LCD Specifications
2.13 Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash memory.
Program and erase operations do not require any special power sources other than the normal VDD supply. For more detailed
information about program/erase operations, see the Memory section.
Table 17. LCD Electricals, 3 V Glass
C Characteristic Symbol Min Typ Max Units
D VLL3 Supply Voltage VLL3 2.7 — 5.5 V
D LCD Frame Frequency fFrame 28 30 64 Hz
D LCD Charge Pump Capacitance CLCD —100100 pF
D LCD Bypass Capacitance CBYLCD —100100
D LCD Glass Capacitance Cglass — 2000 8000
Table 18. Flash Characteristics
C Characteristic Symbol Min Typical Max Unit
DSupply voltage for program/erase
–40 C to 85 CV
prog/erase 2.7 5.5 V
D Supply voltage for read operation VRead 2.7 5.5 V
D Internal FCLK frequency1
1 The frequency of this clock is controlled by a software setting.
fFCLK 150 200 kHz
D Internal FCLK period (1/FCLK) tFcyc 56.67s
C Byte program time (random location)2tprog 9t
Fcyc
C Byte program time (burst mode)2tBurst 4t
Fcyc
C Page erase time2
2These values are hardware state machine controlled. User code does not need to count cycles. This information supplied
for calculating approximate time to program and erase.
tPage 4000 tFcyc
C Mass erase time2tMass 20,000 tFcyc
D Byte program current3
3The program and erase currents are additional to the standard run IDD. These values are measured at room temperatures
with VDD = 5.0 V, bus frequency = 4.0 MHz.
RIDDBP —4—mA
D Page erase current3RIDDPE —6—mA
C
Program/erase endurance4
TL to TH = –40 C to + 85 C
T = 25 C
4Typical endurance for flash was evaluated for this product family on the 9S12Dx64. For additional information on how
Freescale defines typical endurance, please refer to Engineering Bulletin EB619, Typical Endurance for Nonvolatile
Memory.
10,000 —
100,000
—
—
cycles
C Data retention5
5Typical data retention values are based on intrinsic capability of the technology measured at high temperature and
de-rated to 25 C using the Arrhenius equation. For additional information on how Freescale defines typical data retention,
please refer to Engineering Bulletin EB618, Typical Data Retention for Nonvolatile Memory.
tD_ret 15 100 — years
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 35
2.14 EMC Performance
Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the MCU resides. Board
design and layout, circuit topology choices, location and characteristics of external components as well as MCU software
operation all play a significant role in EMC performance. The system designer should consult Freescale applications notes such
as AN2321, AN1050, AN1263, AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC
performance.
2.14.1 Radiated Emissions
Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM cell method in accordance
with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed with the microcontroller installed on a
custom EMC evaluation board while running specialized EMC test software. The radiated emissions from the microcontroller
are measured in a TEM cell in two package orientations (North and East).
The maximum radiated RF emissions of the tested configuration in all orientations are less than or equal to the reported
emissions levels.
2.14.2 Conducted Transient Susceptibility
Microcontroller transient conducted susceptibility is measured in accordance with an internal Freescale test method. The
measurement is performed with the microcontroller installed on a custom EMC evaluation board and running specialized EMC
test software designed in compliance with the test method. The conducted susceptibility is determined by injecting the transient
susceptibility signal on each pin of the microcontroller. The transient waveform and injection methodology is based on IEC
61000-4-4 (EFT/B). The transient voltage required to cause performance degradation on any pin in the tested configuration is
greater than or equal to the reported levels unless otherwise indicated by footnotes below Table 20.
Table 19. Radiated Emissions, Electric Field
Parameter Symbol Conditions Frequency fOSC/fBUS
Level1
(Max)
1Data based on qualification test results.
Unit
Radiated emissions,
electric field
VRE_TEM VDD = 5.5
TA = +25 oC
Package type =
80 LQFP
0.15 – 50 MHz 4 MHz crystal
16 MHz bus
10 dBV
50 – 150 MHz 14
150 – 500 MHz 8
500 – 1000 MHz 5
IEC Level L —
SAE Level 2 —
Table 20. Conducted Susceptibility, EFT/B
Parameter Symbol Conditions fOSC/fBUS Result Amplitude1
(Min)
1Data based on qualification test results. Not tested in production.
Unit
Conducted susceptibility, electrical
fast transient/burst (EFT/B)
VCS_EFT VDD = 5.5
TA = +25 oC
Package type = 80-pin LQFP
4 kHz crystal
4 MHz bus
A
B
C
D
>4.02
>4.03
>4.04
>4.0
2Exceptions as covered in footnotes 3 and 4.
kV
MC9S08LG32 Series Data Sheet, Rev. 9
Electrical Characteristics
Freescale Semiconductor36
Individual performance of each pin is shown in Figure 27, Figure 28, Figure 29, and Figure 30.
Figure 27. 4 MHz, Positive Polarity Pins 1 – 41
Figure 28. 4 MHz, Positive Polarity Pins 42 – 80
3Except pins PHT1, PTH2, PTH3, PTH4, PTH5. See figures below for values.
4Except pins PTF3, PTH5, PTH4, PHT0, Reset, and BKGD. See figures below for values.
Note:
RESET retested with 0.1 F capacitor from pin to ground is Class A compliant as shown by 48*.
Electrical Characteristics
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 37
Figure 29. 4 MHz, Negative Polarity Pins 1 – 41
Figure 30. 4 MHz, Negative Polarity Pins 42 – 80
Note:
RESET retested with 0.1 F capacitor from pin to ground is Class A compliant as shown by 48*.
MC9S08LG32 Series Data Sheet, Rev. 9
Ordering Information
Freescale Semiconductor38
The susceptibility performance classification is described in Table 21.
3 Ordering Information
This section contains ordering information for MC9S08LG32 and MC9S08LG16 devices.
Table 21. Susceptibility Performance Classification
Result Performance Criteria
A No failure The MCU performs as designed during and after exposure.
B Self-recovering
failure
The MCU does not perform as designed during exposure. The MCU returns
automatically to normal operation after exposure is removed.
C Soft failure The MCU does not perform as designed during exposure. The MCU does not return to
normal operation until exposure is removed and the RESET pin is asserted.
D Hard failure The MCU does not perform as designed during exposure. The MCU does not return to
normal operation until exposure is removed and the power to the MCU is cycled.
E Damage The MCU does not perform as designed during and after exposure. The MCU cannot
be returned to proper operation due to physical damage or other permanent
performance degradation.
Table 22. Device Numbering System
Device Number1
1See the MC9S08LG32 Reference Manual (document MC9S08LG32RM), for a complete description of modules included on
each device.
Memory
Temperature Range (°C) LCD Mode
Operation Available Packages2
2See Ta bl e 2 3 for package information.
FLASH RAM
Auto
S9S08LG32J0CLK 32 KB 1984 -40 °C to +85 °C Charge Pump 80-pin LQFP
S9S08LG32J0CLH 64-pin LQFP
S9S08LG32J0CLF 48-pin LQFP
S9S08LG32J0VLK 32 KB 1984 -40 °C to +105 °C Register Bias 80-pin LQFP
S9S08LG32J0VLH 64-pin LQFP
S9S08LG32J0VLF 48-pin LQFP
S9S08LG16J0VLH 18 KB 1984 64-pin LQFP
S9S08LG16J0VLF 48-pin LQFP
IMM
MC9S08LG32CLK 32 KB 1984 -40 °C to + 85 °C Charge Pump 80-pin LQFP
MC9S08LG32CLH 64-pin LQFP
MC9S08LG32CLF 48-pin LQFP
MC9S08LG16CLH 18 KB 1984 64-pin LQFP
MC9S08LG16CLF 48-pin LQFP
Package Information
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 39
3.1 Device Numbering System
Example of the device numbering system:
Figure 31. Device Number Example for Auto Parts
Figure 32. Device Number Example for IMM Parts
4 Package Information
4.1 Mechanical Drawings
The following pages are mechanical drawings for the packages described in Table 23. For the latest
available drawings please visit our web site (http://www.freescale.com) and enter the package’s document
number into the keyword search box.
Table 23. Package Descriptions
Pin Count Package Type Abbreviation Designator Case No. Document No.
80 Low Quad Flat Package LQFP LK 917A 98ASS23237W
64 Low Quad Flat Package LQFP LH 840F 98ASS23234W
48 Low Quad Flat Package LQFP LF 932 98ASH00962A
S
Temperature range
Family
Memory
Core
(C = –40 C to 85C)
(9 = FLASH-based)
9S08 X
Package designator (see Ta b l e 2 3 )
Approximate Flash size in KB
LG 32 J0 XX
Status/Partnumber Type
(S = Maskset specific partnumber)
Maskset Identifier Suffix
(First digit usually references wafer fab
Second digit usually differentiates mask rev)
(V = –40 C to 105C)
MC
Temperature range
Family
Memory
Status
Core
(C = –40 C to 85C)
(9 = FLASH-based)
9S08 XX
(MC = Fully Qualified) Package designator (see Ta bl e 2 3 )
Approximate Flash size in KB
LG 32 C
MC9S08LG32 Series Data Sheet, Rev. 9
Package Information
Freescale Semiconductor40
4.1.1 80-pin LQFP
Package Information
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 41
MC9S08LG32 Series Data Sheet, Rev. 9
Package Information
Freescale Semiconductor42
Figure 33. 80-pin LQFP Package Drawing (Case 917A, Doc #98ASS23237W)
Package Information
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 43
4.1.2 64-pin LQFP
MC9S08LG32 Series Data Sheet, Rev. 9
Package Information
Freescale Semiconductor44
Package Information
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 45
Figure 34. 64-pin LQFP Package Drawing (Case 840F, Doc #98ASS23234W)
MC9S08LG32 Series Data Sheet, Rev. 9
Package Information
Freescale Semiconductor46
4.1.3 48-pin LQFP
Package Information
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 47
Figure 35. 48-pin LQFP Package Drawing (Case 932, Doc #98ASH00962A)
MC9S08LG32 Series Data Sheet, Rev. 9
Revision History
Freescale Semiconductor48
5 Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web are the most current. Your
printed copy may be an earlier revision. To verify you have the latest information available, refer to:
http://www.freescale.com
The following revision history table summarizes changes contained in this document.
Table 24. Revision History
Revision Date Description of Changes
1 8/2008 First Initial release.
2 9/2008 Second Initial Release.
3 11/2008 Alpha Customer Release.
4 2/2009 Launch Release.
5 4/2009 Added EMC Radiated Emission and Transient Susceptibility data in Ta bl e 1 9 and Ta bl e 2 0 .
6 4/2009 Updated EMC performance data.
7 8/2009 Updated auto part numbers, changed TCLK, T0CH0, T0CH1, T1CH0, T1CH1, T1CH2, T1CH3,
T1CH3, T1CH4, and T1CH5 to TPMCLK, TPM0CH0, TPM0CH1,TPM1CH0, TPM1CH1,
TPM1CH2, TPM1CH3, TPM1CH4, and TPM1CH5, and changed the maximum LCD frame
frequency to 64 Hz.
8 8/2011 Updated Table “ICS Frequency Specifications (Temperature Range = –40 ×C to 105 ×C
Ambient)”. Changed the value of row 8 column C from C to P.
9 9/2011 Updated Table “ICS Frequency Specifications (Temperature Range = –40 ×C to 105 ×C
Ambient)”. Removed Footnote from Row 8.
Updated the Revision History
MC9S08LG32 Series Data Sheet, Rev. 9
Freescale Semiconductor 49
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Document Number: MC9S08LG32
Rev. 10
04/2015
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