Specification and design are subject to change without notice.
RADIATION HARDENED 32-BIT MICROPROCESSOR
©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1
80486DX2RP
1
FEATURES:DESCRIPTION:
·32-Bit Microprocessor
·Total Dose Hardness: typical 100 Krad (Si); dependent
upon orbit
·Single Event Effect
- SELTH = 59.6 MeV/mg/cm2
- SEUTH = 5 MeV/mg/cm2
·Package:
- 208 Pin RAD-PAK® Quad Flat Pack
·8-Kilobyte On-Chip Cache with Consistency Support
· External Cache Controller
·Integrated Floating-Point Unit
·Single Cycle Execution
·32-Bit RISC Integer Core
·Instruction Pipelining
·On-Chip Management Unit
·Write Buffers
·Bus Backoff
·Instruction Restart
·On Chip Floating Point Unit
Space Electronics’ 80486DX2RP (RP for RAD-PAK®) high-performance 32-bit micro-
processor features a typical 100krad (Si) total dose tolerance. The 80486DX2RP
processor integrates an 8K unified cache and floating-point (FPU) hardware-on-
chip. The on-chip memory management unit is completely compatible with the
80386 processor. The on-chip cache memory allows frequently used data and
code to be stored on-chip, reducing accesses to the external bus. Its speed-mul-
tiplying technology, allowing the processor to operate at frequencies higher than
the external memory bus. The clock multiplier on the 80486DX2RP improves ex-
ecution performance without increasing board design complexity. It enhances all
operations operating out of the cache and/or not blocked by external bus ac-
cesses. The burst bus feature enables fast cache fills. The patented radiation-
hardened RAD-Pak® technology incorporates radiation shielding in the microcir-
cuit package. It provides a 100 Krad or better (Si) total dose survivability, based on
a GEO-type orbit. Actual TID tolerance is dependent upon orbit and mission dura-
tion. Capable of surviving in-space environment, the 80486DX2RP is ideal for sat-
ellite, spacecraft, and space probe missions. It is available in Class S packaging and
screening.
SEi
80486DX2RP
RADIATION HARDENED 32-BIT MICROPROCESSOR
80486DX2RP
Specification and design are subject to change without notice. ©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1 2
80486DX2RP ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN MAX UNIT
Supply V oltage Res pec t to Gr ound VCC -0.5 +6.5 V
DC V oltage on O ther P ins w ith Res pec t to
Ground -0.5 VCC + 0.5 V
Operating Temperature Range TOPR -55 +125 OC
Storage Temperature Range TSTG -65 +150 OC
80486DX2RP OPERATING CONDITIONS
PARAMETER SYMBOL MIN MAX UNIT
Digital Supply Voltage VCC 4.5 5.5 V
Temperature Range TA-55 +125 OC
80486DX2RP DC ELECTRICAL CHARACTERISTICS FOR READ OPERATION
(VCC=5V ± 10%, TA = -55 to +125°C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN MAX UNIT
Input Leakage Current Inputs without Pull-ups or
pull-downs
0V < VIN < VCC
ILI -15 +15 mA
Output Leakage Current ILO -15 +15 mA
UP# Active Supply Current 3/I
CCU 50 mA
Input Leakage Current 1/
5/IIH 200
300 mA
Input Leakage Current 2/I
IL -400 mA
Input Low Voltage VIL -0.3 0.8 V
Input High Voltage VIH 2.0 VCC + 0.3 V
Output Low Voltage Address, Data, BEn 4.0mA
Definition, Control 5.0mA VOL 0.45 V
Output High Voltage Address, Data, BEn -1.0mA
Definition, Control -0.9mA VOH 2.4 V
ICC Active (Power Supply)
6/fOP = 50MHz
fOP = 66MHz 950
1200 mA
ICC Active (Thermal Supply)
4 / 7 / 8 / fOP = 50MHz
fOP = 66MHz 906
1145 mA
ICC Stop Grant
9/fOP = 50MHz
fOP = 66MHz 70
90 mA
ICC Stop Clock 10/f
OP = 0MHz 2 mA
CLK2 Capacitance @ 1MHz 4/C
CLK 6pF
Input Capacitance @ 1MHz 4/C
IN 10 pF
Output or I/O Capacitance @ 1MHz 4/C
OUT 10 pF
Note:
1/ This parameter is for inputs with pull-downs and VIH = 2.4V.
2/ This parameter is for inputs with pull-ups and VIL = 0.45V.
3/ When the processor is in Stop Grant state, the ICCU of the host processor is less than 2 mA.
4/ Not 100% tested.
5/ This parameter is for inputs with pull-downs and VIH = 2.4V. (SRESET pin only).
Specification and design are subject to change without notice.
RADIATION HARDENED 32-BIT MICROPROCESSOR
©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1
80486DX2RP
3
6/ This parameter is for proper power supply selection. It is measured using the worst case instruction mix at
VCC = 5.25V.
7/ The maximum current column is for thermal design power dissipation. It is measured using the worst case
instruction mix at VCC = 5V.
8/ The typical current column is the typical operating current in a system. This value is measured in a system
using a typical device at VCC = 5V, running Microsoft Windows 3.1 at an idle condition. This typical value is
dependent upon the specific system configuration.
9/ The ICC Stop Grant specification refers to the ICC value once the processor enters the Stop Grant or Auto
HALT Power Down state.
10/ The ICC Stop Clock specification refers to the ICC value once the processor enters the Stop Clock state.
The VIH and VIL levels must be equal to VCC and 0V, respectively, in order to meet the ICC Stop Clock
specifications.
80486DX2RP AC ELECTRICAL CHARACTERISTICS
(VCC=5V ± 10%, TA = -55 to +125°C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN MAX UNIT
Operating Frequency
80486DX2RP-50
80486DX2RP-66
1/ 50
66 MHz
CLK Frequency
80486DX2RP-50
80486DX2RP-66 8
825
33 MHz
CLK Period
80486DX2RP-50
80486DX2RP-66
t140
30 125
125 ns
CLK Period Stability
80486DX2RP-50
80486DX2RP-66
t1a +250
+250 ps
CLK High Time
80486DX2RP-50
80486DX2RP-66
at 2V t214
11 ns
CLK2 Low Time
80486DX2RP-50
80486DX2RP-66
at 0.8V t314
11 ns
CLK Fall Time
80486DX2RP-50
80486DX2RP-66
2V to 0.8V t44
3ns
CLK2 Rise Time
80486DX2RP-50
80486DX2RP-66
0.8V to 2V t54
3ns
A2 - A31, PWT, PCD,
BE0-3#, M/IO#, D/C#, W/R#,
ADS#, LOCK#, BREQ,
HLDA, SMIACT#, FERR#
Valid Delay
80486DX2RP-50
80486DX2RP-66
t6
3
319
14
A2 - A31, PWT, PCD,
BE0-3#, M/IO#, D/C#, W/R#,
ADS#, LOCK#, BREQ,
HLDA, Float Delay 2/
80486DX2RP-50
80486DX2RP-66
t7
28
20
ns
RADIATION HARDENED 32-BIT MICROPROCESSOR
80486DX2RP
Specification and design are subject to change without notice. ©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1 4
80486DX2RP AC ELECTRICAL CHARACTERISTICS (continue)
(VCC=5V ± 10%, VPP = VSS, TA = -55 to +125°C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN MAX UNIT
PCHK# Valid Delay
80486DX2RP-50
80486DX2RP-66
t83
324
14 ns
BLAST#, PLOCK# Valid Delay
80486DX2RP-50
80486DX2RP-66
t8a 3
324
14 ns
BLAST#
,
PLOCK# Float Dela
y
2/
80486DX2RP-50
80486DX2RP-66
t9
28
20 ns
D0-D31, DP0-DP3 Write Data
Valid Delay
80486DX2RP-50
80486DX2RP-66
t10
3
320
14 ns
D0-D31, DP0-DP31 Write
Data Float Delay 2/
80486DX2RP-50
80486DX2RP-66
t11
28
20
ns
EADS# Setup Time
80486DX2RP-50
80486DX2RP-66
t12 8
5ns
EADS# Hold Time
80486DX2RP-50
80486DX2RP-66
t13 3
3ns
KEN#, BS16#, BS#, Setup
Time
80486DX2RP-50
80486DX2RP-66
t14
8
5
ns
KEN#, BS16#, BS# Hold Time
80486DX2RP-50
80486DX2RP-66
t15
3
3
ns
RDY#, BRDY# Setup Time
80486DX2RP-50
80486DX2RP-66
t16 8
5ns
RDY#, BRDY# Hold Time
80486DX2RP-50
80486DX2RP-66
t17 3
3ns
HOLD, AHOLD Setup Time
80486DX2RP-50
80486DX2RP-66
t18 8
6ns
BOFF# Setup Time
80486DX2RP-50
80486DX2RP-66
t18a 8
7ns
Specification and design are subject to change without notice.
RADIATION HARDENED 32-BIT MICROPROCESSOR
©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1
80486DX2RP
5
80486DX2RP AC ELECTRICAL CHARACTERISTICS (continue)
(VCC=5V ± 10%, VPP = VSS, TA = -55 to +125°C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN MAX UNIT
HOLD, AHOLD, BOFF# Hold
Time
80486DX2RP-50
80486DX2RP-66
t19
3
3
ns
FLUSH#, A20M#, NMI, INTR,
SMI#, STPCLK#, SRESET,
RESET, IGNNE# Setup Time
80486DX2RP-50
80486DX2RP-66
t20
8
5
ns
FLUSH#, A20M#, NMI, INTR,
SMI#, STPCLK#, SRESET,
RESET, IGNNE# Hold Time
80486DX2RP-50
80486DX2RP-66
t21
3
3
ns
D0-D31, DP0-DP3, A4-A31
Read Setup Time
80486DX2RP-50
80486DX2RP-66
t22
5
5
ns
D0-D31, DP0-DP3, A4-A31
Read Hold Time
80486DX2RP-50
80486DX2RP-66
t23
3
3ns
Note:
1/ 0-MHz operation is guaranteed when the STPCLK# and Stop Grant bus cycle protocol is used.
2/ Not 100% tested, guaranteed by design characterization.
80486DX2RP AC SPECIFICATIONS FOR THE TEST ACCESS PORT
VCC=5V ± 10%, VPP = VSS, TA = -55 to +125°C, unless otherwise specified)
PARAMETER TEST CONDITION SYMBOL MIN MAX UNIT
TCK Frequency 1/ t24 8MHz
TCK Period t25 125 ns
TCK High Time at 2.0V t26 40 ns
TCK Low Time at 0.8V t27 40 ns
TCK Rise Time 2/ t28 8ns
TCK Fall Time 2/ t29 8ns
TDI, TMS Setup Time 3/ t30 8ns
TDI, TMS Hold Time 3/ t31 10 ns
TDO Valid Delay 3/ t32 330ns
TDO Float Delay 3/ t33 36 ns
All Outputs (Non-Test) Valid
Delay 3/ t34 330ns
All Outputs (Non-Test) Float
Delay 3/ t35 36 ns
All Inputs (Non-Test) Setup
Time 3/ t36 8ns
All Inputs (Non-Test) Hold
Setup 3/ t37 10 ns
RADIATION HARDENED 32-BIT MICROPROCESSOR
80486DX2RP
Specification and design are subject to change without notice. ©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1 6
Note:
1/ TCK period < CLK period.
2/ Rise/Fall times are measured between 0.8V and 2.0V. Rise/Fall times can be relaxed by 1 ns per 10-ns
increase in TCK period.
3/ Parameters t30 - t36 are measured from TCK.
80486DX2RP PINOUT DESCRIPTION
PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL
1 Vss 36 Vss 71 NC 106 Vcc 141 D3 176 Vcc
2 Vcc 37 M/IO# 72 IGNNE# 107 Vss 142 D2 177 A14
3 Vcc 38 Vcc 73 STPCLK# 108 D16 143 D1 178 A13
4 PCHK# 39 D/C# 74 D31 109 DP2 144 D0 179 Vcc
5 BRDY# 40 PWT 75 D30 110 Vss 145 DP0 180 A12
6 BOFF# 41 PCD 76 Vss 111 Vcc 146 Vss 181 Vss
7 BS16# 42 Vcc 77 Vcc 112 D15 147 A31 182 A11
8 BS8# 43 Vss 78 D29 113 D14 148 A30 183 Vcc
9 Vcc 44 Vcc 79 D28 114 Vcc 149 A29 184 Vss
10 Vss 45 Vcc 80 Vcc 115 Vss 150 Vcc 185 Vcc
11 NC 46 EADS# 81 Vss 116 D13 151 A28 186 A10
12 RDY# 47 A20M# 82 Vcc 117 D12 152 A27 187 A9
13 KEN# 48 RESET 83 D27 118 D11 153 A26 188 Vcc
14 Vcc 49 FLUSH# 84 D26 119 D10 154 A25 189 Vss
15 Vss 50 INTR 85 D25 120 Vss 155 Vcc 190 A8
16 HOLD 51 NMI 86 Vcc 121 Vcc 156 Vss 191 Vcc
17 AHOLD 52 Vss 87 D24 122 Vss 157 Vss 192 A7
18 TCK 53 Vss 88 Vss 123 D9 158 A24 193 A6
19 Vcc 54 Vcc 89 Vcc 124 D8 159 A23 194 UP#
20 Vcc 55 Vss 90 DP3 125 DP1 160 A22 195 A5
21 Vss 56 Vcc 91 D23 126 D7 161 A21 196 A4
22 Vcc 57 Vss 92 D22 127 NC 162 Vcc 197 A3
23 Vcc 58 SRESET 93 D21 128 Vcc 163 Vcc 198 Vcc
24 CLK 59 SMIACT# 94 Vss 129 D6 164 A20 199 Vss
25 Vcc 60 Vcc 95 Vcc 130 D5 165 A19 200 Vcc
26 HLDA 61 Vss 96 NC 131 Vcc 166 A18 201 Vss
27 W/R# 62 Vcc 97 Vss 132 Vss 167 TMS 202 A2
28 Vss 63 NC 98 Vcc 133 Vcc 168 TDI 203 ADS#
29 Vcc 64 NC 99 D20 134 Vcc 169 Vcc 204 BLAST#
30 BREQ 65 SMI# 100 D19 135 Vss 170 Vss 205 Vcc
31 BE0# 66 FERR# 101 D18 136 Vcc 171 A17 206 PLOCK#
32 BE1# 67 NC 102 Vcc 137 Vcc 172 Vcc 207 LOCK#
33 BE2# 68 TDO 103 D17 138 Vss 173 A16 208 Vss
34 BE3# 69 Vcc 104 Vss 139 Vcc 174 A15
35 Vcc 70 NC 105 Vss 140 D4 175 Vss
Specification and design are subject to change without notice.
RADIATION HARDENED 32-BIT MICROPROCESSOR
©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1
80486DX2RP
7
Figure 1. 80486DX2RP CLK Waveforms
Figure 2. 80486DX2RP Input Setup and Hold Timing
Figure 3. 80486DX2RP Input Setup and Hold Timing
RADIATION HARDENED 32-BIT MICROPROCESSOR
80486DX2RP
Specification and design are subject to change without notice. ©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1 8
Figure 4. 80486DX2RP PCHK# Valid Delay Timing
Figure 5. 80486DX2RP Output Valid Delay Timing
Specification and design are subject to change without notice.
RADIATION HARDENED 32-BIT MICROPROCESSOR
©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1
80486DX2RP
9
Figure 6. 80486DX2RP Maximum Float Delay Timing
Figure 7. 80486DX2RP Test Signal Timing
RADIATION HARDENED 32-BIT MICROPROCESSOR
80486DX2RP
Specification and design are subject to change without notice. ©1998 Space Electronics Inc.
All rights reserved
--4.3--
0311.98Rev1 10
Symbol Dimension (inches)
Minimum Maximum
A .110 .150
A1 .026 -
b .007 .013
c .004 .009
D 1.133 1.515
D1 1.275 BSC
S1 .013 -
e .025 BSC
L 2.500 2.540
L1 2.485 2.505
A1 .075 .125
N 208
Note: This package has to be mounted cavity down to match the pinout.
208 Pin QFP
RAD-PAK
®
Top View
A2
Pin 1 Pin 52
