AUTOMOTIVE GRADE HEXFET(R) Power MOSFET Features Advanced Process Technology Ultra Low On-Resistance Logic Level Gate Drive Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * VDSS Package Type AUIRLS3036-7P D2Pak 7 Pin 60V RDS(on) typ. max. Description Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. Base Part Number AUIRLS3036-7P 1.5m ID (Silicon Limited) 1.9m 300A ID (Package Limited) 240A D2Pak 7 Pin AUIRLS3036-7P G D S Gate Drain Source Standard Pack Form Quantity Tube 50 Tape and Reel Left 800 Orderable Part Number AUIRLS3036-7P AUIRLS3036-7TRL Absolute Maximum Ratings Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25C, unless otherwise specified. Symbol Parameter Max. ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100C ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) 210 240 IDM PD @TC = 25C Pulsed Drain Current Maximum Power Dissipation 1000 380 VGS EAS IAR EAR dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance Symbol RJC RJA Parameter Junction-to-Case Junction-to-Ambient Units 300 A W 2.5 16 300 See Fig.14,15, 22a, 22b 8.1 -55 to + 175 W/C V mJ A mJ V/ns C 300 Typ. Max. Units --- --- 0.40 40 C/W HEXFET(R) is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-11-4 AUIRLS3036-7P Static @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs RG Forward Trans conductance Gate Resistance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 60 --- --- V VGS = 0V, ID = 250A --- 0.059 --- V/C Reference to 25C, ID = 5mA --- 1.5 1.9 VGS = 10V, ID = 180A m --- 1.7 2.2 VGS = 4.5V, ID = 150A 1.0 --- 2.5 V VDS = VGS, ID = 250A 390 --- --- --- --- --- --- 1.9 --- --- --- --- --- --- 20 250 100 -100 S VDS = 10V, ID = 180A VDS = 60V, VGS = 0V A VDS = 60V,VGS = 0V,TJ =125C VGS = 16V nA VGS = -16V Dynamic Electrical Characteristics @ TJ = 25C (unless otherwise specified) Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance --- 110 160 --- 33 --- --- 53 --- --- 57 --- --- 81 --- --- 540 --- --- 89 --- --- 170 --- --- 11270 --- --- 1025 --- Crss Reverse Transfer Capacitance --- 520 --- Coss eff.(ER) Effective Output Capacitance (Energy Related) --- 1460 --- VDD = 39V ID = 180A ns RG= 2.1 VGS = 4.5V VGS = 0V VDS = 50V pF = 1.0MHz VGS = 0V, VDS = 0V to 48V Coss eff.(TR) Effective Output Capacitance (Time Related) --- 1630 --- VGS = 0V, VDS = 0V to 48V Min. Typ. Max. Units --- --- 300 --- --- 1000 --- --- --- --- --- --- --- 57 60 140 160 4.6 1.3 --- --- --- --- --- Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ID = 180A VDS = 30V nC VGS = 4.5V Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25C,IS = 180A,VGS = 0V TJ = 25C VDD = 51V ns TJ = 125C IF = 180A, TJ = 25C di/dt = 100A/s nC TJ = 125C A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 240A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.018mH, RG = 25, IAS = 180A, VGS =10V. Part not recommended for use above this value. ISD 180A, di/dt 1070A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 R is measured at TJ approximately 90C. RJC value shown is at time zero. 2 2015-11-4 AUIRLS3036-7P 1000 1000 100 BOTTOM 10 1 2.7V BOTTOM 100 2.7V 60s PULSE WIDTH Tj = 175C 60s PULSE WIDTH Tj = 25C 10 0.1 0.1 1 10 0.1 100 Fig. 1 Typical Output Characteristics 10 100 Fig. 2 Typical Output Characteristics 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000 ID, Drain-to-Source Current) 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) TJ = 175C 100 TJ = 25C 10 VDS = 25V 60s PULSE WIDTH 1 ID = 180A VGS = 10V 2.0 1.5 1.0 0.5 2.0 3.0 4.0 5.0 -60 -40 -20 5 VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 100 kHz Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 15000 Ciss 10000 5000 Coss Crss VDS = 48V ID= 180A VDS = 30V 4 3 2 1 0 0 1 20 40 60 80 100 120 140 160 180 Fig. 4 Normalized On-Resistance vs. Temperature Fig. 3 Typical Transfer Characteristics 20000 0 TJ , Junction Temperature (C) VGS, Gate-to-Source Voltage (V) C, Capacitance (pF) VGS 15V 10V 4.5V 4.0V 3.5V 3.3V 3.0V 2.7V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 4.5V 4.0V 3.5V 3.3V 3.0V 2.7V 10 100 0 20 40 60 80 100 120 140 VDS , Drain-to-Source Voltage (V) QG Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 2015-11-4 AUIRLS3036-7P 10000 TJ = 175C ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 1000 100 TJ = 25C 10 1 OPERATION IN THIS AREA LIMITED BY R DS (on) 1000 100sec 100 1msec LIMITED BY PACKAGE 10 10msec 1 Tc = 25C Tj = 175C Single Pulse VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1.6 0.1 VSD , Source-to-Drain Voltage (V) LIMITED BY PACKAGE ID , Drain Current (A) 250 200 150 100 50 ID = 5mA 70 60 50 -60 -40 -20 75 100 125 150 175 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (C) TC , Case Temperature (C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage 1200 EAS, Single Pulse Avalanche Energy (mJ) 4.0 3.0 Energy (J) 100 80 0 50 10 Fig 8. Maximum Safe Operating Area V(BR)DSS , Drain-to-Source Breakdown Voltage 300 2.0 1.0 ID 22A 37A BOTTOM 180A TOP 1000 800 600 400 200 0 0.0 0 10 20 30 40 50 60 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 1 VDS , Drain-toSource Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 25 DC 70 25 50 75 100 125 150 175 Starting TJ, Junction Temperature (C) Fig 12. Maximum Avalanche Energy vs. Drain Current 2015-11-4 AUIRLS3036-7P 1 Thermal Response ( Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 J 0.02 0.01 0.01 J 1 R2 R2 R3 R3 C 2 1 3 2 3 Ci= iRi Ci= iRi SINGLE PULSE ( THERMAL RESPONSE ) 0.001 R1 R1 Ri (C/W) I (sec) 0.103731 0.000184 0.196542 0.001587 0.098271 0.006721 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 0.01 0.05 0.10 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Avalanche Current vs. Pulse width EAR , Avalanche Energy (mJ) 300 TOP Single Pulse BOTTOM 1% Duty Cycle ID = 180A 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (C) Fig 15. Maximum Avalanche Energy vs. Temperature 5 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 22a, 22b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 13, 14). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3*BV*Iav) = T/ ZthJC Iav = 2T/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav 2015-11-4 AUIRLS3036-7P 24 ID = 1.0A ID = 1.0mA ID = 250A 2.5 18 IRRM - (A) VGS(th) Gate threshold Voltage (V) 3.0 2.0 12 IF = 120A VR = 51V 6 1.5 TJ = 125C TJ = 25C 0 1.0 -75 -50 -25 0 25 50 75 100 100 125 150 175 200 300 500 600 700 800 900 dif / dt - (A / s) TJ , Temperature ( C ) Fig 16. Threshold Voltage vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt 24 1000 800 QRR - (nC) 18 IRRM - (A) 400 12 IF = 180A VR = 51V 6 400 IF = 120A VR = 51V 200 TJ = 125C TJ = 25C 0 600 TJ = 125C TJ = 25C 0 100 200 300 400 500 600 700 800 900 100 200 dif / dt - (A / s) 300 400 500 600 700 800 900 dif / dt - (A / s) Fig. 18 - Typical Recovery Current vs. dif/dt 1000 QRR - (nC) 800 Fig. 19 - Typical Stored Charge vs. dif/dt IF = 180A VR = 51V TJ = 125C TJ = 25C 600 400 200 0 100 200 300 400 500 600 700 800 900 dif / dt - (A / s) Fig. 20 - Typical Stored Charge vs. dif/dt 6 2015-11-4 AUIRLS3036-7P Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V tp L VDS D.U.T RG IAS 20V tp DRIVER + V - DD A 0.01 Fig 22a. Unclamped Inductive Test Circuit Fig 23a. Switching Time Test Circuit I AS Fig 22b. Unclamped Inductive Waveforms Fig 23b. Switching Time Waveforms Id Vds Vgs Vgs(th) Qgs1 Qgs2 Fig 24a. Gate Charge Test Circuit 7 Qgd Qgodr Fig 24b. Gate Charge Waveform 2015-11-4 AUIRLS3036-7P D2Pak - 7 Pin Package Outline (Dimensions are shown in millimeters (inches)) D2Pak - 7 Pin Part Marking Information Part Number AULS3036-7P YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 2015-11-4 AUIRLS3036-7P D2Pak - 7 Pin Tape and Reel Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2015-11-4 AUIRLS3036-7P Qualification Information Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon's Industrial and Consumer qualification level is granted by extension of the higher Automotive level. Qualification Level Moisture Sensitivity Level Machine Model Human Body Model ESD Charged Device Model RoHS Compliant D2-Pak 7 Pin MSL1 Class M4 (+/- 800V) AEC-Q101-002 Class H3A (+/- 6000V) AEC-Q101-001 Class C5 (+/- 2000V) AEC-Q101-005 Yes Highest passing voltage. Revision History Date 4/2/2014 11/4/2015 Comments Added "Logic Level Gate Drive" bullet in the features section on page 1 Updated part marking on page 8 Updated typo on the fig.19 and fig.20, unit of y-axis from "A" to "nC" on page 6. Updated data sheet with new IR corporate template Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 Munchen, Germany (c) Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. 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