IRL530N
HEXFET® Power MOSFET
PD - 91348C
S
D
G
VDSS = 100V
RDS(on) = 0.10Ω
ID = 17A
T
O
-22
0
AB
1/09/04
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 17
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 12 A
IDM Pulsed Drain Current 60
PD @TC = 25°C Power Dissipation 79 W
Linear Derating Factor 0.53 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy150 mJ
IAR Avalanche Current9.0 A
EAR Repetitive Avalanche Energy7.9 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.9
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
Thermal Resistance
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
lLogic-Level Gate Drive
lAdvanced Process Technology
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
IRL530N
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 10 0 –– – –– – V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.122 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.100 VGS = 10V, ID = 9.0A
––– ––– 0.120 ΩVGS = 5.0V, ID = 9.0A
––– ––– 0.150 VGS = 4.0V, ID = 8.0A
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 7.7 ––– ––– S VDS = 25V, ID = 9.0A
––– ––– 25 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
QgTotal Gate Charge –– – – – – 3 4 ID = 9.0A
Qgs Gate-to-Source Charge ––– ––– 4.8 nC V DS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 20 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 7.2 ––– VDD = 50V
trRise Time ––– 53 ––– ns ID = 9.0A
td(off) Turn-Off Delay Time ––– 30 ––– RG = 6.0Ω, VGS = 5.0V
tfFall Time ––– 26 ––– RD = 5.5Ω, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 800 ––– VGS = 0V
Coss Output Capacitance ––– 160 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 90 ––– ƒ = 1.0MHz, See Fig. 5
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 3.7mH
RG = 25Ω, IAS = 9.0A. (See Figure 12)
.
Notes:
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
nH
IGSS
S
D
G
LSInternal Source Inductance ––– 7.5 –––
RDS(on) Static Drain-to-Source On-Resistance
LDInternal Drain Inductance ––– 4.5 –––
IDSS Drain-to-Source Leakage Current
ISD ≤ 9.0A, di/dt ≤ 540A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) 
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V
trr Reverse Recovery Time ––– 140 210 ns TJ = 25°C, I F = 9.0A
Qrr Reverse RecoveryCharge ––– 740 1100 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
A
17
60
IRL530N
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
0.1
1
10
100
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Dra in- to -S o u r ce Vo lta
g
e
(
V
)
DS
A
20
µ
s PU LSE WID TH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
0.1
1
10
100
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Dra in- to -S o u r ce Vo lta
g
e
(
V
)
DS
A
20
µ
s PU LSE WID TH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
0.1
1
10
100
2345678910
T = 25°C
J
GS
V , G a te-to -S o urce V olta
g
e (V)
D
I , D ra in -to-S o urc e C urr en t ( A)
V = 50V
20µs PULSE WIDTH
T = 175°C
J
A
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , J u nc tion T em p e rature ( °C )
R , D ra in-to -S o u rc e O n R e s is ta nc e
DS(on)
(Normalized)
V = 1 0V
GS
A
I = 1 5 A
D
IRL530N
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0
3
6
9
12
15
0 1020304050
Q , T ota l Gate Ch a r
g
e
(
nC
)
G
V , Gate - to-Sou r ce V o ltag e (V )
GS
V = 8 0 V
V = 5 0 V
V = 2 0 V
DS
DS
DS
A
FOR TEST CIRCUIT
SE E F IG U R E 1 3
I = 9 . 0 A
D
1
10
100
0.4 0.6 0.8 1.0 1.2 1.4
T = 25°C
J
V = 0V
GS
V , S ource-to-Drain V oltage (V )
I , Rev e rs e D ra in Cur re nt ( A )
SD
SD
A
T = 17 5°C
J
1
10
100
1000
1 10 100 1000
V , Dra in- to -S o u r ce Vo lta
g
e
(
V
)
DS
I , Drain Current (A)
OP E RA T IO N IN T H IS A R EA L IM IT E D
B Y R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 2 5 °C
T = 1 7 5° C
Sin
g
le Pulse
C
J
0
200
400
600
800
1000
1200
1400
1 10 100
C , Capacitance (pF)
DS
V , Dra in- to -S o u rc e Vo lt a
g
e
(
V
)
A
V = 0 V , f = 1 MHz
C = C + C , C S H O RTED
C = C
C = C + C
GS
is s gs gd ds
rss gd
os s ds g d
C
iss
C
oss
C
rss
IRL530N
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
5.0V
+
-
VDD
25 50 75 100 125 150 175
0
5
10
15
20
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
IRL530N
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
V
DS
L
D.U.T.
V
DD
I
AS
t
p
0.01Ω
R
G
+
-
t
p
V
DS
I
AS
V
DD
V
(BR)DSS
5.0 V
Q
G
Q
GS
Q
GD
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 13b. Gate Charge Test Circuit
5.0 V
0
50
100
150
200
250
300
350
25 50 75 100 125 150 175
J
E , Sing le P ul s e A v a lan c he Ene rg y (mJ )
AS
A
Startin
g
T , J unc tion T em perature
(
°C
)
V = 2 5 V
I
TOP 3 .7A
6 .4A
BO TTOM 9.0A
DD
D
IRL530N
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRL530N
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
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Note: "P" in assembly line
position indicates "Lead-Free"
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
- B -
1.32 (.052)
1.22 (.048)
3X 0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
4.69 (.185)
4.20 (.165)
3X 0.93 (.037)
0.69 (.027)
4.06 (.160)
3.55 (.140)
1.15 (.045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X 1.40 (.055)
1.15 (.045)
2.54 (.100)
2X
0.36 (.014) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
LEAD ASSIGNMENTS
IGBTs, CoPACK
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
EXAMPLE:
IN T HE AS S EMBLYLINE "C"
THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW19, 1997 PART NUMBER
ASSEMBLY
LOT CODE
DATE CODE
YE AR7= 1997
LINE C
WEEK 19
LOGO
RECTIFIER
INTERNAT IONAL
For GB Productio
n
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 01/04
TO-220AB package is not recommended for Surface Mount Application.