NEW CLAROCHIPTM Series CC9318 Nonvolatile Digital Trimming Potentiometer The CLAROCHIP CC9318 Digital Trimming Potentiometer is an 8-bit nonvolatile DAC designed to replace mechanical trimmers. It includes a unity-gain amplifier to buffer the DAC output and enables VOUT to swing from rail to rail. The Digital Trimming Potentiometer operates over a supply voltage range of 2.7V to 5.5V. The simple up/down counter input provides an ideal interface for automatic test equipment to dither and monitor the VOUT voltage. This interface allows for quick and consistent calibration of even the most sophisticated systems. The CC9318 is a pin-compatible performance upgrade for other industry nonvolatile potentiometers. The adjustable CLAROCHIP CC9318 offers double the resolution of these devices and provides "clickless" transitions of VOUT. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . * Digitally Controlled Electronic Potentiometer * 8-Bit Digital-to-Analog Converter (DAC) - Independent Reference Inputs - Differential Non-Linearity - 0.5LSB max - Integral Non-Linearity - 1LSB max * VOUT Value in EEPROM for Power-On Recall - Equivalent to 256-Step Potentiometer * Unity Gain Op Amp Drives up to 1mA * Simple Trimming Adjustment - Up/Down Counter Style Operation * Low Noise Operation * Make-Before-Break Contact for "Clickless" Transitions between DAC Steps * Operation from +2.7V to +5.5V Supply * Low Power, 1mW max at +5V * No Mechanical Wearout Problem - 1,000,000 Stores (typical) - 100 Year Data Retention * Fool-proof, Set-and-Forget Calibrations Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD VH 8-bit E2 PROM - UP/DN INC CS Counter & Write Control 8-bit Data Register AMP 8-bit DAC VOUT + VL GND 2016 ILL2 1 theNEW Telephone: 800.874.1874 Fax: 800.223.5138 12055 Rojas Drive * Suite K * El Paso, Texas USA 79936 * www.clarostat.com Symbol INC UP/DN VH GND VOUT VL CS VDD Description Increment Input, High to Low Edge Trigger Up/Down Input controlling relative Vout movement V+ reference input Analog and Digital Ground Trimmed Voltage Output V- reference input Active low chip select input Supply Voltage (2.7V to 5.5V) Analog Section The CC9318 is an 8-bit, voltage output digital-to-analog converter (DAC). The DAC consists of a resistor network that converts an 8-bit value into equivalent analog output voltages in proportion to the applied reference voltage. Reference Inputs The voltage differential between the VL and VH inputs sets the fullscale output voltage range. VL must be equal to or greater than ground (i.e. a positive voltage). VH must be greater than VL and less than or equal to VDD. See table on page 3 for guaranteed operating limits. Output Buffer Amplifier The voltage output is a precision unity-gain follower that can slew up to 1V/s. Digital Interface The interface is designed to emulate a simple up/down counter, but instead of a parallel count output, a ratiometric voltage output is provided. Chip Select (CS) is an active low input. Whenever CS is high the CC9318 is in standby mode and consumes the least power. This mode is equivalent to a potentiometer that is adjusted to the required setting. When CS is low the CC9318 will recognize transitions on the INC input and will move the VOUT either toward the VH reference or toward the VL reference depending upon the state of the UP/DN input. The host may exit an adjustment routine in two ways: deselecting the CC9318 while INC is low will not perform a store operation (a subsequent power cycle will recall the original data); deselecting the CC9318 while INC is high will store the current VOUT setting into nonvolatile memory. Increment (INC) is an edge triggered input. Whenever CS is low and a high to low transition occurs on the INC input, the VOUT ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias -55C to +125C Storage Temperature -65C to +150C Voltage on pins with reference to GND: Analog Inputs -0.5V to VDD+.5V Digital Inputs -0.5V to VDD+.5V Analog Outputs -0.5V to VDD+.5V Digital Outputs -0.5V to VDD+.5V Lead Solder Temperature (10 secs) INC 1 8 VDD UP/DN 2 7 CS VH 3 6 VL GND 4 5 VOUT voltage will either move toward VH or VL depending upon the state of the UP/DN input. Up/Down (UP/DN) is an input that will determine the VOUT movement relative to VH and VL . When CS is low, UP/DN is high and there is a high to low transition on INC, the VOUT voltage will move (1/256 th x VH-VL ) toward VH. When CS and UP/DN are low, and there is a high to low transition on INC, the VOUT will move (1/256 th x VH-VL) toward VL. Power-Up/Power-Down Conditions On power-up the CC9318 loads the value of EEPROM memory into the wiper position register. The value in the register is changed using the CS, INC, and UP/DN pins. The new data in the register will be lost at power-down unless CS was brought high, with INC high, to initiate a store operation after the last increment or decrement. On the next device power-up, the value of EEPROM memory will be loaded into the wiper position register. During power-up the CC9318 is write-protected in two ways: 1) A power-on reset, that trips at approximately 2.5V, holds CS and INC high internally. 2) Resistor pull-ups on all logic inputs prevent data change if the inputs are floating. Data Retention The CC9318 is guaranteed to perform at least 1,000,000 writes to EEPROM before a wear-out condition can occur. After EEPROM wearout, the CC9318 continues to function as a volatile digital potentiometer. The wiper position can be changed during powered conditions using the digital interface. However, on power-up the wiper position will be indeterminate. On shipment from the factory, CLAROSTAT does not specify any EEPROM memory value. The value must be set by the customer as needed. *COMMENT Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside those listed in the operation sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. 300C Page 2 RECOMMENDED OPERATING CONDITIONS Condition Temperature Min -40C Max +85C VDD +2.7V 5.5V DAC DC ELECTRICAL CHARACTERISTICS VDD = +2.7V to +5.5V, VrefH = VDD, VrefL = 0V, TA = -40C to +85C, unless specified otherwise Accuracy References Analog Output Symbol INL DNL Parameter Integral Non-Linearity Differential Non-Linearity VH VL RIN TCRIN VrefH Input Voltage VrefL Input Voltage VrefH to VrefL Resistance Temperature Coefficient of RIN GEFS VOUTZS TCVOUT Full-Scale Gain Error Zero-Scale Output Voltage VOUT Temperature Coefficient Conditions ILOAD = 100A ILOAD = 100A Guaranteed but not tested VrefH to VrefL DATA = FF DATA = 00 VDD = +5, ILOAD = 50A, VrefH = +5V, VrefL = 0V Guaranteed but not tested IL ROUT Amplifier Output Load Current Amplifier Output Resistance PSRR eN THD Power Supply Rejection Amplifier Output Noise Total Harmonic Distortion IL = 100A VDD = +5V VDD = +3V ILOAD = 10A f = 1KHz, VDD = +5V VIN = 1V rms, f = 1KHz BW Bandwidth - 3dB VIN = 100mV rms Min. - Typ. 0.5 0.1 Max. 1 0.5 Units LSB LSB VrefL Gnd - 38K 600 VDD VrefH - V V ppm/C 0 - 1 20 LSB mV - - 50 V/C +1000 -200 - 10 20 90 0.08 1 - A LSB/V nV/HZ % - 300 - kHz RELIABILITY CHARACTERISTICS (over recommended operating conditions unless otherwise specified) Symbol VZAP ILTH TDR NEND Parameter ESD Susceptibility Latch-Up Data Retention Endurance Min 2000 100 100 1,000,000 Max Unit V mA Years Stores Test Method MS-883, TM 3015 JEDEC Standard 17 MS-883, TM 1008 MS-883, TM 1033 DC ELECTRICAL CHARACTERISTICS VDD = +2.7V to +5.5V, VH = VDD, VL = 0V, TA = -40C to +85C, unless otherwise specified Symbol IDD Parameter Supply Current during store, note 1 Supply Standby Current Input Leakage Current Input Leakage Current, note 2 High Level Input Voltage Low Level Input Voltage Conditions CS = VIL to VIH W/INC HI CS = VIH VIN = VDD VIN = 0V Min ISB IIH IIL VIH 2 VIL VDD4.5V 0 Notes: 1. IDD is the supply current drawn while the EEPROM is being updated. IDD does not include the current Reference resistor chain. 2. CS, UP/DN and INC have internal pull-up resistors of approximately 200k. When the input is pulled current will be VDD/200k. Max 1.2 Units mA 200 10 -25 VDD 0.8 A A A V V that flows through the to ground the resulting output Page 3 OPERATIONAL TRUTH TABLE INC HITOLO HITOLO H L X CS L L LOTOHI LOTOHI H UP/DN H L X X X Operation VOUT toward VH VOUT toward VL Store Setting Maintain Setting, NO Store Standby, note 1 Notes: 1. The Standby or Operating current will be lowest with INC and UP/DN pins at H due to weak internal pull-ups that draw current when connected LO. AC TIMING CHARACTERISTICS VDD = +4.5V to +5.5V Symbol tCLIL tIHDC tDCIL tIL tIH tIHCH Parameter CS to INC Setup INC High to UP/DN Change UP/DN to INC Setup INC Low Period INC High Period INC Inactive to CS Inactive tWP tILVOUT Write Cycle Time INC to VOUT Delay Min 100 100 100 200 200 100 Max Units ns ns ns ns ns ns 5 5 ms s AC TIMING DIAGRAM CS tCLIL tIL tIH tIHCH tWP INC tIHDC tIHDHLD UP/DN tILVOUT VOUT 8 Pin SOIC (Type S) Package JEDEC (150 mil body width) .157 (4.00) .150 (3.80) .061 (1.75) .053 (1.35) .0098 (.25) .004 (.127) .275 (6.99) TYP. .035 (.90) .016 (.40) .0192 (.49) .0138 (.35) 1 .196 (5.00) .189 (4.80) How to Order .050 (1.27) TYP. .020 (.50) x45 .010 (.25) .244 (6.20) .228 (5.80) .05 (1.27) TYP. .050 (1.270) TYP. 8 Places CC9318 S .030 (.762) TYP. 8 Places FOOTPRINT 8pn JEDEC SOIC Base Part Number 8 Pin DIP (Type P) Package JEDEC (250 mil body width) .070 (1.778) .0375 (0.952) .015 (.381) Min. .375 (9.525) SEATING PLANE PIN 1 INDICATOR .250 (6.350) .130 (3.302) .060 .005 (1.524) .127 TYP. .300 (7.620) 5-7TYP. (4 PLCS) 0-15 .100 (2.54) TYP. .130 (3.302) .018 (.457) TYP. .350 (8.89) .009 .002 (.229 .051) Package S = 8 Pin SOIC P = 8 Pin DIP Page 4