• Digitally Controlled Electronic Potentiometer
• 8-Bit Digital-to-Analog Converter (DAC)
– Independent Reference Inputs
– Differential Non-Linearity - ±0.5LSB max
– Integral Non-Linearity - ±1LSB max
• VOUT Value in EEPROM for Power-On Recall
– Equivalent to 256-Step Potentiometer
• Unity Gain Op Amp Drives up to 1mA
• Simple Trimming Adjustment
– Up/Down Counter Style Operation
• Low Noise Operation
• Make-Before-Break Contact for “Clickless”
Transitions between DAC Steps
• Operation from +2.7V to +5.5V Supply
• Low Power, 1mW max at +5V
• No Mechanical Wearout Problem
– 1,000,000 Stores (typical)
– 100 Year Data Retention
• Fool-proof, Set-and-Forget Calibrations
theNEW
Telephone: 800.874.1874 Fax: 800.223.5138
12055 Rojas Drive • Suite K • El Paso, Texas USA 79936 • www.clarostat.com
Series CC9318
NEW
The CLAROCHIP CC9318 Digital Trimming Potentiometer is an 8-bit non-
volatile DAC designed to replace mechanical trimmers. It includes a
unity-gain amplifier to buffer the DAC output and enables VOUT to swing
from rail to rail. The Digital Trimming Potentiometer operates over a
supply voltage range of 2.7V to 5.5V. The simple up/down counter input
provides an ideal interface for automatic test equipment to dither and
monitor the VOUT voltage. This interface allows for quick and consistent
calibration of even the most sophisticated systems. The CC9318 is a
pin-compatible performance upgrade for other industry nonvolatile
potentiometers. The adjustable CLAROCHIP CC9318 offers double the reso-
lution of these devices and provides “clickless” transitions of VOUT.
-
+
Counter
&
Write
Control
INC
UP/DN
CS
GND
VH
VOUT
VDD
8-bit E2 PROM
VL
8-bit
Data
Register 8-bit DAC
2016 ILL2 1
AMP
Functional Block Diagram ..............................
CLAROCHIP™
Nonvolatile Digital Trimming Potentiometer
Features .........................................
Symbol
INC
UP/DN
VH
GND
VOUT
VL
CS
VDD
Description
Increment Input, High to Low Edge Trigger
Up/Down Input controlling relative Vout movement
V+ reference input
Analog and Digital Ground
Trimmed Voltage Output
V- reference input
Active low chip select input
Supply Voltage (2.7V to 5.5V)
INC
UP/DN
VH
GND
1
2
3
4
8
7
6
5
VDD
CS
VL
VOUT
Analog Section
The CC9318 is an 8-bit, voltage output digital-to-analog converter
(DAC). The DAC consists of a resistor network that converts an 8-bit
value into equivalent analog output voltages in proportion to the
applied reference voltage.
Reference Inputs
The voltage differential between the VLand VHinputs sets the full-
scale output voltage range. VLmust be equal to or greater than
ground (i.e. a positive voltage). VHmust be greater than VLand
less than or equal to VDD. See table on page 3 for guaranteed
operating limits.
Output Buffer Amplifier
The voltage output is a precision unity-gain follower that can slew
up to 1V/µs.
Digital Interface
The interface is designed to emulate a simple up/down counter, but
instead of a parallel count output, a ratiometric voltage output
is provided.
Chip Select (CS) is an active low input. Whenever CS is high the
CC9318 is in standby mode and consumes the least power. This
mode is equivalent to a potentiometer that is adjusted to the
required setting. When CS is low the CC9318 will recognize transi-
tions on the INC input and will move the VOUT either toward the VH
reference or toward the VLreference depending upon the state of
the UP/DN input.
The host may exit an adjustment routine in two ways: deselecting
the CC9318 while INC is low will not perform a store operation (a
subsequent power cycle will recall the original data); deselecting
the CC9318 while INC is high will store the current VOUT setting
into nonvolatile memory.
Increment (INC) is an edge triggered input. Whenever CS is low
and a high to low transition occurs on the INC input, the VOUT
voltage will either move toward VHor VLdepending upon the state
of the UP/DN input.
Up/Down (UP/DN) is an input that will determine the VOUT move-
ment relative to VHand VL. When CS is low, UP/DN is high and
there is a high to low transition on INC, the VOUT voltage will move
(1/256 th x VH-VL) toward VH. When CS and UP/DN are low, and
there is a high to low transition on INC, the VOUT will move (1/256
th x VH-VL) toward VL.
Power–Up/Power–Down Conditions
On power–up the CC9318 loads the value of EEPROM memory into
the wiper position register. The value in the register is changed
using the CS, INC, and UP/DN pins. The new data in the register
will be lost at power-down unless CS was brought high, with INC
high, to initiate a store operation after the last increment or decre-
ment. On the next device power–up, the value of EEPROM memory
will be loaded into the wiper position register. During power-up the
CC9318 is write-protected in two ways:
1) A power-on reset, that trips at approximately 2.5V, holds CS and
INC high internally.
2) Resistor pull-ups on all logic inputs prevent data change if the
inputs are floating.
Data Retention
The CC9318 is guaranteed to perform at least 1,000,000 writes to
EEPROM before a wear–out condition can occur. After EEPROM
wearout, the CC9318 continues to function as a volatile digital
potentiometer.
The wiper position can be changed during powered conditions using
the digital interface. However, on power–up the wiper position will
be indeterminate.
On shipment from the factory, CLAROSTAT does not specify any EEP-
ROM memory value. The value must be set by the customer
as needed.
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias -55°C to +125°C
Storage Temperature -65°C to +150°C
Voltage on pins with reference to GND:
Analog Inputs -0.5V to VDD+.5V
Digital Inputs -0.5V to VDD+.5V
Analog Outputs -0.5V to VDD+.5V
Digital Outputs -0.5V to VDD+.5V
Lead Solder Temperature (10 secs) 300°C
*COMMENT
Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other condi-
tions outside those listed in the operation sections of this specifica-
tion is not implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and reliability.
Page 2
Symbol Parameter Conditions Min. Typ. Max. Units
Accuracy INL Integral Non-Linearity ILOAD = 100µA - 0.5 ±1 LSB
DNL Differential Non-Linearity ILOAD = 100µA - 0.1 ±0.5 LSB
Guaranteed but not tested
References VHVrefH Input Voltage VrefL -V
DD V
VL VrefL Input Voltage Gnd - VrefH V
RIN VrefH to VrefL Resistance - 38K - Ω
TCRIN Temperature Coefficient VrefH to VrefL - 600 - ppm/°C
of RIN
Analog GEFS Full-Scale Gain Error DATA = FF - - ±1 LSB
Output VOUTZS Zero-Scale Output Voltage DATA = 00 0 20 mV
TCVOUT VOUT Temperature VDD = +5, ILOAD = 50µA,
Coefficient VrefH = +5V, VrefL = 0V - - 50 µV/°C
Guaranteed but not tested
ILAmplifier Output Load Current -200 +1000 µA
ROUT Amplifier Output Resistance IL= 100µA VDD = +5V - 10 Ω
VDD = +3V - 20 Ω
PSRR Power Supply Rejection ILOAD = 10µA - - 1 LSB/V
eN Amplifier Output Noise f = 1KHz, VDD = +5V - 90 - nV/√HZ
THD Total Harmonic Distortion VIN = 1V rms, f = 1KHz - 0.08 - %
BW Bandwidth - 3dB VIN = 100mV rms - 300 - kHz
DAC DC ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +5.5V, VrefH = VDD, VrefL = 0V, TA= -40°C to +85°C, unless specified otherwise
Symbol Parameter Min Max Unit Test Method
VZAP ESD Susceptibility 2000 V MS-883, TM 3015
ILTH Latch-Up 100 mA JEDEC Standard 17
TDR Data Retention 100 Years MS-883, TM 1008
NEND Endurance 1,000,000 Stores MS-883, TM 1033
Symbol Parameter Conditions Min Max Units
IDD Supply Current CS = VIL to VIH 1.2 mA
during store, note 1 W/INC HI
ISB Supply Standby Current CS = VIH 200 µA
IIH Input Leakage Current VIN = VDD 10 µA
IIL Input Leakage Current, note 2 VIN = 0V -25 µA
VIH High Level Input Voltage 2 VDD V
VIL Low Level Input Voltage VDD≥4.5V 0 0.8 V
Notes:
1. IDD is the supply current drawn while the EEPROM is being updated. IDD does not include the current that flows through the
Reference resistor chain.
2. CS, UP/DN and INC have internal pull-up resistors of approximately 200kΩ. When the input is pulled to ground the resulting output
current will be VDD/200kΩ.
DC ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +5.5V, VH= VDD, VL= 0V, TA= -40ºC to +85ºC, unless otherwise specified
RELIABILITY CHARACTERISTICS (over recommended operating conditions unless otherwise specified)
Page 3
Condition Min Max
Temperature -40°C +85°C
VDD +2.7V 5.5V
RECOMMENDED OPERATING CONDITIONS
INC CS UP/DN Operation
HITOLO L H VOUT toward VH
HITOLO L L VOUT toward VL
H LOTOHI X Store Setting
L LOTOHI X Maintain Setting, NO Store
X H X Standby, note 1
Notes: 1. The Standby or Operating current will be lowest with INC and UP/DN pins at H due to weak internal pull-ups that draw current when connected LO.
OPERATIONAL TRUTH TABLE
AC TIMING CHARACTERISTICS VDD = +4.5V to +5.5V
Symbol Parameter Min Max Units
tCLIL CS to INC Setup 100 ns
tIHDC INC High to UP/DN Change 100 ns
tDCIL UP/DN to INC Setup 100 ns
tIL INC Low Period 200 ns
tIH INC High Period 200 ns
tIHCH INC Inactive to CS Inactive 100 ns
tWP Write Cycle Time 5 ms
tILVOUT INC to VOUT Delay 5 µs
tCLIL tIL
tIHDC
tIH
tIHDHLD
tIHCH tWP
tILVOUT
CS
INC
UP/DN
VOUT
AC TIMING DIAGRAM
Page 4
.228 (5.80)
.244 (6.20)
.016 (.40)
.035 (.90)
.020 (.50)
.010 (.25)x45°
.0192 (.49)
.0138 (.35)
.061 (1.75)
.053 (1.35) .0098 (.25)
.004 (.127)
.05
(1.27) TYP.
.275 (6.99) TYP.
.030 (.762) TYP.
8 Places
.050
(1.27) TYP.
.050 (1.270) TYP.
8 Places
.157 (4.00)
.150 (3.80)
.196 (5.00)
1.189 (4.80) FOOTPRINT
8pn JEDEC SOIC
8 Pin SOIC (Type S) Package JEDEC (150 mil body width)
.300 (7.620)
5°-7°TYP.
(4 PLCS)
.350 (8.89) .009 ± .002
(.229 ± .051)
0°-15°
.015 (.381) Min.
.130 (3.302)
.100 (2.54)
TYP.
.018 (.457)
TYP.
.060 ± .005
(1.524) ± .127
TYP.
.130 (3.302)
SEATING PLANE
.070 (1.778) .0375 (0.952)
.375
(9.525)
PIN 1
INDICATOR
.250
(6.350)
8 Pin DIP (Type P) Package JEDEC (250 mil body width)
Package
S = 8 Pin SOIC
P = 8 Pin DIP
Base
Part Number
CC9318 S
How to Order
