Supertex inc. HV9967B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Features
3% accurate LED current
Integrated 60V, 0.8Ω MOSFET
Low sensitivity to external component variation
Single resistor LED current setting
Fixed off-time control
PWM dimming input
Output short circuit protection with skip mode
Over-temperature protection
Available in compact 8-Lead MSOP and 8-Lead
DFN packages
Applications
DC/DC or AC/DC LED drivers
RGB backlighting drivers for at panel displays
General purpose constant current source
Signage and decorative LED lighting
Chargers
General Description
The HV9967B is an average-mode current control LED driver IC
operating in a constant off-time mode.
The IC features an integrated 60V, 0.8Ω MOSFET that can be
used as a stand-alone buck converter switch, or connected as a
source driver for driving an external high-voltage depletion-mode
MOSFET. The HV9967B is powered through its switching output
when the integrated switch is off. Hence, the same external
MOSFET can be used as a high-voltage linear regulator for
powering the IC.
The LED current is programmed with one external resistor. The
average-mode current control method does not produce a peak-
to-average error, and therefore greatly improves current accuracy
and line and load regulation of the LED current without any need
for loop compensation or direct sensing of the LED current at a
high-voltage potential. The auto-zero circuit cancels the effects of
the input offset voltage and of the propagation delay of the current
sense comparator.
Typical Application Circuit
Integrated LED Driver
with Average-Mode Current Control
CIN
CDD
D1
L1
LED
String
CO
HV9967B
U1
RSENSE
VDD
PGND
PWMD
RSENSE 8
1
36
4
RT
2
RT
AGND
7
SW
+
8.0 - 60VDC
2
HV9967B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Absolute Maximum Ratings*
Parameter Value
SW to GND -0.5V to +65V
VDD to GND -0.3V to 6.0V
Other I/O to GND -0.3V to (VDD + 0.3V)
RT, ISET 2.0mA
Continuous power dissipation (TA = +25°C)
8-Lead DFN (K7)
8-Lead MSOP (MG)
1.6W
350mW
Junction temperature -40°C to +150°C
Storage temperature range -65°C to +150°C
Pin Congurations
Product Marking
8-Lead DFN (K7)
8-Lead DFN (K7)
(top view)
Electrical Characteristics
(The * denotes specications which apply over the full operating ambient temperature range of -40°C < TA < 125°C. Otherwise specications are at TA =
25°C. VSW = 10V/5mA, VDD = 5.0V unless otherwise noted)
Package may or may not include the following marks: Si or
Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Sym Description Min Typ Max Units Conditions
Input
VSWDC Input DC supply voltage range * 8.0 -60 V DC input voltage
IINSD Shut-down mode supply current - - 0.5 1.0 mA Pin PWMD to GND
8-Lead MSOP (MG)
8-Lead MSOP (MG)
(top view)
GND
SW
RSENSE
PGND
PWMD
VDD
AGND
RT
NC
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
SW
RSENSE
PGND
PWMD
VDD
AGND
RT
NC
H67B
YWLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
L = Lot Number
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
967B
LLLL
YYWW
T
op
M
ar
ki
ng
Bottom Marking
Notes:
# Not production tested; guaranteed by design or characterization.
* Specications apply over the full operating ambient temperature range of -40°C < TA < +125°C.
-G indicates package is RoHS compliant (‘Green’)
Ordering Information
Part Number Package Options Packing
HV9967BK7-G 8-Lead DFN (3x3mm) 3000/Reel
HV9967BMG-G 8-Lead SOIC 2500/Reel
Package may or may not include the following marks: Si or
3
HV9967B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Sym Description Min Typ Max Units Conditions
Internal Regulator
VDD Internally regulated voltage - 4.70 5.00 5.20 VPWMD = VDD; RT = 100kΩ
UVLO VDD undervoltage lockout threshold *4.10 - 4.70 VVDD rising, as needed to
ensure IC(MIN)
ΔUVLO VDD undervoltage lockout hysteresis - - 150 - mV VDD falling
PWM Dimming
VEN(LO) PWMD input low voltage *- - 0.8 V ---
VEN(HI) PWMD input high voltage * 2.0 - - V---
REN Internal pull down resistance at PWMD - 50 100 150 VPWMD = 5.0V
Current Control
VCS(TH) RSENSE current threshold - 243 - 257 mV ---
dVCS/dtOTemperature regulation - - 0.1 -mV/OC
TBLANK Current sense blanking interval *140 - 290 ns ---
TON(MIN) Minimum ON-time *- - 950 ns VRSENSE = VCS(TH) + 50mV
DMAX Maximum steady-state duty cycle * 80 - - %
Reduction in output LED
current occurs beyond this
duty cycle due to saturation
of T2 timers.
Short Circuit Protection
VCS(SHORT) Hiccup threshold voltage at RSENSE *355 - 440 mV ---
TDELAY Current limit delay RSENSE to SW-OFF - - - 150 ns VRSENSE = VCS(SHORT) + 50mV
THICCUP Hiccup time - - 800 - μs ---
TON(MIN) Minimum ON-time (short circuit) - - - 400 ns VRSENSE = VCS(SHORT) + 50mV
TOFF Timer
TOFF OFF time *
28 40 48
μs
RT = 400kΩ
7.0 10 12 RT = 100kΩ
0.7 1.0 1.2 RT = 10kΩ
SW Output
RON ON resistance - - 0.8 - Ω VDD = 5.0V
ICContinuous current * 0.75 - - AVDD = 4.75V,
VRSENSE = 370mV, VSW =10V
Over-temperature Protection
TSD Shut-down temperature #125 - - OC---
ΔTSD Hysteresis # -20 -OC---
Electrical Characteristics (cont.)
(The * denotes specications which apply over the full operating ambient temperature range of -40°C < TA < 125°C. Otherwise specications are at TA =
25°C. VSW = 10V/5mA, VDD = 5.0V unless otherwise noted)
Notes:
# Not production tested; guaranteed by design or characterization.
* Specications apply over the full operating ambient temperature range of -40°C < TA < +125°C.
4
HV9967B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Functional Block Diagram
R
S
Q
Q
T
OFF
Timer
SW
0.8ms
RT
VDD
POR
SET
V
CS
REG
UVLO
OTP
4.35V
100kΩ
i
RSENSE
PWMD
PGND
AGND
HV9967B
L/E
Blanking
Average
Current
Control Logic
OUT
IN
0.4V
V
CS
PGND
General description
The HV9967B employs Supertex’ proprietary control scheme,
achieving fast and very accurate control of average current
in the buck inductor through sensing the switch current only.
No compensation of the current control loop is required. The
LED current response to PWMD input is similar to that of the
peak-current control ICs, such as HV9910B. The inductor
current ripple amplitude does not affect this control scheme
signicantly, and therefore, the LED current is independent
of the variation in inductance, switching frequency or output
voltage. Constant off-time control of the buck converter is
used for stability and to reduce input voltage regulation of
the LED current.
OFF Timer
The timing resistor connected to RT determines the off-time
of the gate driver, and it must be wired to VDD. The equation
governing the off-time of the GATE output is given by:
TOFF = RT • 100pF (1)
within the range of 10kΩ ≤ RT ≤ 400kΩ.
Average Current Control Feedback and Output
Short Circuit Protection
The constant-current control feedback derives the aver-
age current signal from the source current of the switching
MOSFET. This current is detected using a sense resistor at
the RSENSE pin. The feedback operates in a fast open-loop
mode. No compensation is required. Output current is pro-
grammed simply as:
ILED = 0.25V (2)
RCS
The above equation is only valid for continuous conduction
of the output inductor. It is a good practice to design the in-
ductor such that the switching ripple current in it is 30~40%
of its average full load DC current peak-to-peak. Hence, the
recommended inductance can be calculated as:
LO =
VO(MAX) • TOFF (3)
0.4 • IO
The duty-cycle range of the current control feedback is lim-
ited to D 0.8. A reduction in the LED current may occur
when the LED string voltage VO is greater than 80% of the
input voltage VIN of the HV9967B LED driver.
Application Information
5
HV9967B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Reducing the output LED voltage VO below VO(MIN) = VIN DMIN,
where DMIN = 0.8µs/(TOFF + 0.8µs), may also result in the loss
of regulation of the LED current. This condition, however,
causes increase in the LED current and can potentially trip
the short-circuit protection comparator threshold.
The short circuit protection comparator trips when the volt-
age at RSENSE exceeds 0.4V. When this occurs, the SW
off-time THICCUP = 800µs is generated to prevent stair-casing
of the inductor current and potentially its saturation due to
insufcient output voltage. The typical short-circuit current is
shown in the waveform of Fig. 1.
Fig.1. Short-circuit inductor current.
A leading-edge blanking delay is provided at RSENSE to
prevent false triggering of the current feedback and the short
circuit protection.
SW Input and Linear Regulator
HV9967B includes an integrated 60V, 0.8Ω switching
MOSFET at the SW input. The power for the IC is supplied
from a linear 5.0V regulator that is also derived from the SW
input.
PWM Dimming
The HV9967B features a TTL compatible dimming input
PWMD. Applying a square-wave voltage to PWMD will mod-
ulate the duty ratio of the LED current accordingly. The rising
and falling edges are limited by the current slew rate in the
inductor. The rst switching cycle is terminated upon reach-
ing the 250mV level at RSENSE. The circuit will reach the
steady state within 3~4 switching cycles regardless of the
switching frequency.
Over-Temperature Protection
The HV9967B includes over-temperature protection. Typi-
cally, when the junction temperature exceeds 145OC, switch-
ing of the SW input is disabled. The switching resumes when
the temperature falls by approximately 20OC from the trip
point.
800µs
0.44V/R
SENSE
Pin Description
Pin # Function Description
1SW Drain of 60V 0.8Ω NDMOS switch and input of H/V regulator.
2RSENSE Source of NDMOS switch and current sense input.
Connect a resistor to GND to program the output current and short circuit thresholds.
3PGND Power ground. Must be wired to AGND on PCB.
4 PWMD PWM dimming input. This TTL input enables switching of SW when in high state.
5 NC No connection.
6RT Resistor connected between RT and VDD programs the off-time of SW.
7AGND Analog ground (0V).
8 VDD Power supply for all internal circuits. Bypass with a low ESR capacitor to PGND (>0.5μF).
Connect GATE of external depletion-mode NFET for high-voltage operation.
6
HV9967B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
8-Lead DFN Package Outline (K7)
3.00x3.00mm body, 0.80mm height (max), 0.65mm pitch
Symbol A A1 A3 b D D2 E E2 e L L1 θ
Dimension
(mm)
MIN 0.70 0.00
0.20
REF
0.25 2.85* 1.60 2.85* 1.35
0.65
BSC
0.30 0.00* 0O
NOM 0.75 0.02 0.30 3.00 -3.00 - 0.40 - -
MAX 0.80 0.05 0.35 3.15* 2.50 3.15* 1.75 0.50 0.15 14O
JEDEC Registration MO-229, Variation WEEC-2, Issue C, Aug. 2003.
* This dimension is not specied in the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-8DFNK73X3P065, Version C081109.
Seating
Plane
θ
Top View
Side View
Bottom View
A
A1
D
E
D2
e
b
E2
A3
L
L1
View B
View B
Note 1
(Index Area
D/2 x E/2)
Note 3
Note 2
Note 1
(Index Area
D/2 x E/2)
1
1
88
Notes:
1. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier; an embedded metal marker; or
a printed indicator.
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.
3. The inner tip of the lead may be either rounded or square.
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2012 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
7
HV9967B
(The package drawing(s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
1
8
Seating
Plane
Gauge
Plane
θ
L
L1
L2
E
E1
D
eb
AA2
A1
Seating
Plane
A
A
Top View
Side View View A-A
View B
View B
θ1 (x4)
Note 1
(Index Area
D/2 x E1/2)
Symbol A A1 A2 b D E E1 e L L1 L2 θ θ1
Dimension
(mm)
MIN 0.75* 0.00 0.75 0.22 2.80* 4.65* 2.80*
0.65
BSC
0.40
0.95
REF
0.25
BSC
0O5O
NOM - - 0.85 - 3.00 4.90 3.00 0.60 - -
MAX 1.10 0.15 0.95 0.38 3.20* 5.15* 3.20* 0.80 8O15O
JEDEC Registration MO-187, Variation AA, Issue E, Dec. 2004.
* This dimension is not specied in the JEDEC drawing.
Drawings are not to scale.
Supertex Doc. #: DSPD-8MSOPMG, Version H041309.
Note:
1. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier; an embedded metal marker; or
a printed indicator.
8-Lead MSOP Package Outline (MG)
3.00x3.00mm body, 1.10mm height (max), 0.65mm pitch
Doc.# DSFP-HV9967B
B042312