IRFP064N
HEXFET® Power MOSFET
PD - 9.1383A
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because of its isolated mounting
hole.
S
D
G
VDSS = 55V
RDS(on) = 0.008Ω
ID = 110A
lAdvanced Process Technology
lUltra Low On-Resistance
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Description
TO-247AC
8/25/97
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 110
ID @ T C = 100°C Continuous Drain Current, VGS @ 10V 80A
IDM Pulsed Drain Current 390
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1. 3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy 480 mJ
IAR Avalanche Current59 A
EAR Repetitive Avalanche Energy20 mJ
dv /d t Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75
RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient ––– 40
Thermal Resistance
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Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 –– – –– – V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.008 ΩVGS = 10V, ID = 59A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 42 ––– ––– S VDS = 25V, I D = 59A
––– ––– 25 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 10 0 V GS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge ––– –– – 170 ID = 59A
Qgs Gate-to-Source Charge ––– ––– 32 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– – – – 74 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 1 4 ––– V DD = 28V
trRise Time ––– 100 ––– I D = 59A
td(off) Turn-Off Delay Time ––– 43 ––– R G = 2.5Ω
tfFall Time ––– 70 ––– RD = 0.39Ω, See Fig. 10
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 4000 ––– VGS = 0V
Coss Output Capacitance ––– 1300 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 480 ––– ƒ = 1.0MHz, See Fig. 5
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
5.0
IDSS Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
VDD = 25V, starting TJ = 25°C, L = 190µH
RG = 25Ω, IAS = 59A. (See Figure 12)
ISD ≤ 59A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Caculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the
package refer to Design Tip # 93-4
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 59A, VGS = 0V
trr Reverse Recovery Time ––– 110 1 7 0 ns TJ = 25°C, IF = 59A
Qrr Reverse Recovery Charge ––– 450 680 nC di/dt = 100A/µs
Source-Drain Ratings and Characteristics
S
D
G
110
390
13
Uses IRF3205 data and test conditions
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IRFP064N
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
10
100
1000
0.1 1 10 100
I , Dra in-to-Sou rce Current (A )
D
V , D rain-to-Source V oltage (V )
DS
V G S
TO P 15 V
1 0V
8 .0V
7 .0V
6 .0V
5 .5V
5 .0V
BO TTOM 4.5V
20µs PULSE WIDTH
T = 25 ° C
C
A
4.5 V
10
100
1000
0.1 1 10 100
4.5V
I , Drain -to-S ource C urrent (A)
D
V , D ra in -to-So urc e V oltag e (V)
DS
V GS
TO P 15V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
BO TTOM 4.5V
20µs PULSE WIDTH
T = 175°C
C
A
1
10
100
1000
45678910
T = 25°C
J
GS
V , Gate-to-So urce Voltage (V)
D
I , Dra in -to -So u rce Cu rren t (A)
T = 175°C
J
A
V = 25V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Ju nc t io n T em per atu r e (°C )
R , D rain -to -Sourc e O n R e sistan ce
DS(on)
(Normalized)
V = 10V
GS
A
I = 9 8A
D
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IRFP064N
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
1000
2000
3000
4000
5000
6000
7000
8000
1 10 100
C, Ca pacitance (pF)
DS
V , Dr ai n-to - So ur c e V oltage (V )
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0 30 60 90 120 150 180
Q , Total G a te Ch arg e (nC )
G
V , Gate-to -Sou rc e Voltage (V)
GS
A
FO R TEST CIRCUIT
SEE F IGURE 1 3
I = 59 A
V = 44V
V = 28V
V = 11V
D
DS
DS
DS
10
100
1000
0.6 1.0 1.4 1.8 2.2 2.6 3.0
T = 25°C
J
V = 0V
GS
V , So ur c e-to-D r ain Volt a ge (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100
V , D ra in -to-So urc e Vo ltag e (V)
DS
I , D ra in C urrent (A)
O PERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 2 5° C
T = 1 75 ° C
Single Pulse
C
J
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IRFP064N
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
20
40
60
80
100
120
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
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IRFP064N
V
DS
L
D.U.T.
V
DD
I
AS
t
p
0.01Ω
R
G
+
-
t
p
V
DS
I
AS
V
DD
V
(BR)DSS
10 V
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
0
200
400
600
800
1000
1200
25 50 75 100 125 150 175
J
E , S in gle Pu lse Avalanche E nerg y (m J)
AS
A
Starting T , Junction Temperature (°C)
V = 25 V
I
T OP 24A
42 A
BOTTOM 59A
DD
D
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IRFP064N
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
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IRFP064N
PAR T NUM BER
INTERNATIONAL
RE CTIFIER
LO GO
EX AM PLE : TH IS IS AN IR F1010
WITH ASSEMBLY
LOT C ODE 9B1 M
ASSEMBLY
L O T C O DE
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
9246
IRF1010
9B 1M
A
Part Marking Information
TO-247AC
Package Outline
TO-247AC Outline
Dimensions are shown in millimeters (inches)
LEAD AS SIGN MEN T S
NOTES:
- D - 5.30 (.209)
4.70 (.185)
2.50 (.089)
1.50 (.059)
4
3X 0.80 (.031)
0.40 (.016)
2.60 (.102)
2.20 (.087)
3.40 (.133)
3.00 (.118)
3X
0.25 (.010) MCA
S
4.30 (.170)
3.70 (.145)
- C -
2X 5. 50 ( .2 17 )
4. 50 ( .1 77 )
5.50 (.217)
0.25 (.010)
1.40 (.056)
1.00 (.039)
3.65 (.143)
3.55 (.140) DMMB
- A -
15.90 (.626)
15.30 (.602)
- B -
123
20.30 (.800)
19.70 (.775)
14.80 (.583)
14.20 (.559)
2.40 (.094)
2.00 (.079)
2X
2X
5.45 (.215)
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 CONFORMS TO JE DEC OUTLINE
TO-247- AC.
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
INTERNATIONAL
RECT IF IER
LOGO
ASSEMBLY
LOT CODE
EX AMPLE : THIS IS AN IRFPE30
W ITH ASSEM BLY
LOT CODE 3A1Q PAR T NUMBER
DA TE CO DE
(YYWW )
YY = YEAR
WW WEEK
3A1Q 9302
IRFPE30
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 8 /97
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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