TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 D D D D D D D D PACKAGE (TOP VIEW) Fast Transient Response Using Small Output Capacitor (10 F) 200-mA Low-Dropout Voltage Regulator Available in 1.5-V, 1.8-V, 2.5-V, 3-V and 3.3-V Dropout Voltage Down to 170 mV at 200 mA (TPS7433) 3% Tolerance Over Specified Conditions 8-Pin SOIC Package Thermal Shutdown Protection EN NC NC IN 1 8 2 7 3 6 4 5 SENSE OUT GND IN NC - No internal connection description This device is designed to have a fast transient response and be stable with 1-F capacitors. This combination provides high performance at a reasonable cost. Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 170 mV at an output current of 200-mA for the TPS7433). This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 A at TJ = 25C. The TPS74xx is offered in 1.5-V, 1.8-V, 2.5-V, 3-V, and 3.3-V. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS74xx family is available in 8 pin SOIC package. TPS7433 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE TPS7418 LOAD TRANSIENT RESPONSE 100 300 VO - Change in Output Voltage - mV VI = 3.2 V IO = 200 mA 200 150 100 I O - Output Current - mA VDO - Dropout Voltage - mV 250 IO = 75 mA IO = 50 mA 50 IO = 1 mA 0 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - C di/dt = 200 mA 25 s 50 CO = 10 F 0 -50 200 0 0 100 200 300 400 500 600 700 800 900 1000 t - Time - s Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 AVAILABLE OPTIONS TJ OUTPUT VOLTAGE (V) PACKAGED DEVICES TYP SOIC (D) 3.3 TPS7433D 3 TPS7430D 2.5 TPS7425D 1.8 TPS7418D 1.5 TPS7415D - 40C to 125C The D package is available taped and reeled. Add an R suffix to the device type (e.g., TPS7433DR). TPS74xx 4 VI 5 SENSE IN SENSE IN OUT 1 F 8 7 VO 1 EN + GND 6 CO 1 F ESR See application information section for capacitor selection details. Figure 1. Typical Application Configuration functional block diagram IN EN _ + OUT SENSE R1 Vref R2 GND 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 Terminal Functions TERMINAL NAME NO. EN 1 GND I/O DESCRIPTION I Enable input 6 IN 4, 5 NC 2, 3 Regulator ground I Input voltage Not connected OUT 7 O Regulated output voltage SENSE 8 I Sense absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 V to 8 V Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VI + 0.3 V Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating tables Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 125C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network terminal ground. DISSIPATION RATING TABLE 1 - FREE-AIR TEMPERATURES PACKAGE AIR FLOW (CFM) TA < 25C POWER RATING DERATING FACTOR ABOVE TA = 25C TA = 70C POWER RATING TA = 85C POWER RATING 0 568 mW 5.68 mW/C 312 mW 227 mW 250 904 mW 9.04 mW/C 497 mW 361 mW D recommended operating conditions MIN Input voltage, VI Output current, IO (see Note 1) MAX 2.5 7 0 200 UNIT V mA Operating virtual junction temperature, TJ (see Note 1) - 40 125 C To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load). NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 electrical characteristics over recommended operating free-air temperature range, Vi = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, CO = 1 F (unless otherwise noted) PARAMETER TEST CONDITIONS TEST CONDITIONS MIN TYP MAX UNIT 2 5 V < VI < 7 V 2.5 TJ = 25C TJ = -40C to 125C 2 8 V < VI < 7 V 2.8 TJ = 25C TJ = -40C to 125C TPS7425 3 5 V < VI < 7 V 3.5 TJ = 25C TJ = -40C to 125C 2.425 TPS7430 4 0 V < VI < 7 V 4.0 TJ = 25C TJ = -40C to 125C 2.910 4 3 V < VI < 7 V 4.3 TJ = 25C TJ = -40C to 125C mA IO = 1 mA, EN = 0 V TJ = 25C TJ = -40C to 125C 80 IO = 100 mA, mA EN = 0 V TJ = 25C TJ = -40C to 125C 550 mA EN = 0 V IO = 200 mA, TJ = 25C TJ = -40C to 125C 1300 VO + 1 V < VI 7 V, TJ = 25C 0.06 %/V 5 mV Output noise voltage BW = 300 Hz to 50 kHz, TJ = 25C CO = 1 F, Output current Limit VO = 0 V TPS7415 TPS7418 Output voltage g ((10 A to 200 mA load)) (see Note 2) TPS7433 Quiescent current (GND current) (See Note 2) Output voltage line regulation (VO/VO) (see Notes 2 and 3) 1.5 1.455 1.545 1.8 1.746 1.854 2.5 2.575 3.0 3.090 3.3 3.201 3.399 115 850 1500 Load regulation 500 750 1 A 2.5 V < VI < 7 V, TJ = -40C to 125C EN = VI, 3 A 2 V 0.7 Dropout voltage (see Note 4) TPS7433 mA EN = VI, Low level enable input voltage TPS7430 A 2.5 V < VI < 7 V, TJ = 25C High level enable input voltage Power supply ripple rejection (see Note 2) A C 150 Input current (EN) A Vrms 190 Thermal shutdown junction temperature Standby current V EN = 0 V -1 1 EN = VI -1 1 CO = 1 F, f = 100 Hz, TJ = 25C IO = 200 mA, IO = 200 mA, IO = 200 mA, 55 TJ = 25C TJ = -40C to 125C 180 TJ = 25C TJ = -40C to 125C 170 V A dB 350 mV IO = 200 mA, 315 NOTES: 2. Minimum IN operating voltage is 2.5 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 7 V. 3. If VO = 1.5 V then Vimax = 7 V, Vimin = 2.5 V: 4. IN voltage equals VO(Typ) - 100 mV; TPS7430 and TPS7433 dropout limited by input voltage range limitations (i.e., TPS7430 input voltage needs to drop to 2.9 V for purpose of this test). Line Reg. (mV) + %V V O If VO 2.5 V then Vimax = 7 V, Vimin = VO + 1 V: Line Reg. (mV) + %V 4 V POST OFFICE BOX 655303 O V * 2.5 V imax 100 V imax * V O 1000 )1 V 100 * DALLAS, TEXAS 75265 1000 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 Table of Graphs FIGURE VO vs Output current Output voltage Zo VDO 2, 3, 4 vs Junction temperature 5, 6 Ground current vs Junction temperature 7, 8 Power supply ripple rejection vs Frequency 12 Output noise vs Frequency 9 Output impedance vs Frequency 10 Dropout voltage vs Junction temperature 11 Line transient response 13, 15 Load transient response 14, 16 Output voltage vs Time 17 (Stability) Equivalent series resistance (ESR) vs Output current 19 TYPICAL CHARACTERISTICS TPS7418 TPS7433 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 3.310 1.810 VI = 4.3 V TA = 25C VO - Output Voltage - V VO - Output Voltage - V VI = 2.8 V TA = 25C 1.805 1.800 3.305 3.300 1.795 0 50 100 150 200 250 0 50 100 150 200 250 IO - Output Current - mA IO - Output Current - mA Figure 3 Figure 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 TYPICAL CHARACTERISTICS TPS7425 TPS7418 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 2.5 1.820 VI = 4.0 V VI = 3.5 V TA = 25C 1.818 1.816 VO - Output Voltage - V VO - Output Voltage - V 2.498 2.496 2.494 1.814 IO = 1 mA 1.812 IO = 50 mA 1.810 IO = 100 mA 1.808 1.806 2.492 IO = 200 mA 1.804 2.49 0 50 100 150 200 1.802 -50 -25 250 0 25 50 75 100 125 150 TJ - Junction Temperature - C IO - Output Current - mA Figure 4 Figure 5 TPS7433 TPS7418 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE GROUND CURRENT vs JUNCTION TEMPERATURE 10000 3.330 VI = 4.3 V VI = 2.8 V 3.325 IO = 1 mA 3.315 3.310 IO = 50 mA 3.305 IO = 100 mA 3.300 IO = 100 mA 100 IO = 1 mA 10 3.295 IO = 200 mA 3.290 3.285 -50 -25 0 25 50 75 100 125 150 1 -50 TJ - Junction Temperature - C 0 50 Figure 7 POST OFFICE BOX 655303 100 TJ - Junction Temperature - C Figure 6 6 IO = 200 mA 1000 Ground Current - A VO - Output Voltage - V 3.320 * DALLAS, TEXAS 75265 150 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 TYPICAL CHARACTERISTICS TPS7433 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY GROUND CURRENT vs JUNCTION TEMPERATURE 20 V Hz 10000 VI =4.3 V Output Spectral Noise Density IO = 200 mA Ground Current - A 1000 IO = 100 mA 100 IO = 1 mA 10 1 -50 0 100 50 150 TJ - Junction Temperature - C VI = 4.3 V CL = 1 F TA = 25C IO = 1 mA 2 V Hz IO = 200 mA 200 nV Hz 20 nV Hz 2 nV Hz 250 1k 10k 100k f - Frequency - Hz Figure 8 Figure 9 TPS7430 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE OUTPUT IMPEDANCE vs FREQUENCY 250 100 VI = 2.9 V CL = 1 F: IO = 1 mA 200 VDO - Dropout Voltage - mV Zo - Output Impedance - VI = 4.3 V CL = 1 F TA = 25C 10 1 CL = 1 F IO = 200 mA 0.1 0.01 0.01 0.1 1 10 100 1000 200 mA 150 100 mA 100 50 0 -40 10 mA 10 60 110 TJ - Junction Temperature - C f - Frequency - kHz Figure 10 Figure 11 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 TYPICAL CHARACTERISTICS RIPPLE REJECTION vs FREQUENCY 80 Ripple Rejection - dB 70 CL = 1 F IO = 100 mA 60 CL = 1 F IO = 1 mA 50 40 30 CL = 1 F IO = 200 mA 20 10 0 10 100 1k 10k 100k 1M 10M f - Frequency - Hz Figure 12 TPS7418 LINE TRANSIENT RESPONSE TPS7418 LOAD TRANSIENT RESPONSE VO - Change in Output Voltage - mV VO - Change in Output Voltage - mV 100 200 0 -200 I O - Output Current - mA VI - Input Voltage - V -300 3.8 2.8 CO = 1 F 0 0.1 0.2 0.3 0.4 0.5 0.6 t - Time - ms 0.7 0.8 0.9 1 di/dt = 200 mA 25 s 50 0 -50 200 0 0 0.1 0.2 0.3 0.4 0.5 0.6 t - Time - ms Figure 14 Figure 13 8 POST OFFICE BOX 655303 CO = 10 F * DALLAS, TEXAS 75265 0.7 0.8 0.9 1 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 TYPICAL CHARACTERISTICS TPS7433 LINE TRANSIENT RESPONSE TPS7433 LOAD TRANSIENT RESPONSE VO - Change in Output Voltage - mV 200 0 I O - Output Current - mA -200 5.3 4.3 CO = 1 F 0.1 0.2 0.3 0.4 0.5 0.6 t - Time - ms 0.7 0.8 0.9 CO = 10 F di/dt = 200 mA 25 s 50 0 -50 -50 200 0 0 0 1 0.1 0.2 0.3 0.4 0.5 0.6 t - Time - ms 0.7 0.8 0.9 1 Figure 16 Figure 15 TPS7433 OUTPUT VOLTAGE vs TIME (AT STARTUP) VO- Output Voltage - V 0 VI = 7 V 4 2 0 5 Enable Pulse - V VI - Input Voltage - V VO - Change in Output Voltage - mV 100 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 t - Time - ms Figure 17 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 TYPICAL CHARACTERISTICS VI To Load IN OUT + EN CO RL GND ESR Figure 18. Test Circuit for Typical Regions of Stability (Figure 19) TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT ESR - Equivalent Series Resistance - 100 10 1 0.1 Region of Instability 0.01 0 50 100 150 200 IO - Output Current - mA Figure 19 ESR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO. 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 APPLICATION INFORMATION The TPS74xx family includes five voltage regulators (1.5 V, 1.8 V, 2.5 V, 3 V, and 3.3 V). minimum load requirements The TPS74xx family is stable even at zero load; no minimum load is required for operation. SENSE terminal connection The SENSE terminal must be connected to the regulator output for proper functioning of the regulator. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit (remote sense) to improve performance at that point. Internally, SENSE connects to a high-impedance wide-bandwidth amplifier through a resistor-divider network and noise pickup feeds through to the regulator output. Routing the SENSE connection to minimize/avoid noise pickup is essential. Adding an RC network between SENSE and OUT to filter noise is not recommended because it can cause the regulator to oscillate. external capacitor requirements An input capacitor is not usually required; however, a ceramic bypass capacitor (1 F or larger) improves load transient response and noise rejection if the TPS74xx is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. Like all low dropout regulators, the TPS74xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 1 F and the ESR (equivalent series resistance) must be at least 300 m. Solid tantalum electrolytic and aluminum electrolytic are all suitable, provided they meet the requirements described previously. TPS74xx VI 4 5 SENSE IN SENSE IN OUT 1 F 8 7 VO 1 EN + GND 6 CO 1 F ESR Figure 20. Typical Application Circuit regulator protection The TPS74xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 APPLICATION INFORMATION regulator protection (continued) The TPS74xx also features internal current limiting and thermal protection. During normal operation, the TPS74xx limits output current to approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130C (typ), regulator operation resumes. power dissipation and junction temperature Specified regulator operation is assured to a junction temperature of 125C; the maximum junction temperature should be restricted to 125C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: P D(max) * TA + TJmax R qJA Where TJmax is the maximum allowable junction temperature. RJA is the thermal resistance junction-to-ambient for the package, i.e., 172C/W for the 8-terminal SOIC. TA is the ambient temperature. The regulator dissipation is calculated using: P D + VI * VO I O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TPS7415, TPS7418, TPS7425, TPS7430, TPS7433 FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR 200-mA LOW-DROPOUT VOLTAGE REGULATORS SLVS212 - DECEMBER 1999 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN PINS ** 0.050 (1,27) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.244 (6,20) 0.228 (5,80) 0.008 (0,20) NOM 0.157 (4,00) 0.150 (3,81) 1 Gage Plane 7 A 0.010 (0,25) 0- 8 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) 4040047 / B 03/95 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Four center pins are connected to die mount pad. Falls within JEDEC MS-012 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 PACKAGE OPTION ADDENDUM www.ti.com 17-Jun-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS7415D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7415DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7415DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7415DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7418D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7418DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7425D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7425DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7425DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7425DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7430D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7430DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7433D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7433DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7433DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS7433DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 17-Jun-2008 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS7415DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS7425DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS7433DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS7415DR SOIC D 8 2500 346.0 346.0 29.0 TPS7425DR SOIC D 8 2500 346.0 346.0 29.0 TPS7433DR SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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