TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Fast Transient Response Using Small
Output Capacitor (10 µF)
D
200-mA Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V, 3-V and 3.3-V
D
Dropout Voltage Down to 170 mV at 200 mA
(TPS7433)
D
3% Tolerance Over Specified Conditions
D
8-Pin SOIC Package
D
Thermal Shutdown Protection
description
This device is designed to have a fast transient response and be stable with 1-µF capacitors. This combination
provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 170 mV
at an output current of 200-mA for the TPS7433). This LDO family also features a sleep mode; applying a TTL
high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at
TJ = 25°C.
The TPS74xx is offered in 1.5-V, 1.8-V, 2.5-V, 3-V, and 3.3-V. Output voltage tolerance is specified as a
maximum of 3% over line, load, and temperature ranges. The TPS74xx family is available in 8 pin SOIC
package.
–50
200
50
0
100
0
t – Time – µs
CO = 10 µF
TPS7418
LOAD TRANSIENT RESPONSE
0 300200100 400 500 700600 800 900 1000
I – Output Current – mA
OVO– Change in
∆
Output Voltage – mV
di/dt =
TJ – Junction Temperature – °C
100
0
150
50
–50
300
200
250
– Dropout Voltage – mV
VDO
TPS7433
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
–25 250 50 75 100 125 150
IO = 50 mA
IO = 1 mA
IO = 75 mA
IO = 200 mA
VI = 3.2 V 200 mA
25 µs
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
1
2
3
4
8
7
6
5
EN
NC
NC
IN
SENSE
OUT
GND
IN
D PACKAGE
(TOP VIEW)
NC – No internal connection
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
TJ
OUTPUT VOLTAGE
(V) PACKAGED DEVICES
T
JTYP SOIC
(D)
3.3 TPS7433D
3 TPS7430D
–40°C to 125°C2.5 TPS7425D
1.8 TPS7418D
1.5 TPS7415D
The D package is available taped and reeled. Add an R suffix to the device type (e.g.,
TPS7433DR).
†See application information section for capacitor selection details.
OUT
4
1
IN
EN
GND
6
8
7
VI
1 µF
ESR
VO
1 µF
+
TPS74xx
CO†
IN
5SENSE SENSE
Figure 1. Typical Application Configuration
functional block diagram
_
+
Vref
OUT
EN
GND
R1
R2
IN
SENSE
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
EN 1 I Enable input
GND 6Regulator ground
IN 4, 5 IInput voltage
NC 2, 3 Not connected
OUT 7 O Regulated output voltage
SENSE 8 I Sense
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Ĕ
Input voltage range‡, VI –0.3 V to 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, TJ –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
‡All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
PACKAGE AIR FLOW
(CFM) TA < 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
D
0568 mW 5.68 mW/°C312 mW 227 mW
D
250 904 mW 9.04 mW/°C497 mW 361 mW
recommended operating conditions
MIN MAX UNIT
Input voltage, VI§2.5 7 V
Output current, IO (see Note 1) 0 200 mA
Operating virtual junction temperature, TJ (see Note 1) –40 125 °C
§ To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load).
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
Vi = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, CO = 1 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS TEST CONDITIONS MIN TYP MAX UNIT
TPS7415
25V<V
I<7V
TJ = 25°C 1.5
TPS7415
2
.
5
V
<
V
I <
7
V
TJ = –40°C to 125°C 1.455 1.545
TPS7418
28V<V
I<7V
TJ = 25°C 1.8
TPS7418
2
.
8
V
<
V
I <
7
V
TJ = –40°C to 125°C 1.746 1.854
Output voltage (10 µA to 200 mA load)
TPS7425
35V<V
I<7V
TJ = 25°C 2.5
V
g( µ)
(see Note 2)
TPS7425
3
.
5
V
<
V
I <
7
V
TJ = –40°C to 125°C 2.425 2.575
V
TPS7430
40V<V
I<7V
TJ = 25°C 3.0
TPS7430
4
.
0
V
<
V
I <
7
V
TJ = –40°C to 125°C 2.910 3.090
TPS7433
43V<V
I<7V
TJ = 25°C 3.3
TPS7433
4
.
3
V
<
V
I <
7
V
TJ = –40°C to 125°C 3.201 3.399
IO= 1 mA EN = 0 V
TJ = 25°C 80
µA
I
O =
1
mA
,
EN
=
0
V
TJ = –40°C to 125°C115 µ
A
Quiescent current (GND current) (See Note 2)
IO=100mA EN=0V
TJ = 25°C 550
µA
Q
u
iescent
c
u
rrent
(GND
c
u
rrent)
(See
Note
2)
I
O =
100
mA
,
EN
=
0
V
TJ = –40°C to 125°C 850 µ
A
IO=200mA EN=0V
TJ = 25°C 1300
µA
I
O =
200
mA
,
EN
=
0
V
TJ = –40°C to 125°C 1500 µ
A
Output voltage line regulation (∆VO/VO)
(see Notes 2 and 3) VO + 1 V < VI ≤ 7 V, TJ = 25°C 0.06 %/V
Load regulation 5 mV
Output noise voltage BW = 300 Hz to 50 kHz,
TJ = 25°CCO = 1 µF, 190 µVrms
Output current Limit VO = 0 V 500 750 mA
Thermal shutdown junction temperature 150 °C
Standby current
2.5 V < VI < 7 V,
TJ = 25°CEN = VI, 1µA
Standb
y
c
u
rrent
2.5 V < VI < 7 V,
TJ = –40°C to 125°CEN = VI, 3µA
High level enable input voltage 2 V
Low level enable input voltage 0.7 V
In
p
ut current (EN)
EN = 0 V –1 1
µA
Inp
u
t
c
u
rrent
(EN)
EN = VI–1 1 µ
A
Power supply ripple rejection (see Note 2) f = 100 Hz,
TJ = 25°CCO = 1 µF, 55 dB
TPS7430
IO = 200 mA, TJ = 25°C 180
Dro
p
out voltage (see Note 4)
TPS7430
IO = 200 mA, TJ = –40°C to 125°C 350
mV
Dropo
u
t
v
oltage
(see
Note
4)
TPS7433
IO = 200 mA, TJ = 25°C 170
mV
TPS7433
IO = 200 mA, TJ = –40°C to 125°C 315
NOTES: 2. Minimum IN operating voltage is 2.5 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 7 V.
3. If VO = 1.5 V then Vimax = 7 V, Vimin = 2.5 V:
4. IN voltage equals VO(Typ) – 100 mV; TPS7430 and TPS7433 dropout limited by input voltage range limitations (i.e., TPS7430 input
voltage needs to drop to 2.9 V for purpose of this test).
Line Reg. (mV)
+ǒ
%
ń
V
Ǔ
VO
ǒ
Vimax
*
2.5 V
Ǔ
100
1000
If VO ≥ 2.5 V then Vimax = 7 V, Vimin = VO + 1 V:
Line Reg. (mV)
+ǒ
%
ń
V
Ǔ
VO
ǒ
Vimax
*ǒ
VO
)
1V
ǓǓ
100
1000
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Table of Graphs
FIGURE
Out
p
ut voltage
vs Output current 2, 3, 4
O
O
u
tp
u
t
v
oltage
vs Junction temperature 5, 6
Ground current vs Junction temperature 7, 8
Power supply ripple rejection vs Frequency 12
Output noise vs Frequency 9
ZoOutput impedance vs Frequency 10
VDO Dropout voltage vs Junction temperature 11
Line transient response 13, 15
Load transient response 14, 16
Output voltage vs Time 17
(Stability) Equivalent series resistance (ESR) vs Output current 19
TYPICAL CHARACTERISTICS
Figure 2
IO – Output Current – mA
TPS7418
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
50 100
1.805
1.800
1.795 150 250
1.810
0 200
– Output Voltage – V
VO
VI = 2.8 V
TA = 25°C
Figure 3
IO – Output Current – mA
3.300 50 100 150 250
3.310
0 200
VI = 4.3 V
TA = 25°C
– Output Voltage – V
VO
TPS7433
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.305
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 4
IO – Output Current – mA
TPS7425
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
2.49
50 100
2.5
2.496
150 2500 200
– Output Voltage – V
VO
VI = 3.5 V
TA = 25°C
2.498
2.494
2.492
Figure 5
TJ – Junction Temperature – °C
TPS7418
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
1.806
1.802
1.816
1.812
1.820
– Output Voltage – V
VO
1.818
1.814
1.810
1.808
1.804
–50 –25 250 50 75 100 125 150
IO = 50 mA
IO = 100 mA
IO = 1 mA
VI = 4.0 V
IO = 200 mA
Figure 6
TJ – Junction Temperature – °C
TPS7433
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
3.285
3.330
3.305
3.315
– Output Voltage – V
VO
3.325
3.320
3.310
3.300
3.295
3.290
–50 –25 250 50 75 100 125 150
VI = 4.3 V
IO = 1 mA
IO = 50 mA
IO = 100 mA
IO = 200 mA
Figure 7
TJ – Junction Temperature – °C
100
10 150
10000
–50 50
1000
VI = 2.8 V
100
IO = 1 mA
TPS7418
GROUND CURRENT
vs
JUNCTION TEMPERATURE
Ground Current – Aµ
IO = 200 mA
IO = 100 mA
10
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 8
TJ – Junction Temperature – °C
0150
–50 50
VI =4.3 V
100
IO = 1 mA
TPS7433
GROUND CURRENT
vs
JUNCTION TEMPERATURE
Ground Current – Aµ
100
1
10000
1000
IO = 200 mA
10
IO = 100 mA
Figure 9
f – Frequency – Hz
1k 10k 100k
250
Output Spectral Noise Density
IO = 1 mA
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
2nV Hz
Ǹ
20nV Hz
Ǹ
200nV Hz
Ǹ
2µVHz
Ǹ
20µVHz
Ǹ
IO = 200 mA
VI = 4.3 V
CL = 1 µF
TA = 25°C
Figure 10
0.1
0.1 1 1000
10
0.01 10
1
f – Frequency – kHz 100
– Output Impedance –ZoΩ
OUTPUT IMPEDANCE
vs
FREQUENCY
VI = 4.3 V
CL = 1 µF
TA = 25°C
CL = 1 µF:
IO = 1 mA
CL = 1 µF
IO = 200 mA
100
0.01
Figure 11
TJ – Junction Temperature – °C
100
010
150
50
110–40 60
200
250 VI = 2.9 V
– Dropout Voltage – mV
VDO
TPS7430
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
200 mA
100 mA
10 mA
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
f – Frequency – Hz
100 1k 10k10
Ripple Rejection – dB
RIPPLE REJECTION
vs
FREQUENCY
0
20
40
60
80
50
70
30
10
100k 1M 10M
CL = 1 µF
IO = 100 mA CL = 1 µF
IO = 1 mA
CL = 1 µF
IO = 200 mA
Figure 12
Figure 13
VO– Change in
–200
3.8
–300
2.8
200
0
TPS7418
LINE TRANSIENT RESPONSE
VI
t – Time – ms
0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1
CO = 1 µF
– Input Voltage – V ∆
Output Voltage – mV
Figure 14
–50
200
50
0
100
0
t – Time – ms
CO = 10 µF
TPS7418
LOAD TRANSIENT RESPONSE
0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1
I – Output Current – mA
OVO– Change in
∆
Output Voltage – mV
200 mA
25 µs
di/dt =
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 15
–200
5.3
4.3
200
0
TPS7433
LINE TRANSIENT RESPONSE
t – Time – ms
0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1
CO = 1 µF
VO– Change in
VI– Input Voltage – V ∆
Output Voltage – mV
Figure 16
–50
200
50
0
100
0
0
CO = 10 µF
TPS7433
LOAD TRANSIENT RESPONSE
I – Output Current – mA
OVO– Change in
∆
Output Voltage – mV
–50
200 mA
25 µs
di/dt =
t – Time – ms
0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1
t – Time – ms
TPS7433
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
4
2
0.60.40.2 0.8 1 1.41.2 1.6 1.8 20
VO– Output Voltage – V
5
0
Enable Pulse – V
0
VI = 7 V
Figure 17
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
IN
EN
OUT
+
GND CO
ESR
RL
VITo Load
Figure 18. Test Circuit for Typical Regions of Stability (Figure 19)
0.1
0.010 50 100 150 200
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)†
vs
OUTPUT CURRENT
10
100
IO – Output Current – mA
ESR – Equivalent Series Resistance –Ω
1
Region of Instability
Figure 19
†ESR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to CO.
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
The TPS74xx family includes five voltage regulators (1.5 V, 1.8 V, 2.5 V, 3 V, and 3.3 V).
minimum load requirements
The TPS74xx family is stable even at zero load; no minimum load is required for operation.
SENSE terminal connection
The SENSE terminal must be connected to the regulator output for proper functioning of the regulator. Normally,
this connection should be as short as possible; however, the connection can be made near a critical circuit
(remote sense) to improve performance at that point. Internally, SENSE connects to a high-impedance
wide-bandwidth amplifier through a resistor-divider network and noise pickup feeds through to the regulator
output. Routing the SENSE connection to minimize/avoid noise pickup is essential. Adding an RC network
between SENSE and OUT to filter noise is not recommended because it can cause the regulator to oscillate.
external capacitor requirements
An input capacitor is not usually required; however , a ceramic bypass capacitor (1 µF or larger) improves load
transient response and noise rejection if the TPS74xx is located more than a few inches from the power supply .
A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients
with fast rise times are anticipated.
Like all low dropout regulators, the TPS74xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 1 µF and the ESR
(equivalent series resistance) must be at least 300 mΩ. Solid tantalum electrolytic and aluminum electrolytic
are all suitable, provided they meet the requirements described previously.
OUT
4
1
IN
EN
GND
6
8
7
VI
1 µF
ESR
VO
1 µF
+
TPS74xx
CO
IN
5SENSE SENSE
Figure 20. Typical Application Circuit
regulator protection
The TPS74xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
regulator protection (continued)
The TPS74xx also features internal current limiting and thermal protection. During normal operation, the
TPS74xx limits output current to approximately 500 mA. When current limiting engages, the output voltage
scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross
device failure, care should be taken not to exceed the power dissipation ratings of the package. If the
temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has
cooled below 130°C (typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than
or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
PD(max)
+
TJmax
*
TA
R
q
JA
Where
TJmax is the maximum allowable junction temperature.
TA is the ambient temperature.
RθJA is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
SOIC.
The regulator dissipation is calculated using:
PD
+ǒ
VI
*
VO
Ǔ
IO
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
TPS7415, TPS7418, TPS7425, TPS7430, TPS7433
FAST-TRANSIENT-RESPONSE USING SMALL OUTPUT CAPACITOR
200-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS212 – DECEMBER 1999
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
4040047/B 03/95
0.228 (5,80)
0.244 (6,20)
0.069 (1,75) MAX 0.010 (0,25)
0.004 (0,10)
1
14
0.014 (0,35)
0.020 (0,51)
A
0.157 (4,00)
0.150 (3,81)
7
8
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
PINS **
0.008 (0,20) NOM
A MIN
A MAX
DIM
Gage Plane
0.189
(4,80)
(5,00)
0.197
8
(8,55)
(8,75)
0.337
14
0.344
(9,80)
16
0.394
(10,00)
0.386
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS7415D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7415DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7415DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7415DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7418D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7418DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7425D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7425DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7425DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7425DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7430D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7430DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7433D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7433DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7433DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS7433DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 17-Jun-2008
Addendum-Page 1
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Jun-2008
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS7415DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS7425DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS7433DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS7415DR SOIC D 8 2500 346.0 346.0 29.0
TPS7425DR SOIC D 8 2500 346.0 346.0 29.0
TPS7433DR SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
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