Low Skew, 1-to-2 LVCMOS / LVTTL
Fanout Buffer W/ Complementary Output 8302I-01
Datasheet
DESCRIPTION
The 8302I-01 is a low skew, 1-to-2 LVCMOS/LVTTL Fanout Buffer
w/Complementary Output. The 8302I-01 has a single ended clock
input. The single ended clock input accepts LVCMOS or LVTTL input
levels. The 8302I-01 is characterized at full 3.3V for input VDD, and
mixed 3.3V and 2.5V for output operating supply modes (VDDO).
Guaranteed output and part-to-part skew characteristics make the
8302I-01 ideal for clock distribution applications demanding well defi
ned performance and repeatability.
FEATURES
Complementary LVCMOS / LVTTL output
LVCMOS / LVTTL clock input accepts LVCMOS or
LVTTL input levels
Maximum output frequency: 250MHz
Output skew: 165ps (maximum)
Part-to-part skew: 800ps (maximum)
Small 8 lead SOIC package saves board space
Full 3.3V or 3.3V core/2.5V output supply modes
-40°C to 85°C ambient operating temperature
Available in lead-free compliant package
BLOCK DIAGRAM PIN ASSIGNMENTS
8302I-01
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
VDDO
VDD
CLK
GND
1
2
3
4
Q
nQ
CLK
Q
GND
VDDO
nQ
8
7
6
5
1
©2017 Integrated Device Technology, Inc. May 4, 2017
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
Number Name Type Description
1, 6 VDDO Power Output supply pins.
2V
DD Power Power supply pin.
3 CLK Input Pulldown LVCMOS / LVTTL clock input.
4,7 GND Power Power supply ground.
5 nQ Output Complementary clock output. LVCMOS / LVTTL interface levels.
8 Q Output Clock output. LVCMOS / LVTTL interface levels.
NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
CIN Input Capacitance 4 pF
CPD
Power Dissipation Capacitance
(per output)
VDD, VDDO = 3.465V 22 pF
VDD = 3.465V, VDDO = 2.625V 16 pF
RPULLDOWN Input Pulldown Resistor 51 kΩ
ROUT Output Impedance 5 7 12 Ω
2
©2017 Integrated Device Technology, Inc. May 4, 2017
8302I-01 Datasheet
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI -0.5V to VDD + 0.5 V
Outputs, VO -0.5V to VDDO + 0.5V
Package Thermal Impedance, θ
JA 112.7°C/W (0 lfpm)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the device.
These ratings are stress speci cations only. Functional operation of
product at these conditions or any conditions beyond those listed in
the DC Characteristics or AC Charac-teristics is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VIH Input High Voltage 2 VDD + 0.3 V
VIL Input Low Voltage -0.3 0.8 V
IIH Input High Current CLK VDD = VIN = 3.465V 150 µA
IIL Input Low Current CLK VDD = 3.465V, VIN = 0V -5 µA
VOH Output High Voltage
VDDO = 3.465, 50Ω to VDDO/2 2.6 V
VDDO = 3.465, IOH = -100µA 2.9 V
VDDO = 2.625, 50Ω to VDDO/2 1.8 V
VDDO = 2.625, IOH = -100µA 2.2 V
VOL Output Low Voltage
VDDO = 3.465, 50Ω to VDDO/2 0.5 V
VDDO = 3.465, IOL = 100µA 0.2 V
VDDO = 2.625, 50Ω to VDDO/2 0.5 V
VDDO = 2.625, IOL = 100µA 0.2 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD Power Supply Voltage 3.135 3.3 3.465 V
VDDO Output Power Supply Voltage 3.135 3.3 3.465 V
2.375 2.5 2.625 V
IDD Power Supply Current 13 mA
IDDO Output Supply Current 4mA
3
©2017 Integrated Device Technology, Inc. May 4, 2017
8302I-01 Datasheet
TABLE 4B. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = -40°C TO 85°C
TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
fMAX Output Frequency 250 MHz
tpLH Propagation Delay, Low-to-High; NOTE 1 1.8 2.7 ns
tsk(o) Output Skew; NOTE 2, 4 165 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 800 ps
tR / tFOutput Rise/Fall Time 20% to 80% 300 800 ps
odc Output Duty Cycle ƒ 133MHz 45 55 %
133MHz < ƒ 250MHz 40 60 %
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at VDDO/2.
NOTE 3: Defi ned as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at VDDO/2.
NOTE 4: This parameter is defi ned in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
fMAX Output Frequency 250 MHz
tpLH Propagation Delay, Low-to-High; NOTE 1 1.9 2.9 ns
tsk(o) Output Skew; NOTE 2, 4 250 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 900 ps
tR / tFOutput Rise/Fall Time 20% to 80% 100 850 ps
odc Output Duty Cycle ƒ 133MHz 45 55 %
133MHz < ƒ 250MHz 40 60 %
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at VDDO/2.
NOTE 3: Defi ned as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at VDDO/2.
NOTE 4: This parameter is defi ned in accordance with JEDEC Standard 65.
4
©2017 Integrated Device Technology, Inc. May 4, 2017
8302I-01 Datasheet
PARAMETER MEASUREMENT INFORMATION
3.3V/2.5V OUTPUT LOAD AC TEST CIRCUIT3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
PROPAGATION DELAY
PART-TO-PART SKEW OUTPUT RISE/FALL TIME
OUTPUT SKEW
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
5
©2017 Integrated Device Technology, Inc. May 4, 2017
8302I-01 Datasheet
TRANSISTOR COUNT
The transistor count for 8302I-01 is: 322
TABLE 5. θJAVS. AIR FLOW TABLE FOR 8 LEAD SOIC
θJA by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 153.3°C/W 128.5°C/W 115.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 112.7°C/W 103.3°C/W 97.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
RELIABILITY INFORMATION
6©2017 Integrated Device Technology, Inc. May 4, 2017
8302I-01 Datasheet
7©2017 Integrated Device Technology, Inc. May 4, 2017
Package Drawing
8302I-01 Datasheet
8302I-01 Datasheet
8©2017 Integrated Device Technology, Inc. May 4, 2017
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Ordering Information
Revision History
Orderable Part Number Marking Package Carrier Type Temperature
8302AMI-01LF 302AI01L 3.8 x 4.8 x 1.47 mm 8-SOIC Tube -40° to +85°C
8302AMI-01LF 302AI01L 3.8 x 4.8 x 1.47 mm 8-SOIC Tape and Reel -40° to +85°C
Revision Date Description of Change
May 4, 2017 Corrected and updated the Ordering Information Table.
Updated package information.
Updated datasheet header/footer.
March 9, 2016 Features section - removed reference to leaded package
Ordering Information table - removed quantity from tape and reel. Deleted LF note below table.
Added Contact Page
July 29, 2010 Updated datasheet header/footer with IDT logo from ICS logo.
Ordering Information table - removed ICS prefix from Part/Order Number column.
Added Contact Page.