MT9M413: 1.3Mp CMOS Digital Image Sensor Features 1.3Mp CMOS Digital Image Sensor MT9M413 For the latest data sheet, refer to Aptina's Web site: www.aptina.com Features Table 2: * Output data rate: 660 Mb/s (master clock 66 MHz, ~500 fps) * Output: 10-bit digital through 10 parallel ports * Conversion gain: 13 V/e* Shutter efficiency: >99.9% * Shutter exposure time: 2s to >33msec * Programmable controls: open architecture, - On-chip: ADC controls, output multiplexing, and ADC calibration - Off-chip: window size and location, frame rate and data rate, shutter exposure time (integration time), and ADC reference Parameter Optical format Active imager size Active pixels Pixel size Color filter array Shutter type Maximum data rate Frame rate ADC resolution Responsivity Applications * * * * * * Key Performance Parameters Machine vision Automotive testing Motion analysis Film special effects Animation 3D imaging Dynamic range Supply voltage Power consumption Operating temperature Package Value 1-inch 15.36mm(H) x 12.29mm(V) 19.67mm diagonal 1280H x 1024V 12.00 x 12.00m Color RGB Bayer pattern, or monochrome TrueSNAP freeze-frame electronic shutter 660 Mb/s 0-500+ fps at 1280 x 1024, >10,000 fps with partial scan On-chip, 10-bit column-parallel Mono: 1600 LSB per lux-sec at 550nm 59dB +3.3V <500mW at 500 fps <150mW at 60 fps -5C to +60C 280-pin ceramic PGA Ordering Information Table 1: Available Part Numbers Part Number Description MT9M413C36STC MT9M413C36STM 280-pin ceramic PGA (color) 280-pin ceramic PGA (monochrome) PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev.B 9/10 EN 1 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation All rights reserved. Products and specifications discussed herein are subject to change by Aptina without notice. MT9M413: 1.3Mp CMOS Digital Image Sensor Table of Contents Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 List of Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 External Control Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 PG_N and TX_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 ROW_ADDR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 ROW_STRT_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 ROW_DONE_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 LD_SHFT_N. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 DATA_READ_EN_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Output Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 CAL_STRT_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 CAL_DONE_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 LRST_N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Electronic Shutter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 TrueSNAP Simultaneous Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 TrueSNAP Sequential Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 TrueSNAP Single Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 ERS Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Partial Scan Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Analog Voltage Setting Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Lens Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Mounting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Field of View and Focal Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 F-Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 MTF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Infrared Cut-Off Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Optical Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Environmental . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 2 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor List of Figures List of Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: A Camera System Using the MT9M413 CMOS Image Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Sensor Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Signal Path Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Example 1--Row 4 of the MT9M413 Being Digitized . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Timing Diagram for One Row . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Typical I/O Signal Timing (Initialization Sequence). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Typical Example of TrueSNAP Simultaneous Mode--Exposure During Readout . . . . . . . . . . . . . . . .14 Typical Example of TrueSNAP Sequential Mode--Exposure Following Readout . . . . . . . . . . . . . . . .15 Typical Example of TrueSNAP Single Frame Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Board Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 C-Mount Lens Shroud for MT9M413 and Socket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 280-Pin Ceramic PGA Package Top View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 280-Pin Ceramic PGA Package Side View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 280-Pin Ceramic PGA Package Bottom View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Pixel Array Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Bayer Pattern (Pixel Color Pattern Detail) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Quantum Efficiency (color) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Quantum Efficiency (monochrome) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Set Up and Hold Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Clock to Data Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 3 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor List of Tables List of Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Conversion and Readout Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Pixel Array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Lens Mounting Standards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Typical F-Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Image Sensor Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 4 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor General Description General Description The MT9M413 is a 1280H x 1024V (1.3 megapixel) CMOS digital image sensor capable of 500 frames-per-second (fps) operation. Its TrueSNAPTM electronic shutter allows simultaneous exposure of the entire pixel array. Available in color or monochrome, the sensor has on-chip 10-bit analog-to-digital converters (ADCs), which are self-calibrating, and a fully digital interface. The input clock rate of the chip is 66 MHz at approximately 500 fps, providing compatibility with many off-the-shelf interface components, as shown in Figure 1. The sensor has ten (10) 10-bit-wide digital output ports. The open architecture design provides access to internal operations and the ADC timing and pixel read control are integrated on-chip. At 60 fps, the sensor dissipates less than 150mW, and at 500 fps less than 500mW, operating on a 3.3V supply. The pixel size is 12 microns square and the digital responsivity is 1600 LSB per lux-second. A complete camera system can be built by using the chip in conjunction with the following external devices: * An FPGA/CPLD/ASIC controller, to manage the timing signals needed for sensor operation. * A 20mm diagonal lens. * Biasing circuits and bypass capacitors. Figure 1: A Camera System Using the MT9M413 CMOS Image Sensor +3.3V ADC Bias Controller (FPGA, CPLD, ASIC, etc.) System Clock PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Control Timing System Interface Pixel Array (1280H x 1024V) ADC Memory System Clock On-Chip Control Off-Chip Port 1 D0~D9 Port 2 D10~D19 Port 3 D20~D29 Port 4 D30~D39 Port 5 D40~D49 Port 6 D50~D59 Port 7 D60~D69 Port 8 D70~D79 Port 9 D80~D89 Port 10 D90~D99 On-Chip 5 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor General Description Figure 2: Sensor Architecture MEMORY SENSE AMPS TOP ADCs DIGITAL CONTROL PIXEL ARRAY BOTTOM ADCs Notes: Figure 3: 1. Not to scale. Signal Path Diagram Pixel Photo Detector Per Column Processing TX_N Pixel Memory VREF2 Bias VLN1 PG_N VRST_PIX ADC Calibration DAC 7 Bias VLP Buffer VREF1 Sample & Hold VREF4 ADC BIAS VLN2 10 To ADC registers Offset (VREF3-VCLAMP3)/20 PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 6 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor General Description Figure 4: Functional Block Diagram TX_N PG_N 10 Row Driver ROW Row Decoder PIXEL ARRAY S/H LogicRST RowSTRT Row Timing Block ADC #1 ADC #2 ... ADC #1280 RowDone Sample Data Shift / Read 1280 x 10 SRAM ADC Register Shift SRAM Read Control 1280 x 10 SRAM Output Register 10 x 10 Sense Amps Output Ports Column Decoder Pads PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 7 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor External Control Sequence External Control Sequence The MT9M413 includes on-chip timing and control circuitry to control most of the pixel, ADC, and output multiplexing operations. However, the sensor still requires a controller (FPGA, CPLD, ASIC) to guide it through the full sequence of its operation. With the TrueSNAP freeze-frame electronic shutter, signal charges are integrated in all pixels in parallel. The charges are then sampled into pixel analog memories (one memory per pixel) and subsequently, row by row, are digitized and read out of the sensor. The integration of the photosignal is controlled by two control signals: * PG_N * TX_N To clear pixels and start new integration, PG_N is LOW. To transfer the data into pixel memory, TX_N is LOW. The time difference between the two procedures is the exposure time. It should be noted that neither the PG_N or TX_N pulses clear the pixel analog memory. Pixel memory can be cleared during the previous readout (that is, the readout process resets the pixel analog memory), or by applying PG_N and TX_N together (clearing both pixel and pixel memory at the same time). With the TrueSNAP freeze-frame electronic shutter, the sensor can operate in either simultaneous or sequential mode, generating continuous video output. In simultaneous mode, as a series of frames is being captured, the PG_N and TX_N signals are exercised while the previous frame is being read out of the sensor. In simultaneous mode, the end of integration occurs in the last row of the frame (row #1023) or in the last row of the window of interest. The position of the start integration is then calculated from the desired integration time. In sequential mode, the PG_N and TX_N signals are exercised to control the integration time, and then digitization and readout of the frame take place. Alternatively, the sensor can run in single frame or snapshot mode in which one image is captured. The sensor has a column-parallel ADC architecture that allows the array of 1,280 ADCs on the chip to digitize the analog data from an entire pixel row simultaneously. Table 3 shows the input signals utilized to control the conversion and readout process. Table 3: Conversion and Readout Process Signal Name Description Input Bus Width ROW_ADDR ROW_STRT_N LD_SHFT_N DATA_READ_EN_N Row address Row start Load shift register Data read enable 10-bit 1-bit 1-bit 1-bit The 10-bit ROW_ADDR (row address) input bus selects the pixel row to be read for each readout cycle. The ROW_STRT_N signal starts the process of reading the analog data from the pixel row, the ADC, and the storage of the digital values in the ADC registers. When these actions are completed, the sensor sends a response back to the system controller using the ROW_DONE_N. Row address must be valid for the first half of the row processing time (the period between ROW_START_N and ROW_DONE_N). The MT9M413 contains a pipeline style memory array, which is used to store the data after digitization. This memory also allows the data from the previous row conversion cycle to be read while a new conversion is taking place. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 8 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor External Control Sequence The digital readout is controlled by lowering the LD_SHFT_N signal, followed by the DATA_READ_EN_N signal. LD_SHFT_N transfers the digitized data from the ADC register to the output register. DATA_READ_EN_N is used to enable the data output from the output register. A new pixel row readout and conversion cycle can be started two clock cycles after DATA_READ_EN_N is pulled LOW. The output register allows the reading of the digital data from the previous row to be performed at the same time as a new conversion (pipeline mode). The total row time will be only that between when: 1. The ROW_STRT_N signal is applied and ROW_DONE_N is returned. and 2. LD_SHFT_N and DATA_READ_EN_N are applied plus two clock cycles. In the pipelined operation, there will always be one row of latency at the start of sensor operation. The alternative to pipelined operation is burst data operation in which a new pixel row conversion is not initiated until after the output register is emptied (and LD_SHFT_N has been taken HIGH). The ratio of line active and blanking times can be adjusted to easily match a variety of display and collection formats. See Figure 7 on page 12. Figure 5: Example 1--Row 4 of the MT9M413 Being Digitized Controller ROW_ADDR ROW_STRT_N LD_SHFT_N 0 0 0 0 0 0 0 1 0 0 ADC Controls Column Parallel 10 -bit ADC 640 x 1 Even Columns ROW 4 Control Logic/ Decoders PIXEL ARRAY Odd Columns SYSCLK ADC Controls Column Parallel 10 -bit ADC 640 x 1 Notes: PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 1. Reads the contents of pixel row specified by ROW_ADDR. 2. Converts pixel row signals to digital values. 3. Stores digital values in ADC register (1280 x 10-bit). 9 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor External Control Sequence PG_N and TX_N To start integration, the PG_N signal simultaneously resets the photodetectors for the entire pixel array. To end integration, the TX_N signal simultaneously transfers a charge from the photodetector to memory inside each pixel for the entire pixel array. In sequential mode, the PG_N and the TX_N pulses must have a minimum duration of 64 SYSCLK cycles. In simultaneous mode, the PG_N and TX_N pulses must have a duration of 64 SYSCLK cycles and be applied in the window between the 66th and 129th SYSCLK cycles. Additionally, in simultaneous mode between exposures, a single SYSCLK duration pulse must be applied each row during the 130th clock cycle. ROW_ADDR The address for the pixel row to be read is input externally through the 10-bit ROW_ADDR input bus. This address must be valid for at least 66 SYSCLK cycles, and must be valid when ROW_STRT_N is pulled LOW. ROW_STRT_N ROW_STRT_N reads the contents of the pixel row specified by ROW_ADDR, converts the pixel row signal to digital value, and stores the digital value in ADC register (1280 x 10-bit). This process is completed in 128-129 SYSCLK cycles; it must be valid for a minimum of 2 clock cycles and a maximum of 100 clock cycles. Note: To minimize the sensor power consumption, the row processing circuitry operates at SYSCLK/2. Therefore, depending on the user's implementation, there will be either 128 or 129 SYSCLK cycles between the start of ROW_STRT_N and ROW_DONE_N. ROW_DONE_N For 128-129 SYSCLK cycles after ROW_STRT_N has been pulled LOW, the sensor acknowledges the completion of a row read operation/digitization by pulling the ROW_DONE_N pin LOW for two clock cycles. LD_SHFT_N LD_SHFT_N transfers the digitized data from the ADC register to the output register (1280 x 10-bit) and gates the power to the sense amplifiers. The first data (columns 1-10) are available for output at the third rising edge of SYSCLK after LD_SHFT_N is pulled LOW. This may be enabled simultaneously with or after the falling edge of ROW_DONE_N, but must remain LOW the entire time the data is being read out. DATA_READ_EN_N DATA_READ_EN_N is used to enable the data output from the output register (1280 x 10-bit) to the ten 10-bit output ports. It may be initiated simultaneously with or after LD_SHFT_N is selected and has a minimum width of one clock cycle. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 10 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor External Control Sequence Table 4: Pixel Array Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 Port 10 CLK 1 CLK 2 ... CLK128 Col. 1 Col. 2 Col. 3 Col. 4 Col. 5 Col. 6 Col. 7 Col. 8 Col. 9 Col. 10 Col. 11 Col. 12 Col. 13 Col. 14 Col. 15 Col. 16 Col. 17 Col. 18 Col. 19 Col. 20 ... ... ... ... ... ... ... ... ... ... Col. 1271 Col. 1272 Col. 1273 Col. 1274 Col. 1275 Col. 1276 Col. 1277 Col. 1278 Col. 1279 Col. 1280 Output Register The use of an output register allows the processing of a row to be performed while the digital data from the previous operation is being read out of the sensor. A new pixel readout and conversion cycle can be started two clock cycles after DATA_READ_EN_N is pulled LOW. Figure 6: Frame Timing ROW_ADDR [0:9] 1023 0 1 2 N N+1 1022 1023 0 ROW_STRT_N ROW_DONE_N LD_ SHFT_N DATA_READ_EN_N DATA [0:99] ROW1023 ROW0 ROW1 ROW N-1 ROW N ROW1021 ROW1022 ROW1023 PG_N=PG1+PG2 TX_ N PG1 PG2 EXPOSURE TIM E (= 1023 -N rows) READOUT (one full frame) PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 11 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor External Control Sequence Figure 7: Timing Diagram for One Row 0 1 2 67 129 131 0 SYSCLK ROW_ADDR [0:9] XXX XXX ROW VALID ROW_STRT_N ROW_DONE_N LD_SHFT_N DATA_READ_EN_N 1-3 nsec SKEW DATA [0:99] 0 1 2 3 4 5 127 66 PG2 130 PG_N PG1 TX_N Calibration The MT9M413 contains special self-calibrating circuitry that enables it to reduce its own column-wise fixed pattern noise (FPN). This calibration process consists of connecting a calibration signal (VREF2) to each of the ADC inputs, and estimating and storing these offsets (7 bits) to subtract from subsequent samples. Figure 8 on page 12 shows the timing sequence to calibrate the sensor. Calibration occurs automatically after logic reset (LRST_N) but it can also be started by the user by pulling CAL_STRT_N LOW. When calibration is finished, the sensor generates the active LOW CAL_DONE_N. Significant ambient temperature drift may justify recalibration (see Figure 6 on page 11 and Figure 8 on page 12). Figure 8: Typical I/O Signal Timing (Initialization Sequence) CAL_STRT_N CAL_DONE_N SYSCLK LRST_N CAL_DONE_N SYSCLK PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 12 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor External Control Sequence CAL_STRT_N CAL_STRT_N is a two-clock cycle-wide active-low pulse that initiates the ADC calibration sequence. The pulse must not be actuated for 1 microsecond after either power-up or removal of the sensor from a power-down state. Aptina recommends calibrating using the logic reset. CAL_DONE_N CAL_DONE_N is a two-clock cycle-wide active-low output pulse that is asserted when the ADC calibration is complete. The device will automatically initiate a calibration sequence upon a logic reset. Completion of this sequence, in cases where it is initiated by a reset, is still with the CAL_DONE_N signal. This process is complete within 112 SYSCLK cycles of CAL_STRT_N. This process is complete within 112 SYSCLK cycles of LRST_N. LRST_N LRST_N is a two-clock cycle-wide active-low pulse that resets the digital logic. It puts all logic into a known state (all flip-flops are reset). This signal also initiates an ADC calibration sequence. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 13 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter Electronic Shutter The MT9M413 is intended to be operated primarily with the TrueSNAP freeze-frame electronic shutter, but is also capable of operating in electronic rolling shutter (ERS) mode. With TrueSNAP the shutter can be operated to generate continuous video output (simultaneous mode or sequential mode) or capture single images (single-frame mode). When considering timing for the various shutter modes, keep in mind the functionality of PG_N and TX_N. When PG_N is LOW, the photodetector is shorted to a reset voltage source. When PG_N is HIGH, the switch is open. When TX_N is LOW, the photodetector is shorted to pixel memory; when TN_N is HIGH, the photodetector is disconnected from pixel memory (refer to the switches shown in Figure 3: "Signal Path Diagram," on page 6). The memory is also reset during readout, occurring for the selected row in the middle of the 0-66 clock interval after application of ROW_STRT_N (approximately clocks 20 through 40). TrueSNAP Simultaneous Mode In simultaneous mode, as a series of frames are being captured, the PG_N and TX_N signals are exercised while the previous frame is being read out of the sensor. Typically in simultaneous mode, the "end of integration" occurs in the last row of the frame (row #1023) or in the last row of the window of interest. The position of the "start integration" is then calculated from the desired integration time. Note: Figure 9: The pixel memory is cleared during the readout process, as shown in Figure 9. Typical Example of TrueSNAP Simultaneous Mode--Exposure During Readout PG_N TX_N ROW_ADDR 1023 n Exposure time Readout Readout Time PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 14 Read row#1023 Read row#0 Read row#1023 Read row# 0 0 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter TrueSNAP Sequential Mode In sequential mode the, PG_N and TX_N signals are exercised to control the integration time, and then digitization and readout of the frame takes place. The photodetector is reset when PG_N is LOW. Raising PG_N starts integration, and lowering TX_N while PG_N is still HIGH ends integration by sampling the signal into memory. There must be at least 1 SYSCLK cycle after returning TX_N to the high state until PG_N is lowered (Figure 10 on page 15). Note: Figure 10: Pixel memory is cleared during readout process. Typical Example of TrueSNAP Sequential Mode--Exposure Following Readout PG_N TX_N ROW_ADDR 1023 Exposure time Exposure time Readout Time Readout PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 15 Read row#1023 Read row#0 Read row#0 Read row#1023 0 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter TrueSNAP Single Frame The MT9M413 can run in single-frame or snapshot mode in which one image is captured. In single frame mode, integration must be preceded by a void frame read (selecting all addresses and applying ROW_STRT_N) or PG_N and TX_N must be applied together (for a minimum of 10 SYSCLK cycles) to clear pixel and pixel memory. Holding PG_N and TX_N LOW resets the photodioide (PG_N) and the analog memory which is shorted to the photodiode by the TX_N switch. To start integration, both TX_N and PG_N are released; to end integration and sample the signal into memory, TX_N is made LOW again for 10 clocks minimum, up to 64 clocks (see Figure 7 on page 12). After TX_N is returned to the HIGH state there must be a delay of >1 SYSCLK prior to lowering PG_N again to erase charge in the photodetector. Figure 11: Typical Example of TrueSNAP Single Frame Mode PG_N TX_N ROW_ADDR 1023 EXPOSURE TIME "SLEEP" STATE "SLEEP" STATE READOUT TIME PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 16 READ ROW #1023 READ ROW #0 0 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter ERS Mode ERS mode is enabled by pulling PG_N HIGH and TX_N LOW. Partial Scan Examples The MT9M413 can be partially scanned by subsampling rows. The user may select which rows and how many rows to include in a partial scan. For example, with a 66 MHz clock, a row time is approximately 2 microseconds (s), resulting in the following possibilities: * 1 row in frame: 500,000 frames per second * 2 rows in frame: 250,000 frames per second * 10 rows in frame: 50,000 frames per second * 100 rows in frame: 5,000 frames per second * 256 rows in frame: 2,000 frames per second * 512 rows in frame: 1,000 frames per second * 1,024 rows in frame: 500 frames per second ... and so on Table 5: Pin Descriptions Pin Number(s) T13 U14 V15 T14 V16 T15 U16 R14 V18 P15 D14 A16 C16 E13 D15 A18 E14 B18 D17 E16 W11 U10 V11 R11 V12 W13 PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Signal Name Function DATA [99:0] Pixel data output bus that is 10 pixels (100 bits) wide. Bit 0 is the LSB (least significant bit) of the lowest order pixel (see Table 4, "Pixel Array," on page 11). In the group of 10 pixels being output, bit 9 is the MSB (most significant bit). DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 17 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter Table 5: Pin Descriptions (continued) Pin Number(s) Signal Name U12 V13 R12 V14 B11 C12 A12 B12 E11 B13 C14 D13 E12 C15 U6 V7 T8 R9 V8 U8 V9 T9 V10 R10 C8 A7 D9 E9 A8 C10 A9 D10 B10 C11 T4 R6 V3 W3 R7 W4 T6 V5 R8 V6 E6 D5 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31 DATA32 DATA33 DATA34 DATA35 DATA36 DATA37 DATA38 DATA39 DATA40 DATA41 DATA42 DATA43 DATA44 DATA45 DATA46 DATA47 DATA48 DATA49 DATA50 DATA51 DATA52 DATA53 DATA54 DATA55 DATA56 DATA57 DATA58 DATA59 DATA60 DATA61 DATA62 DATA63 DATA64 DATA65 DATA66 DATA67 DATA68 DATA69 DATA70 DATA71 PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Function 18 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter Table 5: Pin Descriptions (continued) Pin Number(s) Signal Name C5 D6 A3 C6 D7 A5 E8 A6 M5 P2 N3 T1 P3 U1 P4 T2 V1 R4 H5 E3 E2 D1 D3 E4 C2 A1 F5 B2 L3 DATA72 DATA73 DATA74 DATA75 DATA76 DATA77 DATA78 DATA79 DATA80 DATA81 DATA82 DATA83 DATA84 DATA85 DATA86 DATA87 DATA88 DATA89 DATA90 DATA91 DATA92 DATA93 DATA94 DATA95 DATA96 DATA97 DATA98 DATA99 CAL_DONE_N L2 F1 CAL_STRT_N DARK_OFF_EN_N J4, N15, J16 H3, H18, T18 K2 VDD DGND LD_SHFT_N J3 DATA_READ_EN_N L1 LRST_N ROW_ADDR [9:0] G18 H16 H15 ROW_ADDR0 ROW_ADDR1 ROW_ADDR2 PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Function A two-clock cycle-wide active-low pulse that indicates the ADC has completed its calibration operation. Starts the calibration process for the ADC. This is a two-clock cycle-wide active-low pulse. A low input enables common mode dark offset to all pixels. The value of the offset is defined by VREF3 and VCLAMP3. Subtracts a fixed offset pre-ADC. Signal is pulled-up onchip. Power supply for core digital circuitry. Ground for core digital circuitry. An active-low envelope signal that places the recently converted row of data into output register for output, enables the sense amps and resets the column counter. An active-low envelope signal that enables the column counter and causes the 10 10-bit output ports to be updated with data on the rising edge of the system clock. Column counter skips data when this input is HIGH. Global logic reset function (asynchronous). Active-low pulse. A 10-bit bus (0 to 1023, bottom to top) that controls which pixel row is being processed or read out. An asychronous (unclocked) digital input. Bit 9 is the MSB. 19 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter Table 5: Pin Descriptions (continued) Pin Number(s) Signal Name F18 G17 F17 E18 G15 F16 D18 L5 ROW_ADDR3 ROW_ADDR4 ROW_ADDR5 ROW_ADDR6 ROW_ADDR7 ROW_ADDR8 ROW_ADDR9 ROW_DONE_N K4 ROW_STRT_N H2 STANDBY_N J5 G3 G16, E10, C13, B4, B8, C7, F4, M2, B14, F15, R13, T12, B1, H4, N4, R3, T5, U5, W7, U9, U11, T16, B16 G5, D4, G4, K3, N5, P5, U4, T7, T10, U7, U13 K5, B15, B17, H17, D12, D11, E17, C9, D8 M4, T11,U18, B5,U15 R18, P18, K18,J18 T17, N16, L17, K17, J15, R17 L15 PIXEL_CLK_OUT SYSCLK VDD_IO M18 VLN2 N17 VLP K16, M15 VREF1 PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN DGND_IO Function A two-cycle-wide pulse that indicates that processing of the currently addressed row has been completed. Starts ADC conversion of the pixel row (defined by the row address) content. A two-clock cycle-wide active-low pulse. A low input sets the sensor in a low power mode (allow 1 microsecond before calibrating, after coming out of this mode). Signal is pulled-up on-chip. Data synchronous output. User may prefer to use this pin as data clock instead of SYSCLK. Clock input for entire chip. Maximum design frequency is 66 MHz (50%, 5%, duty cycle). Power supply for digital pad ring. Digital ground for pad ring. VAA AGND Power supply for analog processing circuitry (column buffers, ADC, and support). Ground for analog signal processing circuitry. VLN1 Bias setting for pixel source follower operating current. Impedance: 3k, 10pF. Aptina recommends decoupling capacitors. The bias setting for the ADC is generated on-chip. Aptina recommends a decoupling capacitor to ground. External biasing may be preferable to optimize performance. Impedance: 3k, 10pF. Bias setting voltage for the column source follower operating current. Impedance: 3k, 10pF. Aptina recommends a decoupling capacitor. ADC reference input voltage that sets the maximum input signal level (defines the level where the FF code occurs) and thus sets the size of the least significant bit (LSB) in the analog to digital conversion process. A smaller VREF1 produces a smaller LSB, which means a smaller analog signal level input is required to produce the same digital code out. Likewise, a larger VREF1 produces a larger LSB, which means a larger analog signal level input is required to produce the same digital code out. Thus the reference value can be used like a global gain adjustment (halving this voltage doubles the gain). This signal has two pin connections to minimize internal losses during high speed operation. User voltage source must supply a transient current of 100mA at a frequency of 500 kHz with a 2% duty cycle. Decoupling capacitors to AGND of ~1?F (ceramic) and 100?F (electrolytic) placed as close to the package pins as possible are usually sufficient to filter out this required current transient. 20 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter Table 5: Pin Descriptions (continued) Pin Number(s) Signal Name P17 VREF2 M16 VREF3 K15 VCLAMP3 R16 L4 VLP_DRV TX_N M3 PG_N L18, P16, J17 VRST_PIX L16 VREF4 E5,C3,C1, D2, E1,F2, F3, G1, H1, J2, J1, K1, M1, N1, N2, P1,R1, R2, T3, U2, R5, U3, V2, W2, W1, V4, W5, W6, W8, W9, W10,W12, W14, W15, W17, W18, V17, R15, U17, V19, W19, U19, T19, R19, P19, N18, N19, M19, M17, L19, K19, J19, H19, G19, F19, E19, D19, C19, B19, C18, E15, C17, D16, A19, A17, A15, A14, A13, A11, A10, B9, B7, B6, A4, E7, A2, C4, B3, W16, G2 PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Function ADC reference used for the calibration operation. User voltage source must supply a transient current of 20mA at a frequency of 500 kHz with a 2% duty cycle. A ceramic decoupling capacitor to AGND of ~0.1F is usually sufficient to filter out this required current transient. Dark offset cancellation positive input reference, tied to the pedestal voltage to be added to the signal. Dark offset cancellation negative input reference. User voltage source must supply a transient current of 40mA at a frequency of 500 kHz with a 2% duty cycle. A ceramic decoupling capacitor to AGND of ~0.1F to 1F is usually sufficient to filter out this required current transient. Should be connected to AGND. This is an active low pulse that controls transfer of charge from photodetector to memory inside each pixel for entire pixel array. This is an active low pulse that resets the photodetectors and thereby starts new integration cycle. Power supply for pixel array. There is no noticeable DC power consumption by this pin (<100?A). User voltage source must supply a transient current of 10mA at a frequency of 500 kHz, once a frame. Decoupling capacitors to AGND ~1F (ceramic) and 100?F (electrolytic) are usually sufficient to filter out this required current transient. ADC reference input value should be 1/4 VREF1. User voltage source must supply a transient current of 100mA at a frequency of 500 kHz with a 2% duty cycle. A ceramic decoupling capacitor to AGND of ~0.1F is usually sufficient to filter out this required current transient. No connect. 21 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electronic Shutter M2 B14 F15 R13 T12 B1 H4 N4 R3 T5 U5 W7 U9 U11 T16 G16 B16 E10 C13 B4 B8 C7 F4 VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO _____ G18 _____ H16 _____ H15 _____ F18 _____ G17 _____ F17 _____ E18 _____ G15 _____ F16 _____ D18 ROWADDR0 ROWADDR1 ROWADDR2 ROWADDR3 ROWADDR4 ROWADDR5 ROWADDR6 ROWADDR7 ROWADDR8 ROWADDR9 _____ G3 _____ J3 _____ K2 ________ L3 _____ L5 ________ L2 _____ K4 ________ F1 _____ H2 ________ L1 _____ M3 ________ L4 ________ J5 SYSCLK DATA_READ_EN_N LD_SHFT_N CAL_DONE_N ROW_DONE_N CAL_STRT_N ROW_STRT_N DARK_OFF_EN_N STANDBY_N LRST_N PG_N TX PIXEL_CLK_OUT DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31 DATA32 DATA33 DATA34 DATA35 DATA36 DATA37 DATA38 DATA39 DATA40 DATA41 DATA42 DATA43 DATA44 DATA45 DATA46 DATA47 DATA48 DATA49 DATA50 DATA51 DATA52 DATA53 DATA54 DATA55 DATA56 DATA57 DATA58 DATA59 DATA60 DATA61 DATA62 DATA63 DATA64 DATA65 DATA66 DATA67 DATA68 DATA69 DATA70 DATA71 DATA72 DATA73 DATA74 DATA75 DATA76 DATA77 DATA78 DATA79 DATA80 DATA81 DATA82 DATA83 DATA84 DATA85 DATA86 DATA87 DATA88 DATA89 DATA90 DATA91 DATA92 DATA93 DATA94 DATA95 DATA96 DATA97 DATA98 DATA99 Analog +3.3V VCLAMP3 1k 10F 0,01F 0.1F Analog +3.3V VLN1 1k 10F 0.1F Analog +3.3V VLP 1k 10F 0.1F Analog +3.3V VREF1 1k 100F 1F 0.01F Analog +3.3V 1k VREF2 10F 0.01F 0.1F VLN2 0.1F 10F VLP_DRV Analog +3.3V VRST_PIX 1k 1F 100F 0.01F Analog +3.3V VREF4 1k AGND AGND AGND AGND AGND AGND 0.01F T17 N16 K17 R17 L17 J15 0.1F DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGNC_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND_IO DGND DGND DGND VREF3 10F G5 D4 G4 K3 N5 P5 U4 T7 T10 U7 U13 U15 K5 B15 B17 H17 D12 D11 C9 D8 M4 T11 U18 E17 B5 H3 H18 T18 10F 0.1F PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Pixel Data Output Analog Ground Digital Ground Notes: T13 _____ U14 _____ V15 _____ T14 _____ V16 _____ T15 _____ U16 _____ R14 _____ V18 _____ P15 _____ D14 _____ A16 _____ C16 _____ E13 _____ D15 _____ A18 _____ E14 _____ B18 _____ D17 _____ E16 _____ W11 _____ U10 _____ V11 _____ R11 _____ V12 _____ W13 _____ U12 _____ V13 _____ R12 _____ V14 _____ B11 _____ C12 _____ A12 _____ B12 _____ E11 _____ B13 _____ C14 _____ D13 _____ E12 _____ C15 _____ U6 _____ V7 _____ T8 _____ R9 _____ V8 _____ U8 _____ V9 _____ T9 _____ V10 _____ R10 _____ C8 _____ A7 _____ D9 _____ E9 _____ A8 _____ C10 _____ A9 _____ D10 _____ B10 _____ C11 _____ T4 ______ R6 _____ V3 _____ W3 _____ R7 _____ W4 _____ T6 _____ V5 _____ R8 _____ V6 _____ E6 _____ D5 _____ C5 _____ D6 _____ A3 _____ C6 _____ D7 _____ A5 _____ E8 _____ A6 _____ M5 _____ P2 _____ N3 _____ T1 _____ P3 _____ U1 _____ P4 _____ T2 _____ V1 _____ R4 _____ H5 _____ E3 _____ E2 _____ D1 _____ D3 _____ E4 _____ C2 _____ A1 _____ F5 _____ B2 _____ Digital Ground J4 N15 J16 Digital 3.3V VDD VDD VDD VAA VAA VAA VAA Analog +3.3V Controller Interface Analog ground Board Connections R18 P18 K18 J18 Figure 12: 1. Aptina recommends that 0.01F and 0.1F capacitors be placed as physically close as possible to the MT9M413's package. 2. Alternatively, the analog voltages depicted as being generated from potentiometers could be supplied from DACs. 3. The analog voltages VLN1, VLN2, VLP, and VREF4 are generated on-chip, but user may supply voltages to override the internal biases. 22 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Analog Voltage Setting Considerations Analog Voltage Setting Considerations The values suggested in the Typical Values column in the "AC Electrical Characteristics" on page 34 should be the starting point for setting the analog voltages. Additionally, it is useful to refer to the "Signal Path Diagram" on page 6, which indicates how the analog voltages affect the image. Other considerations are as follows: * VREF1: This ADC reference voltage can also be utilized as a gain. A lower value will increase gain, but also results in amplification of nonuniformities. * VREF4: Should always be set to 1/4 of VREF1. * VREF2: Reference used for the ADC calibration to remove column-wise FPN. If set much lower than the typical value there is a possibility that some column nonuniformities will not be corrected. Setting higher than typical will result in more column-wise FPN. When debugging analog voltage settings it may be useful to temporarily set VREF2 to zero, effectively stopping the ADC calibration process and adjusting the VLN/VLP settings. * VLN1: The on-chip generated voltage should be used as the starting point; increasing above typical will result in an increase in current, speed, and FPN in the first buffer. * VLN2: The on-chip generated voltage should be used as the starting point. Controls the current in the ADC comparators (there is a safe range where this voltage has no effect); above or below this range will cause the comparators to fail. If vertical white stripes appear in the center of the imaging area or random white spots appear in contour areas, it is an indication that VLN2 needs to be adjusted. * VLP The on-chip generated voltage should be used as the starting point. * VRST_PIX Voltage for pixel reset. If this is too close to VAA the image will be degraded and is not recommended to be above 2.9V, but if it is set too low the pixel dynamic range may decrease. * VREF3 and VCLAMP3 These control the offset as shown in the "Signal Path Diagram" on page 6. This must be enabled through DARK_OFF_EN_N; Offset is ~ (VREF3-VCLAMP3)/20. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 23 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection Lens Selection Much of the specific information in this section is explained in detail at http:// www.aptina.com/products/imaging/technology/index.html on our Web site. The following information applies specifically to the MT9M413 megapixel image sensor. Format The diagonal of the image sensor array, 19.67mm, fits most closely, but not exactly, within the optical format corresponding to the 1-inch specification. Some 1-inch optical format lenses have been shown to work well with this sensor. Typical 1-inch lens examples are Computer V2513, V5013, and V7514. F-mount lenses provide another possible lens solution due to their large image circle. Mounting Several lens mounting standards exist that specify the threading of the lens' barrel as well as the distance the back flange of the lens should be from the image sensor for the lens to properly form an image. Typical lens mounting standards for the MT9M413 are shown in Table 6. Table 6: Lens Mounting Standards Mount Mounting Name Threads Back-Flange-to-Image Sensor C CS 1-32 1-32 17.526mm 12.5mm Another option is to use a C-mount together with a C- to F-mount adapter for greater lens flexibility. Field of View and Focal Length The field of view of an imaging system will depend on both the focal length of the imaging lens and the width of the image sensor. As most of the image information humans pay attention to generally falls within a 45-degree horizontal field of view, many camera systems attempt to imitate this field of view. However, in some cases a telephoto system (with a narrow field of view, say less than 20 degrees), or a wide angle system (with a wide field of view, say more than 60 degrees) may be desired. The approximate field of view that an imaging system can achieve is shown in Equation 1: (EQ 1) 2 tan -1 ----- w 2f where is the field of view, tan-1 is the trigonometric function arc-tangent, w is the width of the image sensor, and f is the focal length of the imaging lens. For example, the imaging system's diagonal field of view can be determined by using the diagonal of the image sensor (19.67 mm) for w and a particular lens' focal length for f. Alternatively, the imaging system's horizontal field of view can be determined by using the horizontal of PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 24 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection the image sensor (15.36 mm) for w and a particular lens' focal length for f. A lens with an approximately 50 mm focal length will provide an 18-degree horizontal field of view with a MT9M413 (keep in mind that the above equation is a simplified approximation). F-Number The f-number, or f-stop, of an imaging lens is the ratio of the lens' focal length to its open aperture diameter. Every doubling in f-number reduces the light to the sensor by a factor of four. For example, a lens set at f/1.4 lets in four times more light than that same lens when it is set at f/2.8. Low f-number lenses capture a lot of light for delivery to the image sensor, but also require careful focus. Higher f-number lenses capture less light for delivery to the image sensor, and do not require as much effort to bring the imaging system to focus. Low f-number lenses generally cost more than high f-number lenses of similar overall performance. Typical f-numbers for various imaging systems are: Table 7: Typical F-Numbers F-Stop Imaging Application 1.4 2.0 2.8 4.0+ Low-light level imaging, manual focus systems. Typical for PC and other small form cameras. Common in digital still cameras. Often used in machine vision applications. MTF Modulation Transfer Function (MTF) is a technical term that quantifies how well a particular system propagates information. For cameras, the "system" is the lens and the sensor, and the "information" is the picture they are capturing. MTF ranges from zero (no information gets through) to 100 (all information gets through), and is always specified in terms of information density. In most imaging systems, the MTF is limited by the performance of the imaging lens. A lens must be able to transfer enough information to the image sensor to be able to resolve details in the image that are as small as the pixels in the image sensor. The pixels are set on a 12-micron pitch (the center of one pixel is 12 microns from the center of its neighboring pixel). Thus, a lens used should be able to resolve image features as small as 12 microns. Typically, a lens' MTF is plotted as a function of the number of line pairs per millimeter the lens is attempting to resolve (more line pairs per millimeter mean higher information densities). For an electronic imaging system, one line pair will correspond to two image sensor pixels (each pixel can resolve one line). This is equated as shown in Equation 2: (EQ 2) LP1 -------= ----mm 2z where LP/mm means line pairs per millimeter and z is the image sensor's pixel pitch, in millimeters. For the MT9M413, z = 0.012 mm, such that the MT9M413 has 42 LP/mm. Thus, a lens should provide an acceptable level of MTF all the way out to 42 LP/mm. For PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 25 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection most lenses, the MTF will be highest in the center of the images they form, and gradually drop off toward the edges of the images they form. As well, MTFs at low values of LP/mm will generally be larger than MTFs at high values of LP/mm. One of the many trade-offs that must be decided by the end user is how high the MTF needs to be for a particular imaging situation. Generally, near an image sensor's LP/mm good MTFs are higher than 40, moderate MTFs are from 20 to 40, and poor MTFs are less than 20. Infrared Cut-Off Filters In most visible imaging situations it is necessary to include a filter in the imaging path that blocks infrared (IR) light from reaching the image sensor. This filter is called an IR cut-off filter. Various forms of IR cut-off filters are available, some absorptive (like Hoya's CM500 or Schott's BG18) and some reflective (for example, dielectric stacks). Infrared light poses a problem to visible imaging because its presence blurs and decreases the MTF in the images formed by a lens. Since human vision only extends across a narrow range of the electromagnetic spectrum, camera systems hoping to capture images that look like the images our eyes capture must not capture light outside of our vision range. Silicon-based light detectors (like the ones in the MT9M413's pixels) detect light from the very deep blue to the near infrared. Thus, a filter must exist in the light's path that keeps the infrared from reaching the image sensor's pixels. In most cases, it is important that such a filter begin blocking light around 650 nm (in the deep red) and continue blocking it until at least 1100 nm (in the near IR). In most camera systems, the IR cut-off filter is included in the imaging lens. However, this point must be verified by a lens vendor when a particular lens is chosen for use with an image sensor. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 26 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection Figure 13: C-Mount Lens Shroud for MT9M413 and Socket Base Threaded holes for 4-40 screws (4 places) 2.50" 0.015" Recess 0.25" 1/8" 1/8" 2.50" 0.75" 0.25" Lid Holes Dia = 0.12" (for 4-40 screws), 4 places No thread 2.50" 1-32 Thread 2.50" 1.25 1/8 0.0 0.0 Notes: PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 1.25" 2.50" 0.25" 1. This shroud is designed to accommodate the MT9M413 when it is inserted into a PGA socket. These dimensions are based on the MILL MAX #510-93-281-19-081003 socket (www.mill-max.com). 27 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection Figure 14: 280-Pin Ceramic PGA Package Top View 1.9000.018 1.3430.016 1.1060.012 1.0670.012 INDEX 0.8400.009 0.8400.008 0.003 0.782 COLUMN (1023, 1279) ROW 19mils (0, 0) 0.003 0.743 Notes: 1. Sensor is centered on package, pixel array is off-center. 2. Die offset is 10 mils in both the X and Y directions. 3. Die rotation is 2 degrees. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 28 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection Figure 15: 280-Pin Ceramic PGA Package Side View 0.118 0.012 0.007 (AT CERAMIC) 0.039 0.004 0.012 0.002 0.020 0.002 (0.0235 X 2) 0.047 0.005 R0.005 BRAZE 0.0180.002 (281X) Glass Lid 0.047 0.005 (4X) Die (0.008) UNITS: INCHES 0.039 0.005 Notes: 0.150 0.008 1. Die thickness 28.5 mils 1 mil. 2. Die epoxy thickness 1 mil. 3. D-263 glass lid thickness 31 2 mils. 4. Glass lid epoxy thickness 1 mil. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 29 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Lens Selection Figure 16: 280-Pin Ceramic PGA Package Bottom View 1.800 0.012 (P = 0.100 X 18) 0.100 typ. W V U T R P N (281X) 0.067 TYP. DIA. M L K EXTRA PIN J H G F E D C B A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Alumina Coat PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 30 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Optical Specification Optical Specification Table 8: Image Sensor Characteristics TA = 25C Symbol Parameter R Responsivity (ADC VREF = 1V) Pixel saturation level DC noise + DNL Dark signal non-uniformity, high spatial frequency Dark signal non-uniformity, low spatial frequency Output referred dark signal Input referred noise Internal dynamic range Photo response non-uniformity, high spatial frequency Photo response non-uniformity, low spatial frequency Dark current temperature coefficient Conversion gain I Nsat NADC DSNU, HF DSNU, LF Vdrk NE Dyn_I PRNU, HF PRNU, LF Kdrk Cg Notes: PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Typ Unit 1600 63,000 2 <0.4 <1.5 50 70 59 <0.6 <10 100 13 LSB/lux-sec eLSB p-p % rms % p-p mV/sec edB % rms % p-p %/8C V/e- Note 1 2 1 2 1. Calculation method for high frequency PRNU and DSNU: For PRNU, uniformly adjust illumination so that the average voltage across a sensor partition is Full Scale/2. For DSNU, block illumination to sensor. Integration time = 2ms. Calculate spatially-filtered average using 64 pixel square window. Calculate r.m.s. difference between pixel values and corresponding filtered average values. Calculate average r.m.s. between windows. 2. Calculation method for low frequency PRNU and DSNU: For PRNU, uniformly adjust illumination so that the average voltage across a sensor partition is Full Scale/2. For DSNU, block illumination to sensor. Integration time = 2ms. Calculate spatially-filtered average using 64 pixel square window Calculate difference between the center pixel value and corresponding filtered average values. Report peak-to-peak values between windows. 31 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Optical Specification Figure 17: Pixel Array Layout (1023, 1279) Megapixel (1280H x 1024V) No black rows 1280 x 1024 active pixels (0,0) Area of detail below Bayer Pattern (Pixel Color Pattern Detail) ... Figure 18: (0,0) PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN G R G R G R G B G B G B G B G R G R G R G B G B G B G B G R G R G R G 32 ... Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Optical Specification Figure 19: Quantum Efficiency (color) Quantum Effficiency for Color 25 Quantum Efficiency (%) 20 15 10 5 0 400 500 600 Green 1 pixels Figure 20: 700 800 Wavelength (nm) Green 2 pixels 900 1000 Blue pixels Red pixels Quantum Efficiency (monochrome) Quantum Effficiency for Monochrome 30 Quantum Efficiency (%) 25 20 15 10 5 0 400 500 600 700 800 900 1000 Wavelength (nm) PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 33 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electrical Specifications Electrical Specifications Table 9: AC Electrical Characteristics VSUPPLY = 3.3V 0.3V Symbol Characteristic TPLH TPHL TSETUP THOLD Data output propagation delay for LOW to HIGH trans. Data output propagation delay or HIGH to LOW trans. Setup time for input to SYSCLK Hold time for input to SYSCLK Figure 21: Condition VIN = VPWR or VGND VPWR = Min, VOH min Min Typ Max Unit 1 1 3 3 2 2 4 4 3 3 ns ns ns ns Set Up and Hold Time SYSCLK INPUT T setup T hold Figure 22: Clock to Data Propagation Delay tr Tplh, Tphl SYSCLK DOUT (99:0) PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 34 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Electrical Specifications Table 10: DC Electrical Characteristics Vsupply = 3.3V 0.3V Symbol Characteristic VLP VREF1 VREF2 VREF3 VLN1 VLN2 VCLAMP3 VLP_DRV VRST_PIX VREF4 VIH VIL IIN Bias for column buffers Reference for ADC Reference for ADC calibration Dark offset Bias for pixel source follower Bias for ADC Dark offset Row driver control Pixel array power Reference for ADC Input HIGH voltage Input LOW voltage Input leakage current, no pull-up resistor Output HIGH voltage Output LOW voltage Maximum supply current VOH VOL IPWR Notes: Table 11: Condition Grounded VIN = VPWR or VGND Min Typ Max Unit 0.5 0.2 0.3 0 0.8 0.8 0 0 2.2 1.9 1.0 0.8 0.6 1.0 1.0 0 0 2.7 0.25 2.7 1.5 1.5 2.5 1.1 1.1 3.0 0 2.9 V V V V V V V V V V V V ?A 2.0 -0.3 -5 VPWR = Min, IOH = 100?A VPWR = Min, IOL = 100?A 66 MHz clock, 5pF load on outputs VPWR + 0.3 0.8 5 VPWR - 0.2 0.2 165 Note V V mA 1 1. IPWR = I (VDD_IO) + I (VDD) + I (VAA). Recommended Operating Conditions Symbol Parameter Min Max Unit VPWR TA DC supply voltage Commercial operating temperature 3.00 -5 3.6 60 V C Note: Table 12: This device contains circuitry to protect the inputs against damage from high static voltages or electric fields, but the user is advised to take precautions to avoid the application of any voltage higher than the maximum rated. Power Dissipation VPWR = 3.3V; TA = 25C at 500 fps Symbol Parameter Min Typ Max Unit PAVG Average power 250 350 500 mW PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 35 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Environmental Environmental Caution Table 13: Stresses greater than those listed may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Absolute Maximum Ratings Symbol Parameter VPWR VIN VOUT I I TSTORAGE TLEAD DC supply voltage DC input voltage DC output voltage DC current drain per pin (any I/O) DC current drain, VPWR and VGND Storage temperature range Lead temperature (10 second soldering) Notes: PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN Value Unit -0.5 to 3.6 -0.5 to VPWR + 0.5 -0.5 to VPWR + 0.5 50 100 -40 to 125 235 max.imum V V V mA mA C C 1. VPWR = VDD = VAA = VDD_IO (VDD is supply to digital circuit, VAA to analog circuit). VGND = DGND = AGND (DGND is the ground to the digital circuit, AGND to the analog circuit). 2. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. 36 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation. All rights reserved. MT9M413: 1.3Mp CMOS Digital Image Sensor Revision History Revision History Rev. C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9/10 * Updated to non-confidential Rev. B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5/10 * Updated to Aptina template Rev. A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1/8/2008 * Initial release. 10 Eunos Road 8 13-40, Singapore Post Center, Singapore 408600 prodmktg@aptina.com www.aptina.com Aptina, Aptina Imaging, DigitalClarity, and the Aptina logo are the property of Aptina Imaging Corporation All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 9709604409/Source: 2594706000 MT9M413_DS - Rev. B 9/10 EN 37 Aptina reserves the right to change products or specifications without notice. (c)2008 Aptina Imaging Corporation All rights reserved.