AFBR-0978Z Evaluation Board Digital Diagnostic 650 nm Transceiver for Ethernet (10/100 Mbps) with SC-RJ connector Application Note 5325 Introduction Features The AFBR-5978Z transceiver provides the system designer with the ability to implement Fast Ethernet (100 Mbps) or Ethernet (10 Mbps) over standard bandwidth 0.5 NA Plastic Optical Fiber (POF) and 0.37 NA Hard Clad Silica (HCS) fiber. The AFBR-5978Z transceiver features an advanced digital diagnostic interface, compliant to the "Digital Diagnostic Monitoring Interface for Optical Transceivers" SFF-8472 Multi-source Agreement. The connectivity available for the transceiver is SC-RJ. This product is lead free and compliant with RoHS. * Temperature and supply voltage of the transceiver can be monitored real-time as well as the received optical modulation amplitude, which is a measure for the optical link quality; AFBR-0978Z Evaluation Kit The evaluation kit AFBR-0978Z includes two evaluation boards, an I/O cable, a SC-RJ optical cable, a CD containing user software and documentation. The evaluation boards are POF/HCS to UTP media converters for easy integration in an existing Fast Ethernet infrastructure and have several features to easily and effectively evaluate the performance of the AFBR-5978Z transceiver. * DMI alarm and warning levels can be retrieved and the alarm and warning flags monitored; * Transceiver Serial ID information can be retrieved; * Supports 10 Mbps and 100 Mbps operation in hardware and software configurable modes: - Forced 10 Mbps only mode; - Forced 100 Mbps only mode; - Non-transparent half duplex auto-negotiation; - Non-transparent full duplex auto-negotiation; - Transparent with auto-negotiation; * Loopback modes for both twisted pair interface as well as fiber optic interface; * Data Output Off mode for both twisted pair as fiber optic interface; * Hardware Link Integrity Warning function for selected modes; * Transmitter Disable mode of the transceiver can be toggled manually on the board or controlled and monitored via software; * Status LEDs indicating 3.3 V power supply, current speed selection for fiber optic and twisted pair interface, current activity for fiber optic and twisted pair interface. HCS is a trademark of OFS Corporation AFBR-5978Z is compatible with the SC-RJ Connecting System from Reichle & De-Massari AG, Switzerland AFBR-0978Z Circuit Design Board Power The evaluation board (Figure 1) is based on the reference design for the AFBR-5978Z transceiver (see application note 5289). The supplied 5 V power adapter is connected to the board by a DC plug and is suitable for 220 V/50 Hz or 110 V/60 Hz outlets. Note that this power adapter does not ground the board to earth. To avoid damage to measurement equipment connected to the board or incorrect measurement results, make sure the evaluation board is connected to ground. Connecting one of the I/O ground pins or the DC plug ground pin to earth accomplishes this. The data signal from the twisted pair medium is routed through magnetics to the media converter IC ML6652 input pins (TPINP and TPINN); a 100 W resistor provides the termination. The transmitter outputs of the ML6652 (IOUT and IOUT#) are directly connected, over a 50 W transmission line, to the input of the transceiver with a pull-up resistor of 75 W to Vcc, which is placed close to the transceiver. No external capacitor is required since the TD and TD inputs of the transceiver are internally AC coupled. The data signal is routed over a 50 W transmission line from the transceiver RD and RD outputs to the input pins of the ML6652 (FOINP and FOINN). These LVPECL inputs are internally biased and need to be AC coupled. The AFBR-5978Z datasheet states in the functional I/O section that when AC coupling is used, the LVPECL outputs of the transceiver have to be pulled to ground before the AC coupling to DC bias the output. This is achieved by use of a bias resistor of 160 W. The twisted pair outputs of the ML6652 (TPOUTP and TPOUTN) are a differential current output pair that drives the data signal through the magnetics into the twisted pair medium. Both outputs are pulled up to Vcc by a 50 W resistor. Initial Setup The twisted pair interface (RJ-45 port) is conFigured in a straight-through mode. If the evaluation kit is used to link two Ethernet devices, one of these devices should be a hub or switch. Otherwise one cross-over cable needs to be used to complete the link. To get started it is recommended to set-up both AFBR0978Z boards in the "transparent with auto-negotiation" mode. This is established by setting S2: 1-OFF, 2-OFF, 3-OFF, 4-ON and setting S3: all OFF. See table 1 for other settings. Once the hardware configuration has been set, the AFBR0978Z evaluation board is ready to be incorporated in the Ethernet (test) environment. Table 1. Function descriptions and switch settings for DIP switches S2 and S3 S2 2 Function Switch State Twisted Pair output ON 1 OFF Twisted Pair output OFF 1 ON Fiber Optic output ON 2 OFF Fiber Optic output OFF 2 ON Link Integrity Warning mode enabled (works only if media converter is set in Forced 10 or 100 Mbps mode) 3 4 ON OFF Link Integrity Warning mode disabled (default) 3 4 OFF ON S3 Function Switch State Forced 10 Mbps mode (auto-negotiation is off, duplex mode is selected by link partners) 1 2 3 4 OFF ON OFF OFF Forced 100 Mbps mode (auto-negotiation is off, duplex mode is selected by link partners) 1 2 3 4 ON OFF OFF OFF Non-transparent half duplex autonegotiation (for FO partner without auto-negotiation, only half duplex is advertised) 1 2 3 4 OFF OFF ON OFF Non-transparent auto-negotiation (for FO partner without auto-negotiation) 1 2 3 4 OFF OFF OFF ON Transparent with auto-negotiation (suitable when both FO and TP partners support auto-negotiation) 1 2 3 4 OFF OFF OFF OFF GND SENSE 1 2 3 4 5 CTR RD RD TD TD 6 5 4 3 2 J3 PULSEJACK JV011I21 1 CTT LT1529_3.3 OUTPUT GNDPAD SHDN VIN C8 10 F C29 R35 20k R34 40.2k VCC_3.3 2 1 8 7 6 5 VCC CLK 3 4 0.1 F R10 4.7k VCC_3.3 VCC_3.3 0.01 F C28 C27 CSX750-FB-C-25.000 GND 8 7 6 5 0.1 F 0.01 F C24 VCC_3.3 C23 100 R18 20k R24 R23 40.2k VCC_3.3 0.01 F R20 49.9 C20 DS1 RED VCC_3.3 DIP switch 4 SMT 1 2 3 4 25.000 MHz NO U4 1 2 3 4 S2 R19 49.9 VCC_3.3 0.01 F C19 C9 22 F FROLYT ERSM 220-35V 332 R12 0.1 F 0.01 F C22 C21VCC_3.3 R38 100 2 1 3 4 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Media Converter IOUT# IOUT GNDL VCCD REFCLK MDC MDIO GNDD FOOUTOFF# TPOUTOFF# GNDE TPINN TPINP VCCE PECLQU PECLTP AD10 AD32 AD4LIW TPOUTN GNDT TPOUTP U2 TL3301SPF160QC 2 3 1 4 S1 Figure 1. Schematic of the AFBR-0978Z evaluation board featuring a fully configurable media converter 6 U1 8 GND GND 7 2 1 1 C14 0.1 F C13 0.1 F Q2 BSN20 2 Q1 BSN20 2 DS2 GREEN 100 R26 VCC_3.3 3 3 100 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 DS3 GREEN FOANDT TPANDT FOINSPD TPINSPD BCKPLINK SDTH RTTP REQSD RTOP GNDB GNDQ FOINP FOINN VCCQ CQOS SDFO GNDFC SPEED VCCFC DUPLEX PWRDWN# VCC_3.3 R25 0.01 F 0.01 F VCCL C11 VCC_3.3 C10 ML6652CM C17 10 F R17 1.4k 1 1 3 1k R33 4.99k R21 2k R22 J1 Interface IO GREEN DS4 GREEN DS6 VCC_3.3 1.4k R16 0.1 F C25 0.1 F C15 0.01 F C12 10 BSN20 3 BSN20 Q4 3 R32 100 R31 332 R28 332 R29 100 R30 100 R4 130 R27 100 Q3 VCC_3.3 C3 10 F VCC_3.3 2 2 GREEN DS5 8 7 6 5 10 nF 8 7 6 5 R1 160 VCC_3.3 R15 2k C16 R14 0.01 F 1.4k R7 4.3k R5 75 VCC_3.3 R8 4.3k R37 1k C5 0.1 F R6 75 R2 160 R36 1k C7 10 F DIP switch 4 SMT 1 2 3 4 S3 10 nF C2 C1 R3 82 VCC_3.3 1 2 3 4 1 H GREEN DS7 C4 0.1 F 1 H L1 L2 C6 0.1 F VCC_3.3 S4 GT12MSCKETR GND 2 1 5V 2.5mm Jack 5 9 4 8 3 7 2 6 1 11 1 J2 1 1 GND 6 RD 6 3 5 RD TxVCC 8 TxGND 7 3 RxVCC 4 SD TxDIS 9 COM TD 10 GND 4 2 RxGND TD 11 1 SDA SCL 12 14 GND GND 13 AFBR-5978Z U3 AFBR-5978Z AFBR-0978Z Software The evaluation kit comes with a special software program for direct control of the evaluation board (see Figure 2). Hardware requirements: PC with at least one ECP parallel printer port, Windows 2000 or XP. Windows VistaTM is not supported. A more detailed description of the hardware configuration and software functionality is given in the AFBR0978Z user manual. Figure 2. The AFBR-0978Z software interface For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright (c) 2005-2010 Avago Technologies. All rights reserved. AV02-0416EN - July 27, 2010