AFBR-0978Z Evaluation Board
Digital Diagnostic 650 nm Transceiver for Ethernet
(10/100 Mbps) with SC-RJ connector
Application Note 5325
Introduction
The AFBR-5978Z transceiver provides the system
designer with the ability to implement Fast Ethernet (100
Mbps) or Ethernet (10 Mbps) over standard bandwidth
0.5 NA Plastic Optical Fiber (POF) and 0.37 NA Hard Clad
Silica (HCS) fiber. The AFBR-5978Z transceiver features an
advanced digital diagnostic interface, compliant to the
“Digital Diagnostic Monitoring Interface for Optical Trans-
ceivers SFF-8472 Multi-source Agreement. The connec-
tivity available for the transceiver is SC-RJ. This product is
lead free and compliant with RoHS.
AFBR-0978Z Evaluation Kit
The evaluation kit AFBR-0978Z includes two evaluation
boards, an I/O cable, a SC-RJ optical cable, a CD contain-
ing user software and documentation. The evaluation
boards are POF/HCS to UTP media converters for easy
integration in an existing Fast Ethernet infrastructure and
have several features to easily and effectively evaluate
the performance of the AFBR-5978Z transceiver.
HCS is a trademark of OFS Corporation
AFBR-5978Z is compatible with the SC-RJ Connecting System from Reichle & De-Massari AG, Switzerland
Features
Temperature and supply voltage of the transceiver can
be monitored real-time as well as the received optical
modulation amplitude, which is a measure for the
optical link quality;
DMI alarm and warning levels can be retrieved and the
alarm and warning flags monitored;
Transceiver Serial ID information can be retrieved;
Supports 10 Mbps and 100 Mbps operation in
hardware and software configurable modes:
Forced 10 Mbps only mode;
Forced 100 Mbps only mode;
Non-transparent half duplex auto-negotiation;
Non-transparent full duplex auto-negotiation;
Transparent with auto-negotiation;
Loopback modes for both twisted pair interface as
well as fiber optic interface;
Data Output O mode for both twisted pair as fiber
optic interface;
Hardware Link Integrity Warning function for selected
modes;
Transmitter Disable mode of the transceiver can be
toggled manually on the board or controlled and
monitored via software;
Status LEDs indicating 3.3 V power supply, current
speed selection for fiber optic and twisted pair
interface, current activity for fiber optic and twisted
pair interface.
2
AFBR-0978Z Circuit Design
The evaluation board (Figure 1) is based on the reference
design for the AFBR-5978Z transceiver (see application
note 5289).
The data signal from the twisted pair medium is routed
through magnetics to the media converter IC ML6652
input pins (TPINP and TPINN); a 100 W resistor provides the
termination. The transmitter outputs of the ML6652 (IOUT
and IOUT#) are directly connected, over a 50 W transmis-
sion line, to the input of the transceiver with a pull-up
resistor of 75 W to Vcc, which is placed close to the trans-
ceiver. No external capacitor is required since the TD and
TD inputs of the transceiver are internally AC coupled.
The data signal is routed over a 50 W transmission line
from the transceiver RD and RD outputs to the input pins
of the ML6652 (FOINP and FOINN). These LVPECL inputs
are internally biased and need to be AC coupled. The
AFBR-5978Z datasheet states in the functional I/O section
that when AC coupling is used, the LVPECL outputs of
the transceiver have to be pulled to ground before the
AC coupling to DC bias the output. This is achieved by
use of a bias resistor of 160 W. The twisted pair outputs
of the ML6652 (TPOUTP and TPOUTN) are a differential
current output pair that drives the data signal through the
magnetics into the twisted pair medium. Both outputs are
pulled up to Vcc by a 50 W resistor.
Board Power
The supplied 5 V power adapter is connected to the
board by a DC plug and is suitable for 220 V/50 Hz or
110 V/60 Hz outlets. Note that this power adapter does
not ground the board to earth. To avoid damage to mea-
surement equipment connected to the board or incorrect
measurement results, make sure the evaluation board is
connected to ground. Connecting one of the I/O ground
pins or the DC plug ground pin to earth accomplishes
this.
Initial Setup
The twisted pair interface (RJ-45 port) is conFigured in
a straight-through mode. If the evaluation kit is used to
link two Ethernet devices, one of these devices should be
a hub or switch. Otherwise one cross-over cable needs to
be used to complete the link.
To get started it is recommended to set-up both AFBR-
0978Z boards in the “transparent with auto-negotiation
mode. This is established by setting S2: 1-OFF, 2-OFF,
3-OFF, 4-ON and setting S3: all OFF. See table 1 for other
settings.
Once the hardware configuration has been set, the AFBR-
0978Z evaluation board is ready to be incorporated in the
Ethernet (test) environment.
Table 1. Function descriptions and switch settings for DIP switches S2 and S3
S2 Function Switch State
Twisted Pair output ON 1 OFF
Twisted Pair output OFF 1 ON
Fiber Optic output ON 2 OFF
Fiber Optic output OFF 2 ON
Link Integrity Warning mode enabled
(works only if media converter is set in
Forced 10 or 100 Mbps mode)
3
4
ON
OFF
Link Integrity Warning mode disabled
(default)
3
4
OFF
ON
S3 Function Switch State
Forced 10 Mbps mode
(auto-negotiation is off, duplex mode is
selected by link partners)
1
2
3
4
OFF
ON
OFF
OFF
Forced 100 Mbps mode
(auto-negotiation is off, duplex mode is
selected by link partners)
1
2
3
4
ON
OFF
OFF
OFF
Non-transparent half duplex auto-
negotiation
(for FO partner without auto-negotiation,
only half duplex is advertised)
1
2
3
4
OFF
OFF
ON
OFF
Non-transparent auto-negotiation
(for FO partner without auto-negotiation)
1
2
3
4
OFF
OFF
OFF
ON
Transparent with auto-negotiation
(suitable when both FO and TP partners
support auto-negotiation)
1
2
3
4
OFF
OFF
OFF
OFF
Figure 1. Schematic of the AFBR-0978Z evaluation board featuring a fully configurable media converter
TPOUTP
1
GNDT
2PWRDWN# 24
DUPLEX 25
VCCFC 26
SPEED 27
GNDFC 28
SDFO 29
CQOS 30
VCCQ 31
FOINN 32
FOINP 33
GNDQ 34
GNDB 35
RTOP 36
REQSD 37
RTTP 38
SDTH 39
BCKPLINK 40
TPINSPD 41
FOINSPD 42
TPANDT 43
FOANDT 44
TPOUTN
3
AD4LIW
4
AD32
5
AD10
6
PECLTP
7
PECLQU
8
VCCE
9
TPINP
10
TPINN
11
GNDE
12
TPOUTOFF#
13
FOOUTOFF#
14
GNDD
15
MDIO
16
MDC
17
REFCLK
18
VCCD
19
GNDL
20
IOUT
21
IOUT#
22
VCCL 23
ML6652CM
U2
Media Converter
C1
10 nF
C2
10 nF
R2
160
R1
160
VCC_3.3
C3
10 µF C4
0.1 µF
C5
0.1 µF
C6
0.1 µF
C7
10 µF
L1
1 µH
L2
1 µH
R3
82
R4
130
R5
75
R6
75
1
2
3
4
5
6
7
8
9
11
10
J1
Interface IO
VCC_3.3
R7
4.3k
R8
4.3k
R10
4.7k
C8
10 µF
C9
22 µF
R12
332
VCC_3.3
VCC_3.3
C10
0.01 µF
C11
0.01 µF
C12
0.01 µF
C13
0.1 µF
C14
0.1 µF
C15
0.1 µF
C16
0.01 µF
R14
1.4k
R15
2k
VCC_3.3
R16
1.4k
VCC_3.3
R17
1.4k
C17
10 µF
CTT 1
TD 2
TD 3
RD 4
RD 5
CTR 6
GND
7GND 8
J3
PULSEJACK JV011I21
R18
100
R19
49.9
R20
49.9
R21
4.99k R22
2k
C19
0.01 µF
C20
0.01 µF
C23
0.01 µF
C24
0.1 µF
VCC_3.3
R23
40.2k
R24
20k
VCC_3.3
C21
0.01 µF
C22
0.1 µF
R26
100
R25
100
VCC_3.3
R27
100
R28
332
R29
100
R30
100
R31
332
R32
100
VCC_3.3
VCC_3.3
R33
1k
C25
0.1 µF
VCC_3.3
R34
40.2k
R35
20k
R36
1k
R37
1k
VCC_3.3
1
1
2
2
3
3
4
455
66
77
88
S2
DIP switch 4 SMT
1
1
2
2
3
3
4
455
66
77
88
S3
DIP switch 4 SMT
1
12
233
44
S1
TL3301SPF160QC
R38
100
VCC_3.3
C27
0.01 µF
C28
0.1 µF
OUTPUT 1
SENSE 2
GND 3
SHDN 4
VIN 5
GNDPAD
6
U1
LT1529_3.3
11
2
3
J2
5V 2.5mm Jack
DS1
RED
DS2
GREEN
DS3
GREEN
DS4
GREEN
DS5
GREEN
DS6
GREEN
DS7
GREEN
VCC_3.3
VCC_3.3
GND
13 GND14
SDA1
RxGND2
RxVCC3
SD 4
RD 5
RD 6
SCL
12
TD
11
TD
10
TxDIS
9
TxGND
8
TxVCC
7
AFBR-5978Z
U3
AFBR-5978Z
GND
4
GND
6
COM1
GND3
S4
GT12MSCKETR
NO
1
GND
2CLK 3
VCC 4
25.000 MHz
U4
CSX750-FB-C-25.000
1
2 3
Q1
BSN20
1
2 3
Q2
BSN20
1
23
Q3
BSN20
1
23
Q4
BSN20
VCC_3.3
12
C29
FROLYT ERSM 220µ-35V
VCC_3.3
AFBR-0978Z Software
The evaluation kit comes with a special software program
for direct control of the evaluation board (see Figure 2).
Hardware requirements: PC with at least one ECP parallel
printer port, Windows 2000 or XP. Windows VistaTM is
not supported.
A more detailed description of the hardware configu-
ration and software functionality is given in the AFBR-
0978Z user manual.
Figure 2. The AFBR-0978Z software interface
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Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved.
AV02-0416EN - July 27, 2010