FUJITSU SEMICONDUCTOR DATA SHEET DS04-28212-1E ASSP Image Processing 30MHz 8-bit A/D Converter (With AMP) MB40C218 DESCRIPTION MB40C218 is a high-speed converter using a fast CMOS technology. FEATURES * * * * * Resolution Linearity error Differential linearity error Maximum conversion rate Supply voltage * * * * * * Digital input voltage range : Digital output voltage range : Analog input voltage range : analog input capacitance : Power dissipation : Additional features : * Package : : : : : : 8 bit 0.2% (standard) 0.12% (standard) 30 MSPS(minimum) Amplifier +5.00 0.25 [V] A/D converter +3.00 0.30 [V] TTL compatible 3 V CMOS level compatible (tristate output) 0 to 1.5 V (1.5 VP-P) 15 pF (standard) 90 mW (standard: @ AVDD5 = 5.00 V, AVDD3 = DVDD = 3.00 V) 1:3 gain amp with dual input selector (bandwidth: 20 MHz, inverting amp) VRT reference voltage adjustment amp Power saving capability Digital output test capability Analog input offset resistor 32-pin plastic QFP PACKAGE 32 pin, Plastic QFP (FPT-32P-M21) MB40C218 PIN ASSIGNMENT 2 OE AV SS OPO ADIN AV SS V IN2 AV DD5 V IN1 32 31 30 29 28 27 26 25 V RB 1 24 NC AV SS 2 23 V RTC AV SS 3 22 V RT SEL 4 21 AV DD3 CE 5 20 NC NC 6 19 TEST AV SS 7 18 CLK DV SS 8 17 DV DD 9 10 11 12 13 14 15 16 D7 (MSB) D6 D5 D4 D3 D2 D1 D0 (LSB) MB40C218 DESCRIPTION OF PINS Pin No. Symbol 26 AVDD5 Analog section power supply (+ 5.00 V) 21 AVDD3 A/D converter analog power supply (+ 3 V) 17 DVDD A/D converter digital power supply (+ 3 V) 2, 3, 7, 28, 31 AVSS Analog power supply ground pin (0 V) 8 DVSS Digital power supply ground pin (0 V) 9 to 16 D7 to D0 18 CLK Clock input pin 29 ADIN A/D converter analog input pin. Input range is VRB to VRT (0 to 1.5 V) Relationship between analog input and digital output is defined by Test function. 23 VRTC Input pin for reference voltage adjustment amp (VRT reference voltage adjustment) VRT is adjusted so that it is 1.5 V with the input pin opened. 22 VRT Reference voltage output pin on top side. The voltage fed to VRTC is output. 1 VRB Reference voltage input pin on bottom side (0V) 25 VIN1 Input pin 1 for 1:3 gain amp 27 VIN2 Input pin 2 for 1:3 gain amp 30 OPO Input pin for 1:3 gain (at standby: high impedance) 4 SEL Toggle input pin for dual input selector for 1:3 gain amp Input "L": VIN1, Input "H": VIN2 CE Input pin for toggling standby function. Input high signal brings the standby state to the A/D converter, 1:3 gain amp, and reference voltage adjustment amp. 5 Description Digital output pin Dual input selector for inverting amp Test function Output (D7 to D0) enable input pin. Input low signal readies digital output. Input high signal induces high-impedance state. 32 OE 19 TEST Test input pin. 6, 20, 24 N.C. No connection pins The values in parentheses are standard. PRECAUTIONS ON USE Be sure to ground the pins of AVDD5, AVDD3, DVDD and VRT via high-frequency capacitor. Place the high-frequency capacitor as close as possible to the pin. You can minimize the power supply current dissipation due to the internal logic indetermination by making CE to high on power turning on. 3 MB40C218 ABSOLUTE MAXIMUM RATINGS Parameter Rating Symbol Min. Max. Units Power supply voltage AVDD5, AVDD3, DVDD -0.3 +7.0 V Input/output voltage SEL, CE, OE CLK, TEST VRB, VRT, VRTC ADIN, VIN1, VIN2 OPO -0.3 AVDD5 + 0.3 V Digital output voltage D0 to D7 -0.3 DVDD + 0.3 V Storage temperature Tstg -55 +125 C Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. In the normal operations, it is recommended to use the device in the recommended conditions; exceeding the conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Parameter Value Units Min. Typ. Max. AVDD5 4.75 5.00 5.25 V AVDD3 2.70 3.00 3.30 V DVDD 2.70 3.00 3.30 V VADIN VRB -- VRT V VRT to VRB 1.05 -- 2.10 V Analog reference input voltage: T VRTC 1.05 -- 2.10 V Analog reference voltage: B VRB 0 -- -- V Digital "H" level input voltage VIHD 2.1 -- -- V Digital "L" level input voltage VILD -- -- 0.8 V IID -- -- 5 A fCLK 0.5 -- 30 MHz "H" level minimum clock pulse width W+ t 14.0 -- -- ns "L" level minimum clock pulse width tW- 14.0 -- -- ns Operating temperature range Ta -20 -- 75 C Power supply voltage Analog conversion range Analog conversion voltage Digital input current Clock frequency 4 Symbol MB40C218 ELECTRICAL CHARACTERISTICS 1. DC Characteristics (1) Analog Section Parameter (AVDD5 = 4.75 to 5.25V, AVDD3 = DVDD = 2.70 to 3.30V, Ta = -20 to +75C) Value Symbol Units Min. Typ. Max. Resolution Linearity error Differential linearity error Conditional DC precision VRT = 1.5V VRB = 0V Analog input capacity Analog supply current Digital supply current Standby supply current DC to 10 MHz 1:3 amp gain 10 to 20 MHz -- -- 8 -- bit LE -- 0.2 0.4 % DLE -- 0.12 0.2 % CADIN -- 15 -- pF AVDD5 -- 7.0 -- mA AVDD3 -- 16.0 -- mA DVDD -- 3.0 -- mA ISTB -- 100 -- A 9.0 9.5 10.0 dB 6.0 6.5 -- dB Gamp VIN1, 2 bias voltage VBI1, 2 -- AVDD5/2 -- V VIN1, 2 input resistance RI1, 2 19 27 35 k VIN1, 2 input capacity CI1, 2 -- 15 -- pF G-Delay -- -- 10 ns 2nd order harmonic distortion H2 -- -- -50 dB 3rd order harmonic distortion H3 -- -- -55 dB CT -- -- -50 dB Setup voltage with open VRTC VRTCO -- AVDD3/2 -- V VRTC input resistance VRTC -- 25 -- k ADIN input resistance RADIN -- 4.5 -- k 1:3 gain amp group delay (DC to 10 MHz) 1:3 gain amp (fin = 4, 5, 7 MHz) Dual power cross talk (fin = 7 MHz) (2) Digital Section Parameter (AVDD5 = 4.75 to 5.25V, AVDD3 = DVDD = 2.70 to 3.30V, Ta = -20 to +75C) Value Symbol Units Min. Typ. Max. Digital "H" level output voltage VOHD 2.4 -- DVDD V Digital "L" level output voltage VOLD -- -- 0.4 V Digital "H" level output current IOHD -400 -- -- A Digital "L" level output current IOLD -- -- 1.6 mA 5 MB40C218 (3) Switching Section Parameter (AVDD5 = 4.75 to 5.25V, AVDD3 = DVDD = 2.70 to 3.30V, Ta = -20 to +75C) Value Symbol Unit Min. Typ. Max. Maximum conversion rate fS 30 -- -- MSPS Digital output delay time tpd 7 13 25 ns TIMING DIAGRAM tw+ tw- 3V CLK 1.5V 0V SANPLEN SANPLEN+1 ADIN tpd V OH D 0 to D 7 DATAN-2 DATAN-1 DATAN 0.5 DV DD V OL DIGITAL OUTPUT BUFFER LOAD CIRCUIT To the measurement point Measurement point C L = 15 pF DV SS 6 (Note) CL includes a stray capacitance of a probe and a fixture. MB40C218 TEST FUNCTION TEST CE SEL OE D0 D1 D2 L L H H H X L H L H H X X X X L H X L L L L L H D0 L D0 H L D1 L D1 L H D2 L D2 H L D3 D4 D3 D4 L L D3 D4 L H H L High impedance D5 D6 D7 D5 L D5 L H D6 L D6 H L D7 L D7 L H DIGITAL OUTPUT CODE ADIN input voltage Step VRT * * * * * * VRB 0 * * 127 128 * * 255 Digital output code TEST = "L" TEST = "H" 0000 0000 * * 0111 1111 1000 0000 * * 1111 1111 1111 1111 * * 1000 0000 0111 1111 * * 0000 0000 Condition: CE = OE = "L" 7 MB40C218 BLOCK DIAGRAM 500 mV p-p DC 5 V 500 mV p-p (max.) (max.) OE AV SS 32 OPO 31 30 AV SS ADIN 29 28 V IN2 27 AV DD5 V IN1 26 25 V RB NC 24 1 AV SS 9.5 dB V RTC 23 AMP 2 AV SS V RT VB1 3 22 4 21 AV DD3 SEL L/H DC control DC 3 V AMP NC CE L/H 5 20 6 19 NC TEST AV SS CLK 8 bit 30 MSPS 7 18 A/DConverter DV SS 9 10 11 12 13 14 15 16 D7 (MSB) D6 D5 D4 D3 D2 D1 D0 (LSB) Digital out L/H DV DD 17 8 8 L/H DC3 V MB40C218 ORDERING INFORMATION Part number Package MB40C218PFQ 32 pin, Plastic QFP (FPT-32P-M02) Remark 9 MB40C218 PACKAGE DIMENSIONS 32 pin, Plastic QFP (FPT-32P-M21) 9.000.20(.354.008)SQ 24 17 7.000.10(.276.004)SQ 25 +0.20 1.50 -0.10 +.008 .059 -.004 16 5.60 (.220) REF 8.00 (.315) NOM 1 PIN INDEX 32 9 1 0.80(.0315)TYP 8 0.300.10 (.012.004) 0.10(.004) C 10 1994 FUJITSU LIMITED F32032S-1C-2 "A" 0.16(.006) M +0.05 0.127 -0.02 +.002 .005 -.001 Details of "A" part 0.100.10 (.004.004) 0 10 0.500.20 (.020.008) Dimensions in mm (inch). MB40C218 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. 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Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F9703 FUJITSU LIMITED Printed in Japan