TPS2065DBV - Texas Instruments High-Performance Analog

D−16D−8 DBV−5 DRB−8

DGN−8

FEATURES APPLICATIONS

TPS2062/TPS2066

D ANDDGNPACKAGE

(TOP VIEW)

†AllEnableInputs Are ActiveHighForTPS2065,TPS2066,andTPS2067

GND

TPS2063/TPS2067

DPACKAGE

(TOP VIEW)

TPS2061/TPS2065

D ANDDGNPACKAGE

(TOP VIEW)

IN1

GND

IN2

OC1

OUT1

OUT2

OUT3

GND

OUT

GND

OC1

OUT1

OUT2

OC2

OC3

OC2

EN3 †

EN †

EN1 †

EN2 †

GND

OUT

TPS2061/TPS2065

DBVPACKAGE

(TOP VIEW)

OC EN †

DESCRIPTION

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

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........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

•Heavy Capacitive Loads2

•70-m ΩHigh-Side MOSFET

•Short-Circuit Protections•1-A Continuous Current•Thermal and Short-Circuit Protection•Accurate Current Limit(1.1 A min, 1.9 A max)•Operating Range: 2.7 V to 5.5 V•0.6-ms Typical Rise Time•Undervoltage Lockout•Deglitched Fault Report ( OC)•No OC Glitch During Power Up•1- µA Maximum Standby Supply Current•Bidirectional Switch•Ambient Temperature Range: -40 ° C to 85 ° C•Built-in Soft-Start•UL Listed - File No. E169910

The TPS206x power-distribution switches are intended for applications where heavy capacitive loads andshort-circuits are likely to be encountered. This device incorporates 70-m ΩN-channel MOSFET power switchesfor power-distribution systems that require multiple power switches in a single package. Each switch is controlledby a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switchrise times and fall times to minimize current surges during switching. The charge pump requires no externalcomponents and allows operation from supplies as low as 2.7 V.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPAD is a trademark of Texas Instruments.

UNLESS OTHERWISE NOTED this document contains

Copyright © 2003 – 2008, Texas Instruments IncorporatedPRODUCTION DATA information current as of publication date.Products conform to specifications per the terms of TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

DESCRIPTION (CONTINUED)

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.

When the output load exceeds the current-limit threshold or a short is present, the device limits the output currentto a safe level by switching into a constant-current mode, pulling the overcurrent ( OCx) logic output low. Whencontinuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junctiontemperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermalshutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remainsoff until valid input voltage is present. This power-distribution switch is designed to set current limit at 1.5 Atypically.

AVAILABLE OPTION AND ORDERING INFORMATION

RECOMMEND TYPICAL PACKAGEDED SHORT- DEVICES

(1)

MAXIMUM CIRCUIT NUMBER OFT

ENABLE

CONTINUOUS CURRENT SWITCHES

MSOP (DGN) SOIC (D) SOT23 (DBV)LOAD LIMITCURRENT AT 25 ° C

Active low TPS2061DGN TPS2061D -SingleActive high TPS2065DGN TPS2065D -Active low TPS2062DGN TPS2062D --40 ° C to 85 ° C DualActive high TPS2066DGN TPS2066D -1 A 1.5 AActive low - TPS2063D -TripleActive high - TPS2067D -Active low - - TPS2061DBV0 ° C to 70 ° C SingleActive high - - TPS2065DBV

(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2062DR).ORDERING INFORMATION

SOIC(D)

(1)

STATUS MSOP (DGN)

(1)

STATUS SOT23 (DBV) STATUS

TPS2061DG4 Active TPS2061DGNG4 Active - -TPS2062DG4 Active TPS2062DGNG4 Active - --40 ° C to 85 ° C

TPS2065DG4 Active TPS2065DGNG4 Active - -TPS2066DG4 Active TPS2066DGNG4 Active - -- - - - TPS2061DBV Active0 ° C to 70 ° C

- - - - TPS2065DBV Active

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

ABSOLUTE MAXIMUM RATINGS

DISSIPATING RATING TABLE

RECOMMENDED OPERATING CONDITIONS

ELECTRICAL CHARACTERISTICS

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

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........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

over operating free-air temperature range unless otherwise noted

(1)

UNIT

Input voltage range, V

I(IN)

(2)

-0.3 V to 6 VOutput voltage range, V

O(OUT)

(2)

, V

O(OUTx)

-0.3 V to 6 VInput voltage range, V

I( EN)

, V

I(EN)

, V

I( ENx)

, V

I(ENx)

-0.3 V to 6 VVoltage range, V

I( OC)

, V

I( OCx)

-0.3 V to 6 VContinuous output current, I

O(OUT)

, I

O(OUTx)

Internally limitedContinuous total power dissipation See Dissipation Rating TableOperating virtual junction temperature range, T

-40 ° C to 125 ° CStorage temperature range, T

stg

-65 ° C to 150 ° CHuman body model MIL-STD-883C 2 kVElectrostatic discharge (ESD) protection

Charge device model (CDM) 500 V

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltages are with respect to GND.

≤25 ° C DERATING FACTOR T

= 70 ° C T

= 85 ° CPACKAGE

POWER RATING ABOVE T

= 25 ° C POWER RATING POWER RATING

D-8 585.82 mW 5.8582 mW/ ° C 322.20 mW 234.32 mWDGN-8 1712.3 mW 17.123 mW/ ° C 941.78 mW 684.33 mWD-16 898.47 mW 8.9847 mW/ ° C 494.15 mW 359.38 mWDBV-5 285 mW 2.85 mW/ ° C 155 mW 114 mW

MIN MAX UNIT

Input voltage, V

I(IN)

2.7 5.5 VInput voltage, V

I( EN)

, V

I(EN)

, V

I( ENx)

, V

I(ENx)

0 5.5 VContinuous output current, I

O(OUT)

, I

O(OUTx)

0 1 AOperating virtual junction temperature, T

-40 125 ° C

over recommended operating junction temperature range, V

I(IN)

= 5.5 V, I

= 1 A, V

I( ENx)

= 0 V, or V

I(ENx)

= 5.5 V (unlessotherwise noted)

PARAMETER TEST CONDITIONS

(1)

MIN TYP MAX UNIT

POWER SWITCH

Static drain-source on-stateresistance, 5-V operation V

I(IN)

= 5 V or 3.3 V, I

= 1 A, -40 ° C ≤T

≤125 ° C 70 135 m Ωand 3.3-V operationr

DS(on)

Static drain-source on-stateresistance, 2.7-V V

I(IN)

= 2.7 V, I

= 1 A, -40 ° C ≤T

≤125 ° C 75 150 m Ωoperation

(2)

I(IN)

= 5.5 V 0.6 1.5t

(2)

Rise time, output

I(IN)

= 2.7 V 0.4 1C

= 1 µF, R

= 5 Ω, T

= 25 ° C msV

I(IN)

= 5.5 V 0.05 0.5t

(2)

Fall time, output

I(IN)

= 2.7 V 0.05 0.5

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into accountseparately.

(2) Not tested in production, specified by design.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

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ELECTRICAL CHARACTERISTICS (continued)over recommended operating junction temperature range, V

I(IN)

= 5.5 V, I

= 1 A, V

I( ENx)

= 0 V, or V

I(ENx)

= 5.5 V (unlessotherwise noted)

PARAMETER TEST CONDITIONS

(1)

MIN TYP MAX UNIT

ENABLE INPUT EN OR EN

High-level input voltage 2.7 V ≤V

I(IN)

≤5.5 V 2

Low-level input voltage 2.7 V ≤V

I(IN)

≤5.5 V 0.8

Input current V

I( ENx)

= 0 V or 5.5 V, V

I(ENx)

= 0 V or 5.5 V -0.5 0.5 µA

Turnon time C

= 100 µF, R

= 5 Ω3

mst

off

Turnoff time C

= 100 µF, R

= 5 Ω10

CURRENT LIMIT

= 25 ° C 1.1 1.5 1.9V

I(IN)

= 5 V, OUT connected to GND,I

Short-circuit output current Adevice enabled into short-circuit

-40 ° C ≤T

≤125 ° C 1.1 1.5 2.1

TPS2061, TPS2062,

1.6 2.3 2.7TPS2065, TPS2066I

OC_TRIP

Overcurrent trip threshold V

I(IN)

= 5 V, current ramp ( ≤100 A/s) on OUT ATPS2063, TPS2067 1.6 2.4 3.0

SUPPLY CURRENT (TPS2061, TPS2065)

= 25 ° C 0.5 1No load on OUT, V

I( ENx)

= 5.5 V,Supply current, low-level output µAor V

I(ENx)

= 0 V

-40 ° C ≤T

≤125 ° C 0.5 5

= 25 ° C 43 60No load on OUT, V

I( ENx)

= 0 V,Supply current, high-level output µAor V

I(ENx)

= 5.5 V

-40 ° C ≤T

≤125 ° C 43 70

OUT connected to ground, V

I( EN)

= 5.5 V,Leakage current -40 ° C ≤T

≤125 ° C 1 µAor V

I(EN)

= 0 V

Reverse leakage current V

I(OUTx)

= 5.5 V, IN = ground T

= 25 ° C 0 µA

SUPPLY CURRENT (TPS2062, TPS2066)

= 25 ° C 0.5 1No load on OUT, V

I( ENx)

= 5.5 V,Supply current, low-level output µAor V

I(ENx)

= 0 V

-40 ° C ≤T

≤125 ° C 0.5 5

= 25 ° C 50 70No load on OUT, V

I( ENx)

= 0 V,Supply current, high-level output µAor V

I(ENx)

= 5.5 V

-40 ° C ≤T

≤125 ° C 50 90

OUT connected to ground, V

I(/ENx)

= 5.5 V,Leakage current -40 ° C ≤T

≤125 ° C 1 µAor V

I(ENx)

= 0 V

Reverse leakage current V

I(OUTx)

= 5.5 V, IN = ground T

= 25 ° C 0.2 µA

SUPPLY CURRENT (TPS2063, TPS2067)

= 25 ° C 0.5 2Supply current, low-level output No load on OUT, V

I( ENx)

= 0 V µA-40 ° C ≤T

≤125 ° C 0.5 10

= 25 ° C 65 90Supply current, high-level output No load on OUT, V

I( ENx)

= 5.5 V µA-40 ° C ≤T

≤125 ° C 65 110

OUT connected to ground, V

I( ENx)

= 5.5 V,Leakage current -40 ° C ≤T

≤125 ° C 1 µAor V

I(ENx)

= 0 V

Reverse leakage current V

I(OUTx)

= 5.5 V, INx = ground T

= 25 ° C 0.2 µA

UNDERVOLTAGE LOCKOUT

Low-level input voltage, IN 2 2.5 V

Hysteresis, IN T

= 25 ° C 75 mV

OVERCURRENT OC1 and OC2

Output low voltage, V

OL(OCx)

O( OCx)

= 5 mA 0.4 V

Off-state current V

O( OCx)

= 5 V or 3.3 V 1 µA

OC deglitch OCx assertion or deassertion 4 8 15 ms

THERMAL SHUTDOWN

(3)

Thermal shutdown threshold 135 ° C

Recovery from thermal shutdown 125 ° C

Hysteresis 10 ° C

(3) The thermal shutdown only reacts under overcurrent conditions.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

DEVICE INFORMATION

OUT

GND

Current

Limit

Driver

UVLO

Charge

Pump

Thermal

Sense Deglitch

Note A: Current sense

Note B: Active low (EN) for TPS2061. Active high (EN) for TPS2065.

(See Note A)

(See Note B)

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

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........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

Pin Functions (TPS2061 and TPS2065)

PINS

D or DGN Package DBV Package I/O DESCRIPTION

NAME TPS2061 TPS2065 TPS2061 TPS2065

EN 4 - 4 - I Enable input, logic low turns on power switchEN - 4 - 4 I Enable input, logic high turns on power switchGND 1 1 2 2 GroundIN 2, 3 2,3 5 5 I Input voltageOC 5 5 3 3 O Overcurrent, open-drain output, active-lowOUT 6, 7, 8 6, 7, 8 1 1 O Power-switch outputInternally connected to GND; used to heat-sink the partPowerPAD™ - - - - to the circuit board traces. Should be connected to GNDpin.

Functional Block Diagram

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

Thermal

Sense

Driver Current

Limit

Charge

Pump

UVLO

Driver Current

Limit

Thermal

Sense

Charge

Pump

GND

EN1

EN2

OC1

OUT1

OUT2

OC2

Deglitch

(See Note A)

(See Note B)

Note A: Current sense

Note B: Active low (ENx) for TPS2062. Active high (ENx) for TPS2066.

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

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Pin Functions (TPS2062 and TPS2066)

PINS

I/O DESCRIPTIONNAME NO.

TPS2062 TPS2066

EN1 3 - I Enable input, logic low turns on power switch IN-OUT1EN2 4 - I Enable input, logic low turns on power switch IN-OUT2EN1 - 3 I Enable input, logic high turns on power switch IN-OUT1EN2 - 4 I Enable input, logic high turns on power switch IN-OUT2GND 1 1 GroundIN 2 2 I Input voltageOC1 8 8 O Overcurrent, open-drain output, active low, IN-OUT1OC2 5 5 O Overcurrent, open-drain output, active low, IN-OUT2OUT1 7 7 O Power-switch output, IN-OUT1OUT2 6 6 O Power-switch output, IN-OUT2Internally connected to GND; used to heat-sink the part to the circuit board traces.PowerPAD™ - -

Should be connected to GND pin.

Functional Block Diagram

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

www.ti.com

........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

Pin Functions (TPS2063 and TPS2067)

PINS

I/O DESCRIPTIONNAME TPS2063 TPS2067

EN1 3 – I Enable input, logic low turns on power switch IN1-OUT1EN2 4 – I Enable input, logic low turns on power switch IN1-OUT2EN3 7 – I Enable input, logic low turns on power switch IN2-OUT3EN1 – 3 I Enable input, logic high turns on power switch IN1-OUT1EN2 – 4 I Enable input, logic high turns on power switch IN1-OUT2EN3 – 7 I Enable input, logic high turns on power switch IN2-OUT3GND 1, 5 1, 5 GroundIN1 2 2 I Input voltage for OUT1 and OUT2IN2 6 6 I Input voltage for OUT3NC 8, 9, 10 8, 9, 10 No connectionOC1 16 16 O Overcurrent, open-drain output, active low, IN1-OUT1OC2 13 13 O Overcurrent, open-drain output, active low, IN1-OUT2OC3 12 12 O Overcurrent, open-drain output, active low, IN2-OUT3OUT1 15 15 O Power-switch output, IN1-OUT1OUT2 14 14 O Power-switch output, IN1-OUT2OUT3 11 11 O Power-switch output, IN2-OUT3

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

Thermal

Sense

Driver Current

Limit

UVLO CS

Driver Current

Limit

Thermal

Sense

GND

EN1

IN1

EN2

OC1

OUT1

OUT2

OC2

Deglitch

Driver Current

Limit

Thermal

Sense

Charge

Pump

GND

IN2

EN3

OUT3

OC3

Deglitch

VCC

Selector

UVLO

(See Note A)

Note A: Current sense

Note B: Active low (ENx) for TPS2063; Active high (ENx) for TPS2067

(See Note A)

(See Note B)

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

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Functional Block Diagram

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

PARAMETER MEASUREMENT INFORMATION

RLCL

OUT

trtf

90% 90%

10%

50% 50%

90%

10%

VO(OUT)

VI(EN)

VO(OUT)

VOLTAGE WAVEFORMS

TEST CIRCUIT

ton toff

50% 50%

90%

10%

VI(EN)

VO(OUT)

ton toff

VI(EN)

5 V/div

VO(OUT)

2 V/div

RL = 5 W,

CL = 1 mF

TA = 255C

t − Time − 500 ms/div

VI(EN)

5 V/div

VO(OUT)

2 V/div

RL = 5 W,

CL = 1 mF

TA = 255C

t − Time − 500 ms/div

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

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........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

Figure 1. Test Circuit and Voltage Waveforms

Figure 2. Turnon Delay and Rise Time With 1- µF Load Figure 3. Turnoff Delay and Fall Time With 1- µF Load

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

VI(EN)

5 V/div

VO(OUT)

2 V/div

RL = 5 W,

CL = 100 mF

TA = 255C

t − Time − 500 ms/div

VO(OUT)

2 V/div

VI(EN)

5 V/div

RL = 5 W,

CL = 100 mF

TA = 255C

t − Time − 500 ms/div

VI(EN)

5 V/div

IO(OUT)

500 mA/div

t − Time − 500 ms/div

VI(EN)

5 V/div

IO(OUT)

500 mA/div

470 mF

100 mF

220 mF

VIN = 5 V

RL = 5 W,

TA = 255C

t − Time − 1 ms/div

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

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PARAMETER MEASUREMENT INFORMATION (continued)

Figure 4. Turnon Delay and Rise Time With 100- µF Load Figure 5. Turnoff Delay and Fall Time With 100- µF Load

Figure 6. Short-Circuit Current, Figure 7. Inrush Current With DifferentDevice Enabled Into Short Load Capacitance

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

VO(OC)

2 V/div

IO(OUT)

1 A/div

t − Time − 2 ms/div

VO(OC)

2 V/div

IO(OUT)

1 A/div

t − Time − 2 ms/div

TYPICAL CHARACTERISTICS

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

23456

Turnon Time − ms

VI − Input Voltage − V

CL = 100 mF,

RL = 5 W,

TA = 255C

1.5

1.6

1.7

1.8

1.9

23456

CL = 100 mF,

RL = 5 W,

TA = 255C

Turnoff Time − mS

VI − Input Voltage − V

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

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........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 8. 2- ΩLoad Connected to Enabled Device Figure 9. 1- ΩLoad Connected to Enabled Device

TURNON TIME TURNOFF TIMEvs vsINPUT VOLTAGE INPUT VOLTAGE

Figure 10. Figure 11.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

0.1

0.2

0.3

0.4

0.5

0.6

2 3 4 5 6

Rise Time − ms

VI − Input Voltage − V

CL = 1 mF,

RL = 5 W,

TA = 255C

0.05

0.1

0.15

0.2

0.25

2 3 4 5 6

CL = 1 mF,

RL = 5 W,

TA = 255C

Fall Time − ms

VI − Input Voltage − V

−50 0 50 100 150

VI = 5.5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Enabled −

II (IN) Aµ

VI = 5 V

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Enabled −

II (IN) Aµ

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

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TYPICAL CHARACTERISTICS (continued)

RISE TIME FALL TIMEvs vsINPUT VOLTAGE INPUT VOLTAGE

Figure 12. Figure 13.

TPS2061, TPS2065 TPS2062, TPS2066SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLEDvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 14. Figure 15.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Enabled −

II (IN) Aµ

TJ − Junction Temperature − 5C

− Supply Current, Output Disabled −II (IN) Aµ

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 2.7 V VI = 3.3 V

VI = 5.5 V

VI = 5 V

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 5.5 V VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Disabled −

II (IN) Aµ

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 2.7 V

TJ − Junction Temperature − 5C

− Supply Current, Output Disabled −

II (IN) Aµ

VI = 3.3 V

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

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........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

TYPICAL CHARACTERISTICS (continued)

TPS2063, TPS2067 TPS2061, TPS2065SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT DISABLEDvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 16. Figure 17.

TPS2062, TPS2066 TPS2063, TPS2067SUPPLY CURRENT, OUTPUT DISABLED SUPPLY CURRENT, OUTPUT DISABLEDvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 18. Figure 19.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

1.34

1.36

1.38

1.4

1.42

1.44

1.48

1.5

1.52

1.54

1.56

−50 0 50 100 150

1.46

VI = 3.3 V

VI = 5 V

VI = 3.3 V

VI = 5.5 V

TJ − Junction Temperature − 5C

− Short-Circuit Output Current − A

IOS

VI = 2.7 V

100

120

−50 0 50 100 150

Out1 = 5 V

Out1 = 3.3 V

Out1 = 2.7 V

IO = 0.5 A

TJ − Junction Temperature − 5C

rDS(on) − Static Drain-Source

On-State Resistance − mΩ

2.1

2.14

2.18

2.22

2.26

2.3

−50 0 50 100 150

UVLO Rising

UVLO Falling

UVOL − Undervoltage Lockout − V

TJ − Junction Temperature − 5C

1.5

1.7

1.9

2.1

2.3

2.5

2.5 3 3.5 4 4.5 5 5.5 6

TA = 255C

Load Ramp = 1A/10 ms

Threshold Trip Current − A

VI − Input Voltage − V

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

www.ti.com

TYPICAL CHARACTERISTICS (continued)

STATIC DRAIN-SOURCE ON-STATE RESISTANCE SHORT-CIRCUIT OUTPUT CURRENTvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 20. Figure 21.

THRESHOLD TRIP CURRENT UNDERVOLTAGE LOCKOUTvs vsINPUT VOLTAGE JUNCTION TEMPERATURE

Figure 22. Figure 23.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

100

150

200

0 2.5 5 7.5 10 12.5

Current-Limit Response − sµ

Peak Current − A

VI = 5 V,

TA = 255C

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

www.ti.com

........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

TYPICAL CHARACTERISTICS (continued)

CURRENT-LIMIT RESPONSE

vsPEAK CURRENT

Figure 24.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

APPLICATION INFORMATION

POWER-SUPPLY CONSIDERATIONS

OC1

EN1

OC2

0.1 µF22 µF

Load

OUT1

OUT2

Power Supply

2.7 V to 5.5 V

EN2

GND

0.1 µF

TPS2062

OVERCURRENT

OC RESPONSE

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

www.ti.com

Figure 25. Typical Application

A 0.01- µF to 0.1- µF ceramic bypass capacitor between IN and GND, close to the device, is recommended.Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing theoutput with a 0.01- µF to 0.1- µF ceramic capacitor improves the immunity of the device to short-circuit transients.

A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do notincrease the series resistance of the current path. When an overcurrent condition is detected, the devicemaintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs onlyif the fault is present long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted before thedevice is enabled or before V

I(IN)

has been applied (see Figure 15 ). The TPS206x senses the short andimmediately switches into a constant-current output.

In the second condition, a short or an overload occurs while the device is enabled. At the instant the overloadoccurs, high currents may flow for a short period of time before the current-limit circuit can react. After thecurrent-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into constant-currentmode.

In the third condition, the load has been gradually increased beyond the recommended operating current. Thecurrent is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device isexceeded (see Figure 18 ). The TPS206x is capable of delivering current up to the current-limit threshold withoutdamaging the device. Once the threshold has been reached, the device switches into its constant-current mode.

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown conditionis encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent orovertemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause amomentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit.The TPS206x is designed to eliminate false overcurrent reporting. The internal overcurrent deglitch eliminatesthe need for external components to remove unwanted pulses. OCx is not deglitched when the switch is turnedoff due to an overtemperature shutdown.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

GND

EN1

EN2

OC1

OC2

OUT1

OUT2

TPS2062 Rpullup

V+

POWER DISSIPATION AND JUNCTION TEMPERATURE

THERMAL PROTECTION

UNDERVOLTAGE LOCKOUT (UVLO)

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

www.ti.com

........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

Figure 26. Typical Circuit for the OC Pin

The low on-resistance on the N-channel MOSFET allows the small surface-mount packages to pass largecurrents. The thermal resistances of these packages are high compared to those of power packages; it is gooddesign practice to check power dissipation and junction temperature. Begin by determining the r

DS(on)

of theN-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use thehighest operating ambient temperature of interest and read r

DS(on)

from Figure 20 . Using this value, the powerdissipation per switch can be calculated by:•P

= r

DS(on)

× I

Multiply this number by the number of switches being used. This step renders the total power dissipation fromthe N-channel MOSFETs.

Finally, calculate the junction temperature:•T

= P

x R

θJA

+ T

Where:

•T

= Ambient temperature ° C•R

θJA

= Thermal resistance•P

= Total power dissipation based on number of switches being used.

Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generallysufficient to get a reasonable answer.

Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present forextended periods of time. The TPS206x implements a thermal sensing to monitor the operating junctiontemperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperaturerises due to excessive power dissipation. Once the die temperature rises above a minimum of 135 ° C due toovercurrent conditions, the internal thermal sense circuitry turns the power switch off, thus preventing the powerswitch from damage. Hysteresis is built into the thermal sense circuit, and after the device has cooledapproximately 10 ° C, the switch turns back on. The switch continues to cycle in this manner until the load fault orinput power is removed. The OCx open-drain output is asserted (active low) when an overtemperature shutdownor overcurrent occurs.

An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the inputvoltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design ofhot-insertion systems where it is not possible to turn off the power switch before input power is removed. TheUVLO also keeps the switch from being turned on until the power supply has reached at least 2 V, even if theswitch is enabled. On reinsertion, the power switch is turned on, with a controlled rise time to reduce EMI andvoltage overshoots.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

UNIVERSAL SERIAL BUS (USB) APPLICATIONS

HOST/SELF-POWERED AND BUS-POWERED HUBS

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

www.ti.com

The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed forlow-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USBinterface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided fordifferential data, and two lines are provided for 5-V power distribution.

USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where poweris distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 Vfrom the 5-V input or its own internal power supply.

The USB specification defines the following five classes of devices, each differentiated by power-consumptionrequirements:

•Hosts/self-powered hubs (SPH)•Bus-powered hubs (BPH)•Low-power, bus-powered functions•High-power, bus-powered functions•Self-powered functions

SPHs and BPHs distribute data and power to downstream functions. The TPS206x has higher current capabilitythan required by one USB port; so, it can be used on the host side and supplies power to multiple downstreamports or functions.

Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (seeFigure 27 ). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstreamconnection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protectionand must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,and stand-alone hubs.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

OC1

EN1

OC2

EN2

GND

0.1 µF

33 µF

GND

OUT1

TPS2062

Power Supply

D+

D−

VBUS

GND

D+

D−

VBUS

Downstream

USB Ports

USB

Controller

3.3 V 5 V

33 µFGND

OUT2

D+

D−

VBUS

33 µFGND

D+

D−

VBUS

0.1 µF

LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

www.ti.com

........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

Figure 27. Typical Four-Port USB Host / Self-Powered Hub

BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required topower up with less than one unit load. The BPH usually has one embedded function, and power is alwaysavailable to the controller of the hub. If the embedded function and hub require more than 100 mA on power up,the power to the embedded function may need to be kept off until enumeration is completed. This can beaccomplished by removing power or by shutting off the clock to the embedded function. Power switching theembedded function is not necessary if the aggregate power draw for the function and controller is less than oneunit load. The total current drawn by the bus-powered device is the sum of the current to the controller, theembedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.

Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-powerfunctions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and candraw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ωand 10 µF at power up, the device must implement inrush current limiting (see Figure 28 ). With TPS206x, theinternal functions could draw more than 500 mA, which fits the needs of some applications such as motor drivingcircuits.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

OC1

OC2

0.1 µF10 µFInternal

Function

OUT1

Power Supply

3.3 V

EN1

0.1 µF10 µF

OUT2 Internal

Function

0.1 µF

10 µF

USB

Control

GND

VBUS

D−

D+ TPS2062

EN2 GND

USB POWER-DISTRIBUTION REQUIREMENTS

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

www.ti.com

Figure 28. High-Power Bus-Powered Function

USB can be implemented in several ways, and, regardless of the type of USB device being developed, severalpower-distribution features must be implemented.•Hosts/SPHs must:– Current-limit downstream ports– Report overcurrent conditions on USB V

BUS•BPHs must:– Enable/disable power to downstream ports– Power up at < 100 mA– Limit inrush current ( < 44 Ωand 10 µF)•Functions must:– Limit inrush currents– Power up at < 100 mA

The feature set of the TPS206x allows them to meet each of these requirements. The integrated current-limitingand overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable and controlled risetimes meet the need of both input and output ports on bus-powered hubs, as well as the input ports forbus-powered functions (see Figure 29 ).

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

DP1

DM1

DP2

DM2

DP3

DM3

DP4

PWRON1

OVRCUR1

PWRON2

OVRCUR2

DM4

DP0

DM0

VCC

XTAL1

XTAL2

OCSOFF

SN75240

D +

D −

5 V

GND

D +

D −

5 V

D +

D −

5 V

D +

D −

5 V

48-MHz

Crystal

Downstream

Ports

TUSB2040

Hub Controller

Tuning

Circuit

33 µF†

SN75240

GND

33 µF†

D +

D −

Upstream

Port

TPS2041B

SN75240

5 V

GND

1 µF

GND

Ferrite Beads

BUSPWR

GANGED

Tie to TPS2041 EN Input

OC EN

OUT

5-V Power

Supply

GND

3.3 V

4.7 µF

0.1 µF

4.7 µF

EN1

OC1

OUT1

TPS2062

EN2

OC2

OUT2

0.1 µF

GND

†USB rev 1.1 requires 120 µF per hub.

TPS76333

GENERIC HOT-PLUG APPLICATIONS

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

www.ti.com

........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

Figure 29. Hybrid Self / Bus-Powered Hub Implementation

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.These are considered hot-plug applications. Such implementations require the control of current surges seen bythe main power supply and the card being inserted. The most effective way to control these surges is to limit andslowly ramp the current and voltage being applied to the card, similar to the way in which a power supplynormally turns on. Due to the controlled rise times and fall times of the TPS206x, these devices can be used toprovide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS206xalso ensures that the switch is off after the card has been removed, and that the switch is off during the nextinsertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card ormodule.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

Power

Supply

0.1 µF

1000 µF

Optimum

2.7 V to 5.5 V

PC Board

Overcurrent Response

TPS2062

OC1

GND

EN1

EN2

OUT1

OUT2

OC2 Block of

Circuitry

Block of

Circuitry

DETAILED DESCRIPTION

Power Switch

Charge Pump

Driver

Enable ( ENx or ENx)

Overcurrent ( OCx)

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008 ........................................................................................................................................

www.ti.com

Figure 30. Typical Hot-Plug Implementation

By placing the TPS206x between the V

input and the rest of the circuitry, the input power reaches thesedevices first after insertion. The typical rise time of the switch is approximately 1 ms, providing a slow voltageramp at the output of the device. This implementation controls system surge currents and provides ahot-plugging mechanism for any device.

The power switch is an N-channel MOSFET with a low on-state resistance. Configured as a high-side switch, thepower switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch supplies aminimum current of 1 A.

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gateof the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requireslittle supply current.

The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associatedelectromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and falltimes of the output voltage.

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reducethe supply current. The supply current is reduced to less than 1 µA when a logic high is present on ENx, or whena logic low is present on ENx. A logic zero input on ENx, or a logic high input on ENx restores bias to the driveand control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS logiclevels.

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition isencountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A10-ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature shutdownoccurs, the OCx is asserted instantaneously.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

Current Sense

Thermal Sense

Undervoltage Lockout

TPS2061 , TPS2062 , TPS2063TPS2065 , TPS2066 , TPS2067

www.ti.com

........................................................................................................................................ SLVS490H – DECEMBER 2003 – REVISED DECEMBER 2008

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently thanconventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitrysends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into itssaturation region, which switches the output into a constant-current mode and holds the current constant whilevarying the voltage on the load.

The TPS206x implements a thermal sensing to monitor the operating temperature of the power distributionswitch. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature risesto approximately 140 ° C due to overcurrent conditions, the internal thermal sense circuitry turns off the switch,thus preventing the device from damage. Hysteresis is built into the thermal sense, and after the device hascooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until thefault is removed. The open-drain false reporting output ( OCx) is asserted (active low) when an overtemperatureshutdown or overcurrent occurs.

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a controlsignal turns off the power switch.

Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067

PACKAGING INFORMATION

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

TPS2061D ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DGN ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DGNG4 ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DGNR ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DGNRG4 ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2061DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062D ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DGN ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DGNG4 ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DGNR ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DGNRG4 ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2062DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2063D ACTIVE SOIC D 16 40 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2063DG4 ACTIVE SOIC D 16 40 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2063DR ACTIVE SOIC D 16 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2063DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

PACKAGE OPTION ADDENDUM

www.ti.com 16-Dec-2008

Addendum-Page 1

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

no Sb/Br)

TPS2065D ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DGN ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DGNG4 ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DGNR ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DGNRG4 ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2065DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066D ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DGN ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DGNG4 ACTIVE MSOP-

Power

PAD

DGN 8 80 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DGNR ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DGNRG4 ACTIVE MSOP-

Power

PAD

DGN 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2066ID PREVIEW SOIC D 8 TBD Call TI Call TI

TPS2066IDR PREVIEW SOIC D 8 TBD Call TI Call TI

TPS2067D ACTIVE SOIC D 16 40 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2067DG4 ACTIVE SOIC D 16 40 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

TPS2067DR ACTIVE SOIC D 16 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

PACKAGE OPTION ADDENDUM

www.ti.com 16-Dec-2008

Addendum-Page 2

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

no Sb/Br)

TPS2067DRG4 ACTIVE SOIC D 16 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-1-260C-UNLIM

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com 16-Dec-2008

Addendum-Page 3

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm) W

(mm) Pin1

Quadrant

TPS2061DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

TPS2061DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

TPS2061DGNR MSOP-

Power

PAD

DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1

TPS2061DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TPS2062DGNR MSOP-

Power

PAD

DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1

TPS2062DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TPS2063DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

TPS2065DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

TPS2065DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

TPS2065DGNR MSOP-

Power

PAD

DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1

TPS2065DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TPS2066DGNR MSOP-

Power

PAD

DGN 8 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 4-Feb-2009

Pack Materials-Page 1

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0 (mm) B0 (mm) K0 (mm) P1

(mm) W

(mm) Pin1

Quadrant

TPS2066DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

TPS2067DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPS2061DBVR SOT-23 DBV 5 3000 195.0 200.0 45.0

TPS2061DBVT SOT-23 DBV 5 250 195.0 200.0 45.0

TPS2061DGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0

TPS2061DR SOIC D 8 2500 340.5 338.1 20.6

TPS2062DGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0

TPS2062DR SOIC D 8 2500 340.5 338.1 20.6

TPS2063DR SOIC D 16 2500 346.0 346.0 33.0

TPS2065DBVR SOT-23 DBV 5 3000 195.0 200.0 45.0

TPS2065DBVT SOT-23 DBV 5 250 195.0 200.0 45.0

TPS2065DGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0

TPS2065DR SOIC D 8 2500 340.5 338.1 20.6

TPS2066DGNR MSOP-PowerPAD DGN 8 2500 370.0 355.0 55.0

TPS2066DR SOIC D 8 2500 340.5 338.1 20.6

TPS2067DR SOIC D 16 2500 346.0 346.0 33.0

PACKAGE MATERIALS INFORMATION

www.ti.com 4-Feb-2009

Pack Materials-Page 2

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TPS2067DR SOIC D 16 2500 333.2 345.9 28.6

PACKAGE MATERIALS INFORMATION

www.ti.com 4-Feb-2009

Pack Materials-Page 3

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