SC4215ISTRT - SEMTECH - Datasheet.Directory

POWER MANAGEMENT

SC4215

Very Low Input /Very Low Dropout

2 Amp Regulator With Enable

Features

nInput Voltage as low as 1.6V

n500mV dropout @ 2A

nAdjustable output from 0.8V

nOver current and over temperature protection

nEnable pin

n10µA quiescent current in shutdown

nFull industrial temperature range

nAvailable in SOIC-8-EDP Pb-Free product. RoHS/WEEE

and Halogen Free compliant

Applications

nTelecom/Networking cards

nMotherboards/Peripheral cards

nIndustrial applications

nWireless infrastructure

nSet top boxes

nMedical equipment

nNotebook computers

nBattery powered systems

Description

The SC4215 is a high performance positive voltage regula-

tor designed for use in applications requiring very low

input voltage and very low dropout voltage at up to 2

amperes. It operates with a Vin as low as 1.6V, with output

voltage programmable as low as 0.8V. The SC4215 features

ultra low dropout, ideal for applications where Vout is very

close to Vin. Additionally, the SC4215 has an enable pin to

further reduce power dissipation while shut down. The

SC4215 provides excellent regulation over variations in

line, load and temperature.

The SC4215 is available in the SOIC-8-EDP (Exposed Die

Pad) package. The output voltage can be set via an exter-

nal divider or to  xed settings of 0.8V and 2.5V depending

on how the ADJ pin is con gured.

Typical Application Circuit

October 8, 2009

SC4215

Pin Con guration

Marking Information

Ordering Information

Device Package

SC4215ISTRT(1)(2) SOIC-8-EDP

SC4215IEVB Evaluation Board

Notes:

(1) Available in tape and reel only. A reel contains 2,500 devices.

(2) Available in Pb-Free product only. RoHS/WEEE and Halogen Free

compliant.

yyww = Date code (Example: 1152)

SC4215I

xxxxxxx

xxxxxxx = Semtech Lot No. (Example: A0E9010)

Top Mark

nnnnnnn= Part Number (Example: SC4215I)

yyww

SC4215

Exceeding the above speci cations may result in permanent damage to the device or device malfunction. Operation outside of the parameters

speci ed in the Electrical Characteristics section is not recommended.

NOTES:

(1) Tested according to JEDEC standard JESD22-A114-B.

(2) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.

Absolute Maximum Ratings

VIN, EN, VO, ADJ to GND (V) . . . . . . . . . . . . . . . . . -0.3 to +7.0

Power Dissipation . . . . . . . . . . . . . . . . . . . . . Internally Limited

ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Recommended Operating Conditions

VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 < VIN < 5.5

Ambient Temperature Range (°C) . . . . . . . . . -40 < TA < +85

Junction Temperature Range (°C) . . . . . . . . . -40 < TJ < +125

Maximum Output Current (A) . . . . . . . . . . . . . . . . . . . . . . . . .2

Thermal Information

Thermal Resistance, Junction to Ambient(2) (°C/W) . . . .

Thermal Resistance, Junction to Case(2) (°C/W) . . . . . . . . 5.5

Maximum Junction Temperature (°C) . . . . . . . . . . . . . .+150

Storage Temperature Range (°C) . . . . . . . . . . . . -65 to +150

Peak IR Re ow Temperature (10s to 30s) (°C) . . . . . . +260

Unless speci ed: VEN = VIN, VIN = 1.6V to 5.5V, IO = 10µA to 2A, TA = 25° C.

Values in bold apply over the full operating temperature range.

Parameter Symbol Conditions Min Typ Max Units

VIN

Quiescent Current IQ

VIN = 3.3V, IO = 0A 0.75 1.75 mA

VIN = 5.5V, VEN =0V 10 50 µA

Output Voltage(1)

VIN= VO + 0.5V, IO = 10mA -2%

+2%

(Fixed Voltage, VADJ = 0) 1.60V ≤ VIN ≤ 5.5V, IO = 10mA -3% +3%

Line Regulation(1) REG (LINE) IO =10mA 0.2 0.4 %/V

Load Regulation(1) REG(LOAD) IO =10mA to 2A 0.5 1.0 %

Electrical Characteristics

SC4215

Parameter Symbol Conditions Min Typ Max Units

Dropout Voltage(1)(2) VDO

IO =1A

90 300

400

IO =1.5A

200 400

500

IO = 2A

VIN =VO+ 0.5V 300 500

VIN =VO+ 0.6V 600

Minimum Load Current(3)(4) IOVIN =VO+ 0.5V 1 10 µA

Current Limit(4) ICL 2.2 34.5 A

ADJ

Reference Voltage(1) VREF VIN = 3.3V, VFB = VOUT , IO =10mA

0.792

0.8

0.808

0.784 0.816

Adjust Pin Current(4) IADJ VADJ = VREF 80 200 nA

Adjust Pin Threshold(5) VTH(ADJ) 0.05 0.16 0.40 V

Enable Pin Current IEN VEN = 0V, VIN =3.3V 1.5 10 µA

Enable Pin Threshold

VIH

VIN=3.3V

1.6

VIL 0.4

Over Temperature Protection

High Trip Level THI 160 OC

Hysteresis THYST 10 OC

Electrical Characteristics (continued)

Notes:

(1) Low duty cycle pulse testing with Kelvin connections required.

(2) VDO = VIN -VO when VO decreases by 1.5% of its nominal output voltage.

(3) Required to maintain regulation. Voltage set resistors R1 and R2 are usually utilized to meet this requirement. Adjustable mode only.

(4) Guaranteed by design.

(5) When VADJ exceeds this threshold, the “Sense Select” switch disconnects the internal feedback chain from the error ampli er and connects VADJ

instead.

SC4215

Typical Characteristics

SC4215

Pin Descriptions

Pin # Pin Name Pin Function

2 EN

Enable Input. Pulling this pin below 0.4V turns the regulator o , reducing the quiescent current to

a fraction of its operating value. The device will be enabled if this pin is left open. Connect to VIN if

not being used.

3 VIN

Input voltage. For regulation at full load, the input to this pin must be between (VO+ 0.5V) and

5.5V. Minimum VIN = 1.6V. A large bulk capacitance should be placed closely to this pin to ensure

that the input supply does not sag below 1.6V. Also a minimum of 4.7uF ceramic capacitor should

be placed directly at this pin.

6 VO The pin is the power output of the device. A minimum of 10uF capacitor should be placed directly

at this pin.

7 ADJ

When this pin is grounded, an internal resistor divider sets the output voltage to 2.5V. If connected

to the Vo pin, the output voltage will be set at 0.8V. If external feedback resistors are used, the

output voltage will be determined by the resistor ratio (See Application Circuits on page 1):

8 GND Reference ground. The GND pin and the exposed die pad must be connected together at the IC

pin.

1, 4, 5 NC No Connection.

THERMAL PAD Pad for heatsinking purposes. Connect to ground plane using multiple vias.

Block Diagram

SC4215

Applications Information (continued)

Introduction

The SC4215 is intended for applications where high

current capability and very low dropout voltage are

required. It provides a very simple, low cost solution that

uses very little PCB real estate. Additional features include

an enable pin to allow for a very low power consumption

standby mode, and a fully adjustable output.

Component Selection

Input capacitor: A large bulk capacitance ≥ 10µF/A

(output load) should be closely placed to the input supply

pin of the SC4215 to ensure that Vin does not sag below

1.4V. Also a minimum of 4.7µF ceramic capacitor is recom-

mended to be placed directly next to the Vin pin. This

allows for the device being some distance from any bulk

capacitance on the rail. Additionally, input droop due to

load transients is reduced, improving load transient

response. Additional capacitance may be added if required

by the application.

Output capacitor: A minimum bulk capacitance of ≥

10µF/A (output load), along with a 0.1µF ceramic decou-

pling capacitor is recommended. Increasing the bulk

capacitance will improve the overall transient response.

The use of multiple lower value ceramic capacitors in par-

allel to achieve the desired bulk capacitance will not cause

stability issues. Although designed for use with ceramic

output capacitors, the SC4215 is extremely tolerant of

output capacitor ESR values and thus will also work com-

fortably with tantalum output capacitors.

Noise immunity: In very electrically noisy environments,

it is recommended that 0.1µF ceramic capacitors be placed

from IN to GND and OUT to GND as close to the device

pins as possible.

Internal voltage selection: By connecting the ADJ pin to

GND, an internal resistor divider will regulate the output

voltage to 2.5V.

If the ADJ pin is connected directly to the VO pin, the

output voltage will be regulated to the 0.8V internal

reference.

External voltage selection resistors: The use of 1%

resistors, and designing for a current  ow ≥ 10µA is rec-

ommended to ensure a well regulated output (thus R2

≤50kΩ). A suitable value for R2 can be chosen in the range

of 1kΩ to 50kΩ. R1 can then be calculated from.

Enable: Pulling this pin below 0.4V turns the regulator o ,

reducing the quiescent current to a fraction of its operat-

ing value. A pull up resistor up to 400kOhms should be

connected from this pin to the VIN pin in applications

where supply voltages of Vin < 1.9V are required. For

applications with higher voltages than 1.9V, EN pin could

be left open or connected to VIN.

Thermal Considerations

The power dissipation in the SC4215 is given by:

The allowable power dissipation will be dependant on the

thermal impedance achieved in the application. The derat-

ing curve below is valid for the thermal impedance speci-

 ed in the Thermal Information section on page 3.

(

)

REF

REFO

RR −

⋅=

(

)

OINOD

VVIP −⋅≈

SC4215

Outline Drawing — SOIC-8-EDP-3

Semtech Corporation

Power Management Products Division

200 Flynn Road, Camarillo, CA 93012

Phone: (805) 498-2111 Fax: (805) 498-3804

www.semtech.com

Contact Information

SC4215

Land Pattern — SOIC-8-EDP-3