S-8232 Series BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK N www.ablicinc.com Rev.6.2_01 DE SI G (c) ABLIC Inc., 1999-2015 The S-8232 series is a lithium-ion / lithium-polymer rechargeable battery protection IC incorporating highaccuracy voltage detection circuit and delay circuit. The S-8232 series is suitable for 2-cell serial lithium-ion / lithium-polymer battery packs. Features MM EN DE D FO R NE W (1) Internal high-accuracy voltage detection circuit Overcharge detection voltage 3.85 V 25 mV to 4.60 V 25 mV Applicable in 5 mV step Overcharge release voltage 3.60 V 50 mV to 4.60 V 50 mV Applicable in 5 mV step (The overcharge release voltage can be selected within the range where a difference from overcharge detection voltage is 0 V to 0.3 V.) Overdischarge detection voltage 1.70 V 80 mV to 2.60 V 80 mV Applicable in 50 mV step Overdischarge release voltage 1.70 V 100 mV to 3.80 V 100 mV Applicable in 50 mV step (The overdischarge release voltage can be selected within the range where a difference from overdischarge detection voltage is 0 V to 1.2 V.) Overcurrent detection voltage 1 0.07 V 20 mV to 0.30 V 20 mV Applicable in 5 mV step (2) High input-voltage device : Absolute maximum ratings 18 V. (3) Wide operating voltage range : 2.0 V to 16 V (4) The delay time for every detection can be set via an external capacitor. (Each delay time for Overcharge detection, Overdischarge detection, Overcurrent detection are "Proportion of hundred to ten to one".) (5) Two overcurrent detection levels (Protection for short-circuiting) (6) Internal auxiliary over voltage detection circuit (Fail-safe for overcharge detection voltage) (7) Internal charge circuit for 0 V battery (Unavailable is option) (8) Low current consumption Operation mode 7.5 A typ. 14.2 A max. ( 40C to 85C) Power-down mode 0.2 nA typ. 0.1 A max. ( 40C to 85C) *1 (9) Lead-free, Sn100%, halogen-free Applications CO *1. Refer to " Product Name Structure" for details. Package RE Lithium-ion rechargeable battery packs Lithium- polymer rechargeable battery packs NO T 8-Pin TSSOP 1 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 N Block Diagram Overdischarge detector 1 DO Delay circuit control signal Control logic FO R Overcharge detector 1 W Auxiliary overcharge detector 1 NE Reference voltage 1 SENS DE SI G VCC VC D RCOL DE Overcharge detector 2 MM EN CO Over current detection circuit Delay circuit control signal VSS CO Overdischarge detector 2 Auxiliary overcharge Reference detector 2 voltage 2 Delay circuit control signal VM Delay circuit control signal Delay circuit ICT DO, CO control signal NO T RE Remark Resistor (RCOL) is connected to the Nch transistor although CO pin serves as a CMOS output. For this, impedance becomes high when outputting "L" from CO pin. Refer to the " Electrical Characteristics" for the impedance value. 2 Figure 1 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Product Name Structure N 1. Product Name Environmental code U: Lead-free (Sn 100%), halogen-free S: Lead-free, halogen-free DE SI G S-8232 xx FT - T2 - x G: Lead-free (for details, please contact our sales office) Package code FT : 8-Pin TSSOP FO R Serial code Sequentially set from AA to ZZ NE W IC direction in tape specifications *1 *1. Refer to the tape specifications. DE D 2. Package Package Name Package FT008-A-P-SD Reel FT008-E-R-SD NO T RE CO MM EN 8-Pin TSSOP Drawing Code Tape FT008-E-C-SD 3 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 3. Product Name List Table 1 (1 / 2) Overcharge release voltage 1, 2 [VCD] Overdischarge detection voltage 1, 2 [VDD] S-8232AAFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.40 V 80 mV Overcharge detection 0 V battery delay time charging [tCU] function (C3 0.22 F) 3.00 V 100 mV 0.150 V 20 mV 1.0 s Available S-8232ABFT-T2-x 4.35 V 25 mV 4.15 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.300 V 20 mV 1.0 s Available S-8232ACFT-T2-x 4.35 V 25 mV 4.15 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.300 V 20 mV 1.0 s Unavailable S-8232AEFT-T2-x 4.35 V 25 mV 4.28 V 50 mV 2.15 V 80 mV 2.80 V 100 mV 0.100 V 20 mV 1.0 s Available S-8232AFFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.30 V 80 mV 2.70 V 100 mV 0.300 V 20 mV 1.0 s Available S-8232AGFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.20 V 80 mV 2.40 V 100 mV 0.200 V 20 mV 1.0 s Available S-8232AHFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.20 V 80 mV 2.40 V 100 mV 0.300 V 20 mV 1.0 s Available *1 *2 W DE SI G Overcurrent detection voltage 1 [VIOV1] NE Product name Overdischarge release voltage1, 2 [VDU] N Overcharge detection voltage 1, 2 [VCU] 4.325 V 25 mV 4.325 V 25 mV 2.40 V 80 mV 3.00 V 100 mV 0.300 V 20 mV 1.0 s Unavailable S-8232AJFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.40 V 80 mV 3.00 V 100 mV 0.150 V 20 mV 1.0 s Unavailable S-8232AKFT-T2-x 4.20 V 25 mV 4.00 V 50 mV 2.30 V 80 mV 2.90 V 100 mV 0.200 V 20 mV 1.0 s Available S-8232ALFT-T2-x 4.30 V 25 mV 4.05 V 50 mV 2.00 V 80 mV 3.00 V 100 mV 0.200 V 20 mV 1.0 s Available 3.00 V 100 mV 0.190 V 20 mV S-8232ANFT-T2-x 4.19 V 25 mV 4.19 V 25 mV 2.00 V 80 mV 1.0 s Available 3.00 V 100 mV 0.300 V 20 mV 1.0 s Unavailable FO S-8232AMFT-T2-x *1 R S-8232AIFT-T2-x *1 *3 4.325 V 25 mV 4.325 V 25 mV 2.40 V 80 mV 4.30 V 25 mV 4.05 V 50 mV 2.00 V 80 mV 3.00 V 100 mV 0.230 V 20 mV 1.0 s Available S-8232APFT-T2-x 4.28 V 25 mV 4.05 V 50 mV 2.30 V 80 mV 2.90 V 100 mV 0.100 V 20 mV 1.0 s Unavailable *1 *3 4.325 V 25 mV 4.325 V 25 mV 2.00 V 80 mV 2.50 V 100 mV 0.300 V 20 mV 1.0 s Unavailable 4.20 V 50 mV*3 3.00 V 100 mV 0.300 V 20 mV 1.0 s Unavailable *4 S-8232ASFT-T2-x 4.295 V 25 mV 2.30 V 80 mV DE S-8232ARFT-T2-x D S-8232AOFT-T2-x *1 S-8232ATFT-T2-x 4.125 V 25 mV 4.125 V 25 mV 2.00 V 80 mV 3.00 V 100 mV 0.190 V 20 mV 1.0 s Available S-8232AUFT-T2-x 4.30 V 25 mV 4.10 V 50 mV 2.40 V 80 mV 3.00 V 100 mV 0.200 V 20 mV 1.0 s Unavailable S-8232AVFT-T2-x 4.30 V 25 mV 4.05 V 50 mV 2.00 V 80 mV 3.00 V 100 mV S-8232AWFT-T2-x 4.35 V 25 mV S-8232AXFT-T2-x S-8232AYFT-T2-x S-8232NAFT-T2-x 1.0 s Available 2.30 V 80 mV 3.00 V 100 mV 0.150 V 20 mV 1.0 s Unavailable 4.325 V 25 mV 4.200 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.20 V 20 mV 1.0 s Unavailable 4.30 V 25 mV 4.05 V 50 mV 2.00 V 80 mV 2.00 V 80 mV 0.20 V 20 mV 1.0 s Available 4.05 V 50 mV 2.30 V 80 mV 2.30 V 80 mV 0.20 V 20 mV 1.0 s Available 0.15 V 20 mV 1.0 s Unavailable 4.30 V 25 mV MM EN S-8232AZFT-T2-x 0.300 V 20mV 4.15 V 50 mV *1 *3 4.325 V 25 mV 4.325 V 25 mV 2.40 V 80 mV 3.00 V 100 mV 4.35 V 25 mV 4.25 V 50 mV 3.00 V 80 mV 3.70 V 100 mV 0.30 V 20 mV 1.0 s Unavailable S-8232NCFT-T2-x 4.275 V 25 mV 4.05 V 50 mV 2.20 V 80 mV 3.00 V 100 mV 0.20 V 20 mV 1.0 s Unavailable S-8232NDFT-T2-x 4.35 V 25 mV 4.15 V 50 mV 2.30 V 80 mV 2.30 V 80 mV 0.15 V 20 mV 1.0 s Available S-8232NEFT-T2-x 4.35 V 25 mV 4.15 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.23 V 20 mV 1.0 s Available 4.325 V 25 mV *3 4.1 V 50 mV 2.30 V 80 mV 2.90 V 100 mV 0.21 V 20 mV 1.0 s Unavailable 4.35 V 25 mV 4.15 V 50 mV 2.60 V 80 mV 3.00 V 100 mV 0.30 V 20 mV 1.0 s Available S-8232NGFT-T2-x S-8232NHFT-T2-x 4.28 V 25 mV 4.05 V 50 mV 2.30 V 80 mV 2.90 V 100 mV 0.11 V 20 mV 1.0 s Unavailable 4.25 V 25 mV 4.05 V 50 mV*3 2.50 V 80 mV 3.00 V 100 mV 0.15 V 20 mV 1.0 s Unavailable 2.90 V 100 mV 0.11 V 20 mV 1.0 s Available NO T S-8232NIFT-T2-x RE S-8232NFFT-T2-x CO S-8232NBFT-T2-x S-8232NJFT-T2-x 4.28 V 25 mV 4.05 V 50 mV 2.30 V 80 mV S-8232NKFT-T2-x 4.35 V 25 mV 4.15 V 50 mV 2.30 V 80 mV 2.30 V 80 mV 0.12 V 20 mV 1.0 s Available S-8232NLFT-T2-x 4.30 V 25 mV 4.05 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.23 V 20 mV 1.0 s Available S-8232NMFT-T2-x 4.28 V 25 mV 4.05 V 50 mV 2.30 V 80 mV 2.90 V 100 mV 0.08 V 20 mV 1.0 s Available 4 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Table 1 (2 / 2) Overcharge release voltage 1, 2 [VCD] S-8232NNFT-T2-x 4.28 V 25 mV 4.08 V 50 mV*3 2.20 V 80 mV 2.40 V 100 mV Overcharge detection 0 V battery delay time charging [tCU] function (C3 0.22 F) 0.13 V 20 mV 1.0 s Unavailable S-8232NOFT-T2-x 4.295 V 25 mV 4.045 V 50 mV*3 2.20 V 80 mV 2.40 V 100 mV 0.13 V 20 mV 1.0 s Unavailable S-8232NPFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.30 V 20 mV 1.0 s Unavailable S-8232NQFT-T2-x 4.25 V 25 mV 4.05 V 50 mV 2.60 V 80 mV 3.00 V 100 mV 0.30 V 20 mV 1.0 s Unavailable S-8232NRFT-T2-x 4.15 V 25 mV 3.95 V 50 mV 2.60 V 80 mV 3.00 V 100 mV 0.30 V 20 mV 1.0 s Unavailable S-8232NSFT-T2-x 4.15 V 25 mV 3.95 V 50 mV 2.30 V 80 mV 3.00 V 100 mV 0.30 V 20 mV 1.0 s Unavailable S-8232NTFT-T2-x 4.225 V 25 mV 4.15 V 50 mV 2.00 V 80 mV 2.00 V 80 mV 0.09 V 20 mV 1.0 s Unavailable S-8232NUFT-T2-x 3.85 V 25 mV 3.75 V 50 mV 2.23 V 80 mV 2.23 V 80 mV 0.15 V 20 mV 1.0 s Available S-8232NWFT-T2-x S-8232NXFT-T2-x S-8232NYFT-T2-x S-8232NZFT-T2-x S-8232PAFT-T2-x S-8232PBFT-T2-y S-8232PCFT-T2-x S-8232PFFT-T2-U 4.21 V 25 mV 4.25 V 25 mV 4.25 V 25 mV 4.21 V 25 mV 4.305 V 25 mV 4.35 V 25 mV 4.21 V 25 mV 4.225 V 25 mV 4.125 V 50 mV 4.05 V 50 mV 4.15 V 50 mV 3.98 V 50 mV 4.125 V 50 mV 4.15 V 50 mV 4.00 V 50 mV *2 4.025 V 50 mV 2.00 V 80 mV 2.80 V 80 mV 2.90 V 80 mV 2.30 V 80 mV 2.00 V 80 mV 2.30 V 80 mV 2.40 V 80 mV 2.70 V 80 mV 2.00 V 80 mV 3.10 V 100 mV 3.10 V 100 mV 2.90 V 100 mV 2.00 V 80 mV 3.00 V 100 mV 3.00 V 100 mV 3.40 V 100 mV 0.09 V 20 mV 0.30 V 20 mV 0.30 V 20 mV 0.11 V 20 mV 0.09 V 20 mV 0.20 V 20 mV 0.20 V 20 mV 0.15 V 20 mV 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s 1.0 s Unavailable Unavailable Unavailable Unavailable Unavailable Unavailable Unavailable Unavailable DE SI G W NE R FO DE No overcharge detection / release hysteresis The magnification of final overcharge is 1.11; the others are 1.25. No final overcharging function Refer to the *2 in the " Operation". (Overcharge detection/release hysteresis", "no final overcharge function", and "0 V battery charge inhibiting function) MM EN *1. *2. *3. *4. Overcurrent detection voltage 1 [VIOV1] D Product name Overdischarge release voltage1, 2 [VDU] Overdischarge detection voltage 1, 2 [VDD] N Overcharge detection voltage 1, 2 [VCU] RE CO Remark 1. Please contact our sales office for the products with detection voltage value other than those specified above. 2. x: G or U y: S or U 3. Please select products of environmental code = U for Sn 100%, halogen-free products. 4. The overdischarge detection voltage can be selected within the range from 1.7 to 3.0 V. When the overdischarge detection voltage is higher than 2.6 V, the overcharge detection voltage and the overcharge release voltage are limited as "Table 2". NO T Overdischarge detection voltage 1, 2 [VDD] 1.70 V to 2.60 V 1.70 V to 2.80 V 1.70 V to 3.00 V Table 2 Overcharge detection voltage 1, 2 [VCU] 3.85 V to 4.60 V 3.85 V to 4.60 V 3.85 V to 4.50 V Voltage difference between overcharge detection voltage and overcharge release voltage [VCU VCD] 0 V to 0.30 V 0 V to 0.20 V 0 V to 0.10 V 5 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Pin Configuration Symbol 1 SENS 2 DO 3 CO 4 VM 5 6 7 8 VSS ICT VC VCC Description Detection pin for voltage between VC and SENS (Detection pin for overcharge and overdischarge) FET gate connection pin for discharge control (CMOS output) FET gate connection pin for charge control (CMOS output) Detection pin for voltage between VSS and VM (Overcurrent detection pin) Input pin for negative power supply Capacitor connection pin for detection delay Input pin for middle voltage Input pin for positive power supply NO T RE CO MM EN DE D FO R Figure 2 Pin No. DE SI G VCC VC ICT VSS W 8 7 6 5 1 2 3 4 NE SENS DO CO VM N Table 3 8-Pin TSSOP Top view 6 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Absolute Maximum Ratings PD R Operating ambient temperature Topr Storage temperature Tstg *1. When mounted on board [Mounted board] (1) Board size : 114.3 mm 76.2 mm t1.6 mm (2) Name : JEDEC STANDARD51-7 (Ta 25C unless otherwise specified) Absolute Maximum Rating Unit V VSS 0.3 to VSS 18 V VSS 0.3 to VCC 0.3 V VSS 0.3 to VCC 0.3 V VCC 18 to VCC 0.3 V VSS 0.3 to VCC 0.3 V VVM 0.3 to VCC 0.3 300 (When not mounted on board) mW 700*1 mW 40 to 85 C 40 to 125 C N Power dissipation Applied Pin VCC SENS ICT VM DO CO W Symbol VDS VSENS VICT VVM VDO VCO NE Item Input voltage between VCC and VSS SENS input pin voltage ICT input pin voltage VM input pin voltage DO output pin voltage CO output pin voltage DE SI G Table 4 FO D 800 DE 700 600 500 400 MM EN Power Dissipation (PD) [mW] Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. 300 200 100 CO 0 0 100 150 50 Ambient Temperature (Ta) [C] NO T RE Figure 3 Power Dissipation of Package (When Mounted on Board) 7 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Electrical Characteristics Table 5 Condition DETECTION VOLTAGE 3.85 V to 4.60 V, Adjustable Overcharge detection voltage 1, 2 VCU1, 2 Auxiliary overcharge detection voltage 1, 2 *1 VCUaux1, VCUaux2 VCU1, VCU2 1.25 or VCUaux1, VCUaux2 VCU1, VCU2 1.11 VCUaux1, 2 VCU1, 2 1.25 VCUaux1, 2 VCU1, 2 1.11 Overcharge release voltage 1, 2 VCD1, 2 Overdischarge detection voltage 1, 2 VDD1, 2 Overdischarge release voltage 1, 2 VDU1, 2 Overcurrent detection voltage 1 VIOV1 Input voltage between VCC and VSS DO voltage "H" CO DO voltage "L" CO voltage "H" tCU1, 2 tDD1, 2 tIOV1 VDS RE CO PIN INTERNAL RESISTANCE Resistance between VM and CO INTERNAL RESISTANCE Resistance between VCC and VM Resistance between VSS and VM 0 V BATTERY CHARGE FUNCTION IOPE IPDN VCU1, 2 VCU1, 2 0.025 VCU1, 2 VCU1, 2 1.25 1.29 VCU1, 2 VCU1, 2 1.11 1.15 VCD1, 2 VCD1, 2 0.050 VDD1, 2 VDD1 ,2 0.080 VDU1, 2 VDU1, 2 0.100 VIOV1 VIOV1 0.020 V 1, 2 1 V 1, 2 1 V 1, 2 1 1, 2 1 1, 2 1 1, 2 1 3 1 3 1 W NE R VDSOP MM EN OPERATING VOLTAGE Operating voltage between VCC and VSS *5 CURRENT CONSUMPTION Current consumption during normal operation Current consumption at power down OUTPUT VOLTAGE TCOE1 TCOE2 FO Temperature coefficient 1 for detection voltage Temperature coefficient 2 for detection voltage *3 DELAY TIME (C3 0.22 F) Overcharge detection delay time 1, 2 Overdischarge detection delay time 1, 2 Overcurrent detection delay time 1 INPUT VOLTAGE 1.0 s 0.1 s 0.01 s 0.73 68 6.7 1.00 100 10 1.35 138 13.9 s ms ms 8, 9 8, 9 10 5 5 5 Absolute maximum rating 0.3 18 V Output logic fixed 2.0 16 V V1 V2 3.6 V V1 V2 1.5 V 2.1 0 7.5 0.0002 12.7 0.04 A A 4 4 2 2 V 6 3 V 6 3 V 7 4 D VIOV2 *2 VCU1, 2 0.025 VCU1, 2 1.21 VCU1, 2 1.07 VCD1, 2 0.050 VDD1, 2 0.080 VDU1, 2 0.100 VIOV1 0.020 3.60 V to 4.60 V, V Adjustable 1.70 V to 2.60 V, V Adjustable 1.70 V to 3.80 V, V Adjustable 0.07 V to 0.30 V, V Adjustable Load short circuit, 1.57 1.20 0.83 V VCC reference *4 0.6 0 0.6 mV/C Ta 40C to 85C 0 mV/C Ta 40C to 85C *4 0.24 0.05 DE Overcurrent detection voltage 2 N Symbol DE SI G Item (Ta 25C unless otherwise specified) Test Test Min. Typ. Max. Unit Condition Circuit VCC VCC VCC 0.05 0.003 VSS VSS VSS 0.003 0.05 VCC VCC VCC 0.15 0.019 VDO(H) IOUT 10 A VDO(L) IOUT 10 A VCO(H) IOUT 10 A RCOL VCO VVM 9.4 V 0.29 0.6 1.44 M 7 4 RVCM RVSM VCC VVM 0.5 V VVM VSS 1.1 V 105 511 240 597 575 977 k k 5 5 2 2 0 V battery charging 0.38 0.75 1.12 V 11 6 function "available" 0 V battery charging 0 V battery charge inhibition battery voltage 1, 2 V0INH1, 2 function 0.88 1.44 V 12, 13 6 "unavailable" 0.32 *1. Auxiliary overcharge detection voltage is equal to the overcharge detection voltage times 1.11 for the products without overcharge hysteresis, and times 1.25 for other products. *2. Temperature coefficient 1 for detection voltage should be applied to overcharge detection voltage, overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage. *3. Temperature coefficient 2 for detection voltage should be applied to overcurrent detection voltage. *4. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *5. The DO and CO pin logic are established at the operating voltage. NO T 0 V battery charge starting charger voltage 8 V0CHA BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Table 6 (Ta 20C to 70C unless otherwise specified *1) Test Test Symbol Condition Min. Typ. Max. Unit Condition Circuit DETECTION VOLTAGE 3.85 V to 4.60 V, Adjustable Overcharge detection voltage 1, 2 VCU1, 2 Auxiliary overcharge detection voltage 1, 2 *2 VCUaux1, VCUaux2 VCU1, VCU2 1.25 or VCUaux1, VCUaux2 VCU1, VCU2 1.11 VCUaux1, 2 VCU1, 2 1.25 VCUaux1, 2 VCU1, 2 1.11 Overcharge release voltage 1, 2 VCD1, 2 Overdischarge detection voltage 1, 2 VDD1, 2 Overdischarge release voltage 1, 2 VDU1, 2 Overcurrent detection voltage 1 VIOV1 Input voltage between VCC and VSS DO voltage "H" DO voltage "L" CO voltage "H" RE CO CO PIN INTERNAL RESISTANCE Resistance between VM and CO INTERNAL RESISTANCE Resistance between VCC and VM Resistance between VSS and VM 0 V BATTERY CHARGE FUNCTION V 1, 2 1 V 1, 2 1 V 1, 2 1 1, 2 1 1, 2 1 1, 2 1 3 1 3 1 W NE R tCU1, 2 tDD1, 2 tIOV1 0.60 67 6.5 1.00 100 10 1.84 140 14.5 s ms ms 8, 9 8, 9 10 5 5 5 Absolute maximum rating 0.3 18 V VDSOP Output logic fixed 2.0 16 V IOPE IPDN V1 V2 3.6 V V1 V2 1.5 V 1.9 0 7.5 0.0002 13.8 0.06 A A 4 4 2 2 V 6 3 V 6 3 V 7 4 VDS 1.0 s 0.1 s 0.01 s MM EN OPERATING VOLTAGE Operating voltage between VCC and VSS *5 CURRENT CONSUMPTION Current consumption during normal operation Current consumption at power down OUTPUT VOLTAGE TCOE1 TCOE2 D Temperature coefficient 1 for detection voltage Temperature coefficient 2 for detection voltage *4 DELAY TIME (C3 0.22 F) Overcharge detection delay time 1, 2 Overdischarge detection delay time 1, 2 Overcurrent detection delay time 1 INPUT VOLTAGE FO VIOV2 *3 VCU1, 2 VCU1, 2 0.040 VCU1, 2 VCU1, 2 1.25 1.31 VCU1, 2 VCU1, 2 1.11 1.17 VCD1, 2 VCD1, 2 0.065 VDD1, 2 VDD1 ,2 0.095 VDU1, 2 VDU1, 2 0.115 VIOV1 VIOV1 0.029 3.60 V to 4.60 V, V Adjustable 1.70 V to 2.60 V, V Adjustable 1.70 V to 3.80 V, V Adjustable 0.07 V to 0.30 V, V Adjustable Load short circuit, 1.66 1.20 0.74 V VCC reference *1 0 0.6 mV/C Ta 40C to 85C 0.6 0 mV/C Ta 40C to 85C *1 0.24 0.05 DE Overcurrent detection voltage 2 VCU1, 2 0.045 VCU1, 2 1.19 VCU1, 2 1.05 VCD1, 2 0.070 VDD1, 2 0.100 VDU1, 2 0.120 VIOV1 0.029 DE SI G N Item VCC VCC VCC 0.14 0.003 VSS VSS VSS 0.003 0.14 VCC VCC VCC 0.24 0.019 VDO(H) IOUT 10 A VDO(L) IOUT 10 A VCO(H) IOUT 10 A RCOL VCO VVM 9.4 V 0.24 0.6 1.96 M 7 4 RVCM RVSM VCC VVM 0.5 V VVM VSS 1.1 V 86 418 240 597 785 1332 k k 5 5 2 2 0 V battery charging 0.29 0.75 1.21 V 11 6 function "available" 0 V battery charging 0 V battery charge inhibition battery voltage 1, 2 V0INH1, 2 function 0.88 1.53 V 12, 13 6 "unavailable" 0.23 *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *2. Auxiliary overcharge detection voltage is equal to the overcharge detection voltage times 1.11 for the products without overcharge hysteresis, and times 1.25 for other products. *3. Temperature coefficient 1 for detection voltage should be applied to overcharge detection voltage, overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage. *4. Temperature coefficient 2 for detection voltage should be applied to overcurrent detection voltage. *5. The DO pin and CO pin logic are established at the operating voltage. V0CHA NO T 0 V battery charge starting charger voltage 9 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Table 7 N Symbol DETECTION VOLTAGE 3.85 V to 4.60 V, Adjustable Overcharge detection voltage 1, 2 VCU1, 2 Auxiliary overcharge detection voltage 1, 2 *2 VCUaux1, VCUaux2 VCU1, VCU2 1.25 or VCUaux1, VCUaux2 VCU1, VCU2 1.11 VCUaux1, 2 VCU1, 2 1.25 VCUaux1, 2 VCU1, 2 1.11 Overcharge release voltage 1, 2 VCD1, 2 Overdischarge detection voltage 1, 2 VDD1, 2 Overdischarge release voltage 1, 2 VDU1, 2 Overcurrent detection voltage 1 VIOV1 Input voltage between VCC and VSS DO voltage "H" DO voltage "L" CO voltage "H" RE CO CO PIN INTERNAL RESISTANCE Resistance between VM and CO INTERNAL RESISTANCE Resistance between VCC and VM Resistance between VSS and VM 0 V BATTERY CHARGE FUNCTION V 1, 2 1 V 1, 2 1 V 1, 2 1 V 1, 2 1 V 1, 2 1 V 1, 2 1 V 3 1 1.20 0.71 V 3 1 0 0.05 0.6 0 mV/C mV/C VCU1, 2 1.25 VCU1, 2 1.11 VCD1, 2 W VDD1, 2 VDU1, 2 NE R tCU1, 2 tDD1, 2 tIOV1 VIOV1 1.0 s 0.1 s 0.01 s 0.55 67 6.3 1.00 100 10 2.06 141 14.7 s ms ms 8, 9 8, 9 10 5 5 5 Absolute maximum rating 0.3 18 V VDSOP Output logic fixed 2.0 16 V IOPE IPDN V1 V2 3.6 V V1 V2 1.5 V 1.8 0 7.5 0.0002 14.2 0.10 A A 4 4 2 2 VCC VCC 0.17 0.003 VSS VSS 0.003 VCC VCC 0.27 0.019 VCC V 6 3 VSS 0.17 VCC V 6 3 V 7 4 VDS MM EN OPERATING VOLTAGE Operating voltage between VCC and VSS *5 CURRENT CONSUMPTION Current consumption during normal operation Current consumption at power down OUTPUT VOLTAGE TCOE1 TCOE2 VCU1, 2 0.045 VCU1, 2 1.31 VCU1, 2 1.17 VCD1, 2 0.070 VDD1 ,2 0.100 VDU1, 2 0.120 VIOV1 0.033 VCU1, 2 D Temperature coefficient 1 for detection voltage Temperature coefficient 2 for detection voltage *4 DELAY TIME (C3 0.22 F) Overcharge detection delay time 1, 2 Overdischarge detection delay time 1, 2 Overcurrent detection delay time 1 INPUT VOLTAGE FO VIOV2 *3 3.60 V to 4.60 V, Adjustable 1.70 V to 2.60 V, Adjustable 1.70 V to 3.80 V, Adjustable 0.07 V to 0.30 V, Adjustable Load short circuit, 1.70 VCC reference *1 Ta 40C to 85C 0.6 Ta 40C to 85C *1 0.24 DE Overcurrent detection voltage 2 VCU1, 2 0.055 VCU1, 2 1.19 VCU1, 2 1.05 VCD1, 2 0.080 VDD1, 2 0.110 VDU1, 2 0.130 VIOV1 0.033 DE SI G Item (Ta 40C to 85C unless otherwise specified *1) Test Test Condition Min. Typ. Max. Unit Condition Circuit VDO(H) IOUT 10 A VDO(L) IOUT 10 A VCO(H) IOUT 10 A RCOL VCO VVM 9.4 V 0.22 0.6 2.20 M 7 4 RVCM RVSM VCC VVM 0.5 V VVM VSS 1.1 V 79 387 240 597 878 1491 k k 5 5 2 2 0 V battery charging 0.26 0.75 1.25 V 11 6 function "available" 0 V battery charge inhibition battery voltage 1, 2 V0INH1, 2 0 V battery charging 0.20 0.88 1.57 V 12, 13 6 function "unavailable" *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. *2. Auxiliary overcharge detection voltage is equal to the overcharge detection voltage times 1.11 for the products without overcharge hysteresis, and times 1.25 for other products. *3. Temperature coefficient 1 for detection voltage should be applied to overcharge detection voltage, overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage. *4. Temperature coefficient 2 for detection voltage should be applied to overcurrent detection voltage. *5. The DO pin and CO pin logic are established at the operating voltage. NO T 0 V battery charge starting charger voltage 10 V0CHA BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Test Circuits (1) Test Condition 1, Test Circuit 1 DE SI G N Set S1 OFF, V1 V2 3.6 V, and V3 0 V under normal status. Increase V1 from 3.6 V gradually. The V1 voltage when CO "L" is overcharge detection voltage 1 (VCU1). Decrease V1 gradually. The V1 voltage when CO "H" is overcharge release voltage 1 (VCD1). Further decrease V1. The V1 voltage when DO "L" is overdischarge voltage 1 (VDD1). Increase V1 gradually. The V1 voltage when DO "H" is overdischarge release voltage 1 (VDU1). Set S1 ON, and V1 V2 3.6 V and V3 0 V under normal status. Increase V1 from 3.6 V gradually. The V1 voltage when CO "L" is auxiliary overcharge detection voltage 1 (VCUaux1). (2) Test Condition 2, Test Circuit 1 R NE W Set S1 OFF, V1 V2 3.6 V, and V3 0 V under normal status. Increase V2 from 3.6 V gradually. The V2 voltage when CO "L" is overcharge detection voltage 2 (VCU2). Decrease V2 gradually. The V2 voltage when CO "H" is overcharge release voltage 2 (VCD2). Further decrease V2. The V2 voltage when DO "L" is overdischarge voltage 2 (VDD2). Increase V2 gradually. The V2 voltage when DO "H" is overdischarge release voltage 2 (VDU2). Set S1 ON, and V1 V2 3.6 V and V3 0 V under normal status. Increase V2 from 3.6 V gradually. The V2 voltage when CO "L" is auxiliary overcharge detection voltage 2 (VCUaux2). FO (3) Test Condition 3, Test Circuit 1 (4) Test Condition 4, Test Circuit 2 DE D Set S1 OFF, V1 V2 3.6 V, and V3 0 V under normal status. Increase V3 from 0 V gradually. The V3 voltage when DO "L" is overcurrent detection voltage 1 (VIOV1). Set S1 ON, V1 V2 3.6 V, V3 0 under normal status. Increase V3 from 0 V gradually. (The voltage change rate < 1.0 V / ms) V3 (V1 V2) voltage when DO "L" is overcurrent detection voltage 2 (VIOV2). MM EN Set S1 ON, V1 V2 3.6 V, and V3 0 V under normal status and measure current consumption. Current consumption I1 is the normal status current consumption (IOPE). Set S1 OFF, V1 V2 1.5 V under overdischarge status and measure current consumption. Current consumption I1 is the power-down current consumption (IPDN). (5) Test Condition 5, Test Circuit 2 CO Set S1 ON, V1 V2 V3 1.5 V, and V3 2.5 V under overdischarge status. (V1 V2 V3) / I2 is the internal resistance between VCC and VM (RVCM). Set S1 ON, V1 V2 3.6 V, and V3 1.1 V under overcurrent status. V3 / I2 is the internal resistance between VSS and VM (RVSM). RE (6) Test Condition 6, Test Circuit 3 NO T Set S1 ON, S2 OFF, V1 V2 3.6 V, and V3 0 V under normal status. Increase V4 from 0 V gradually. The V4 voltage when I1 10 A is DO voltage "H" (VDO(H)). Set S1 OFF, S2 ON, V1 V2 3.6 V, and V3 0.5 V under overcurrent status. Increase V5 from 0 V gradually. The V5 voltage when I2 10 A is the DO voltage "L" (VDO(L)). 11 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 (7) Test Condition 7, Test Circuit 4 DE SI G N Set S1 ON, S2 OFF, V1 V2 3.6 V and V3 0 V under normal status. Increase V4 from 0 V gradually. The V4 voltage when I1 10 A is the CO "H" voltage (VCO(H)). Set S1 OFF, S2 ON, V1 V2 4.7, V3 0 V, and V5 9.4 V under overcharge status. (V5) / I2 is the internal resistance between VM and CO (RCOL). (8) Test Condition 8, Test Circuit 5 NE W Set V1 V2 3.6 V, and V3 0 V under normal status. Increase V1 from (VCU1 0.2 V) to (VCU1 0.2 V) immediately (within 10 s). The time after V1 becomes (VCU1 0.2 V) until CO goes "L" is the overcharge detection delay time 1 (tCU1). Set V1 V2 3.6 V, and V3 0 V under normal status. Decrease V1 from (VDD1 0.2 V) to (VDD1 0.2 V) immediately (within 10 s). The time after V1 becomes (VDD1 0.2 V) until DO goes "L" is the overdischarge detection delay time 1 (tDD1). (9) Test Condition 9, Test Circuit 5 FO R Set V1 V2 3.6 V, and V3 0 V under normal status. Increase V2 from (VCU2 0.2 V) to (VCU2 0.2 V) immediately (within 10 s). The time after V2 becomes (VCU2 0.2 V) until CO goes "L" is the overcharge detection delay time 2 (tCU2). Set V1 V2 3.6 V, and V3 0 V under normal status. Decrease V2 from (VDD2 0.2 V) to (VDD2 0.2 V) immediately (within 10 s). The time after V2 becomes (VDD2 0.2 V) until DO goes "L" is the overdischarge detection delay time 2 (tDD2). D (10) Test Condition 10, Test Circuit 5 MM EN (11) Test Condition 11, Test Circuit 6 DE Set V1 V2 3.6 V, and V3 0 V under normal status. Increase V3 from 0 V to 0.5 V immediately (within 10 s). The time after V3 becomes 0.5 V until DO goes "L" is the overcurrent detection delay time 1 (tIOV1). Set V1 V2 0 V, and V3 0 V, and increase V3 gradually. The V3 voltage when CO "L" (VVM 0.3 V or higher) is the 0 V charge starting voltage (V0CHA). (12) Test Condition 12, Test Circuit 6 CO Set V1 0 V, V2 3.6 V, and V3 12 V, and increase V1 gradually. The V1 voltage when CO "H" (VVM 0.3 V or higher) is the 0 V charge inhibiting voltage 1 (V0INH1). (13) Test Condition 13, Test Circuit 6 NO T RE Set V1 3.6 V, V2 0 V, and V3 12 V, and increase V2 gradually. The V2 voltage when CO "H" (VVM 0.3 V or higher) is the 0 V charge inhibiting voltage 2 (V0INH2). 12 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 SENS SENS I1 VCC ICT VC S-8232 Series V1 S1 ICT VC V2 V2 VM VSS DO VSS DE SI G S-8232 Series VM DO CO V3 N VCC V1 CO I2 V3 S1 Test Circuit 2 W Test Circuit 1 SENS NE SENS VCC VCC S-8232 Series V1 VC V1 ICT S-8232 Series ICT VC R V2 V2 VM VSS DO FO CO V4 I2 S1 I1 MM EN Test Circuit 3 SENS VCC S-8232 Series VC V2 ICT RE V3 S2 I2 S1 I1 Test Circuit 4 C3 VCC S-8232 Series V1 ICT VC V2 VM VSS CO DO CO DO V5 SENS VM VSS CO V3 V4 C3 0.22 F V1 DO DE V5 D V3 S2 VM VSS CO V3 Test Circuit 5 4.7 M Test Circuit 6 NO T Figure 4 13 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Operation Remark Refer to " Battery Protection IC Connection Example". N Normal Status *1, *2 DE SI G This IC monitors the voltages of the two serially connected batteries and the discharge current to control charging and discharging. When the voltages of two batteries are more than the overdischarge detection voltage (VDD1, 2), less than the overcharge detection voltage (VCU1, 2), and the current flowing through the batteries becomes equal or lower than a specified value (the VM pin voltage is equal or lower than overcurrent detection voltage 1), the charging and discharging FETs are turned on. In this status, charging and discharging can be carried out freely. This is normal status. In this status, the VM and VSS pins are shorted by the RVSM resistor. Overcurrent Status R NE W When the discharging current becomes equal to or higher than a specified value (the VM pin voltage is equal to or higher than the overcurrent detection voltage1) during discharging under the normal status and it continues for the overcurrent detection delay time (tIOV1) or longer, the discharging FET is turned off to stop discharging. This is overcurrent status. The VM and VSS pins are shorted by the RVSM resistor in this status. The charging FET is also turned off. While the discharging FET is off and a load is connected, the VM pin voltage is equal to the VCC potential. The overcurrent status returns to the normal status when impedance between the EB and EB pins (refer to Figure 8) is 200 M or higher, by action such as releasing the load. When the load is released, the VM pin, which is shorted to the VSS pin by the RVSM resistor, goes back to the VSS potential. The IC detects that the VM pin potential returns to overcurrent detection voltage 1 (VIOV1) or lower and returns to the normal status. FO Overcharge Status NO T RE CO MM EN DE D Following two cases are detected as overcharge status : (1) If any of the battery voltages becomes higher than the overcharge detection voltage (VCU1, 2) during charging under the normal status and it continues for the overcharge detection delay time (tCU1, 2) or longer, the charging FET turns off to stop charging. This is overcharge status. In this status, the VM and VSS pins are shorted by the RVSM resistor. (2) Although the status is shorter than the overcharge detection delay time (tCU1, 2), if any of the battery voltages becomes higher than the auxiliary overcharge detection voltage (VCUaux1, 2), the charging FET turns off to stop charging. This is also overcharge status. In this status, the VM and VSS pins are shorted by the RVSM resistor. The auxiliary overcharge detection voltages (VCUaux1, 2) are correlated with the overcharge detection voltages (VCU1, 2) and are defined by following equations : VCUaux1, 2 [V] 1.25 VCU1, 2 [V] or VCUaux1, 2 [V] 1.11 VCU1, 2 [V] The overcharge status is released in two cases : (1) The battery voltage which exceeded the overcharge detection voltage (VCU1, 2) falls below the overcharge release voltage (VCD1, 2), the charging FET turns on and the IC returns to the normal status. (2) If the battery voltage which exceeded the overcharge detection voltage (VCU1, 2) is equal or higher than the overcharge release voltage (VCD1, 2), however, discharging starts with removing the charger and connecting the load, the charging FET turns on and the IC returns to the normal status. The mechanism to release is as follows: the discharge current flows via an internal parasitic diode of the charging FET, immediately after connecting the load and discharging starts. Therefore the VM pin's voltage momentarily increases about 0.6 V (voltage as much as VF voltage of the diode has) plus the VSS pin's voltage. The IC detects this voltage by using overcurrent detection voltage 1 (VIOV1) so that the IC releases the overcharge status and returns to the normal status. Overdischarge Status If any of the battery voltages falls below the overdischarge detection voltage (VDD1, 2) during discharging under the normal status and it continues for the overdischarge detection delay time (tDD1, 2) or longer, the discharging FET turns off and discharging stops. This is overdischarge status. When the discharging FET turns off, the VM pin voltage becomes equal to the VCC voltage and the IC's current consumption falls below the power-down current consumption (IPDN). This is power-down status. The VM and VCC pins are shorted by the RVCM resistor in the overdischarge and power-down statuses. The power-down status is released when the charger is connected and the voltage between VM and VCC is overcurrent detection voltage 2 or higher. In this status, When all the battery voltages becomes equal to or higher than the overdischarge release voltage (VDU1, 2) in this status, The IC returns to the normal status from the overdischarge status. 14 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 DE SI G N Delay Circuit The overcharge detection delay time (tCU1, 2), the overdischarge detection delay time (tDD1, 2), and the overcurrent detection delay time 1 (tIOV1) change with an external capacitor (C3). Since one capacitor determine each delay time, delay times are correlated as seen in the following ratio : Overcharge delay time : Overdischarge delay time : Overcurrent delay time 100 : 10 : 1 The delay times are calculated by the following equations : (Ta 40C to 85C) Min., Typ., Max. ( 2.500, 4.545, 9.364 ) C3 [F] Overcharge detection delay time tCU [s] Delay factor ( 0.3045, 0.4545, 0.6409 ) C3 [F] Overdischarge detection delay time tDD [s] Delay factor ( 0.02864, 0.04545, 0.06682 ) C3 [F] Overcurrent detection delay time tIOV1 [s] Delay factor Remark The overcurrent detection delay time 2 is not set Overcurrent detection voltage 2 (VIOV2). 0 V Battery Charging Function *3 R NE W This function is used to recharge both of two serially-connected batteries after they self-discharge to 0 V. When the 0 V charging start voltage (V0CHA) or higher is applied to between VM and VCC by connecting the charger, the charging FET gate is fixed to VCC potential. When the voltage between the gate and the source of the charging FET becomes equal to or higher than the turn-on voltage by the charger voltage, the charging FET turns on to start charging. At this time, the discharging FET turns off and the charging current flows through the internal parasitic diode in the discharging FET. If all the battery voltages become equal to or higher than the overdischarge release voltage (VDU1, 2), the IC returns to the normal status. FO 0 V Battery Charge Inhibiting Function *3 MM EN DE D This function is used for inhibiting charging after either of the connected batteries goes 0 V due to its self-discharge. When the voltage of either of the connected batteries goes below the 0 V charge inhibit voltage 1 and 2 (V0INH1, 2), the charging FET gate is fixed to "EB" to inhibit charging. Charging is possible only when the voltage of both connected batteries goes 0 V charge inhibit voltage 1 and 2 (V0INH1, 2) or more. Note that charging may be possible when the total voltage of both connected batteries is less than the minimum value (VDSOPmin) of the operating voltage between VCC and VSS even if the voltage of either of the connected batteries is the 0 V charge inhibit voltage 1 and 2 (V0INH1, 2) or less. Charging is inhibited when the total voltage of both connected batteries reaches the minimum value (VDSOPmin) of the operating voltage between VCC and VSS. When using this optional function, a resistor of 4.7 M is needed between the gate and the source of the charging control FET (refer to Figure 8). *1. When connecting batteries for the first time, the IC may fail to enter the normal status (is not in the status to charge). If so, once set the VM pin to VSS voltage (short between VM and VSS or connect a charger) to return to the normal status. RE CO *2. In this product with "overcharge detection/release hysteresis", "no final overcharge function", and "0 V battery charge inhibiting function" (indicated in *4, in "2. Product Name List" in " Product Name Structure"), the following action, other products do not have, is seen. But it does not affect on actual use. In the normal status, the battery voltage is the overcharge release voltage (VCD1, 2) or higher, and the overcharge detection voltage (VCU1, 2) or lower but after that, the IC goes in the overcurrent status by connecting an overload. Usually the IC returns to the normal status by detaching the overload, but the charging FET may turn off and the IC may go in the overcharge status. After that, connect the load again to start charging. The FET turns on and the IC returns to the normal status (Refer to "Overcharge status"). NO T *3. Some lithium ion batteries are not recommended to be recharged after having been completely discharged. Please contact battery manufacturer when you select a 0 V battery charging function. 15 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Timing Charts 1. Overcharge Detection VCU Battery VCD voltage VDU VDD VSS VCC DO pin voltage V2 over voltage detect V1 over voltage detect VSS VSS EB VCC VIOV2 VM pin voltage VIOV1 R VSS FO EB Charger connection Load connection Delay Delay <2> MM EN Normal status Over charge status Over discharge status Over current status <1> <2> Delay time 0 <1> DE <1> D Status *1 *1. <1> <2> <3> <4> NO T RE CO Remark The charger is assumed to charge with a constant current. 16 V2 auxiliary over voltage detect NE CO pin voltage V1 auxiliary over voltage detect W VCC DE SI G N V2 battery V1 battery VCUaux Figure 5 <2> Delay time 0 <1> <2> <1> BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 2. Overdischarge Detection V2 battery V1 battery N VCU VDU voltage VDD DE SI G VCD Battery VSS VCC DO pin voltage VSS W Vcc CO pin voltage Vss NE EB VCC VM pin VIOV2 voltage VIOV1 VSS Load connection Delay Delay *1 *1. <1> <2> <3> <4> <3> Normal status Over charge status Over discharge status Over current status <1> <3> <2> & <3> <3> D <1> No Delay DE Status FO R EB Charger connection Figure 6 NO T RE CO MM EN Remark The charger is assumed to charge with a constant current. 17 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 3. Overcurrent Detection V1 V2 battery Battery N VCU VCD DE SI G voltage VDU VDD VCC DO pin voltage VSS W CO pin voltage VCC VSS VM pin voltage VCC NE EB VIOV2 VIOV1 VSS FO R EB Charger connection Load connection delay tIOV1 Status delay tIOV2 *1 Normal status Over charge status Over discharge status Over current status DE *1. <1> <2> <3> <4> <4> <1> <4> D <1> tIOV1 NO T RE CO MM EN Remark The charger is assumed to charge with a constant current. 18 Figure 7 <1> BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Battery Protection IC Connection Example EB N R4 1 k SENS DE SI G R1 1 k VCC Battery 1 C1 0.22 F R2 1 k S-8232 Series VC Battery 2 0.22 F W C2 ICT VSS DO FET1 VM NE CO R5 4.7 M C3 0.22 F R3 1 k EB FO R FET2 Delay time setting Figure 8 Table 8 Constants for External Components Purpose Discharge control Charge control ESD protection For power fluctuation ESD protection For power fluctuation ESD protection C3 Chip capacitor Delay time setting R3 Chip resistor R5 Chip resistor Typ. 1 k 0.22 F 1 k 0.22 F 1 k MM EN CO Protection for charger reverse connection 0 V battery charging inhibition Min. Max. Remark 300 1 k 0 F 1 F 300 1 k 0 F 1 F R1 min. R1 max. Same value as R1 and R2. *1 Attention should be paid to leak 0 F 1 F *2 current of C3. Discharge can't be stopped at less 300 5 k than 300 when a charger is *3 reverse-connected. R5 should be added when the product has 0 V battery charge (1 M) (10 M) inhibition. Lower resistance *4 increases current consumption. D Parts Nch MOS FET Nch MOS FET Chip resistor Chip capacitor Chip resistor Chip capacitor Chip resistor DE Symbol FET1 FET2 R1 C1 R2 C2 R4 0.22 F 1 k (4.7 M) NO T RE *1. R4 R1 is required. Overcharge detection voltage increases by R4. For example 10 k (R4) increases overcharge detection voltage by 20 mV. *2. The overcharge detection delay time (tCU), the overdischarge detection delay time (tCD), and the over current detection delay time (tIOV) change with the external capacitor C3. *3. When the resistor R3 is set less than 300 and a charger is reverse-connected, current which exceeds the power dissipation of the package will flow and the IC may break. But excessive R3 causes increase of overcurrent detection voltage 1 (VIOV1). VIOV1 changes to VIOV1 (R3 RVSM) / RVSM VIOV1. For example, 50 k resistor (R3) increases overcurrent detection voltage 1 (VIOV1) from 0.100 V to 0.113 V. *4. A 4.7 M resistor is needed for R5 to inhibit 0 V battery charging. Current consumption increases when the R5 resistance is below 4.7 M. R5 should be connected when the product has 0 V battery charging inhibition. Caution 1. The above constants may be changed without notice. 2. It has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. In addition, the example of connection shown above and the constant do not guarantee proper operation. Perform thorough evaluation using the actual application to set the constant. 19 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Precautions B attery voltage DE SI G N After the overcurrent detection delay, if either one of battery voltages equals the overdischarge detection voltage (VDD1,2) or lower, the overdischarge detection delay time becomes shorter than 10ms (min.). It occurs because capacitor C3 sets all of delay times (refer to the Figure 9) . The battery voltage is equal to or less the overdischarge voltage (VDD) after stopping the overcurrent. V DD 0 V V CC D O pin voltage V SS Load connect W V CC V IO V 2 V IO V 1 V SS EB The over current delay NE V M pin voltage The delay time becomes shorter than typical The over discharge delay Figure 9 FO R [Cause] When overcurrent detection is released until tIOV1, the capacitor C3 is charged by S-8232 Series. If all battery voltage is lower than VDD1, 2 at that time, charging goes on. So delay time is shorter than typical. DE D [Conclusion] This phenomenon occurs when all battery voltage is nearly equal to the overdischarge voltage (VDD1, 2) after overcurrent detected. It means that the battery capacity is small and those must be charged in the future. Even if the state changes to overdischarge status, the battery package capacity is same as typical. MM EN When one of the battery voltages is overdischarge detection voltage (VDD1, 2) or lower and the other one becomes higher than the overcharge detection voltage (VCU1, 2), the IC detects the overcharge without the overcharge detection delay time (tCU) (refer to the Figure 10) . V CU B attery voltage V1 V CD V DU Overcharge detect Overdischarge state V DD V CU RE CO B attery voltage V2 V CD V DU V DD V CC C O pin voltage V SS EB D elay tim e 0 NO T Charger connected Figure 10 [Cause] It is same as the overdischarge detection under the overcurrent status. It occurs because capacitor C3 sets all of delay times. [Conclusion] This phenomenon occurs when one battery voltage is lower than overdischarge voltage (VDD1, 2) and batteries are charged by charger. Since voltage difference between two batteries is large in this situation, the S-8232 Series immediately stops the charging of the other battery to reduce voltage difference. This action improves the safety of a battery pack and dose not do any harm to the pack. 20 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 DE SI G N After the overcurrent detection, the load was connected for a long time, even if one of the battery voltage became lower than overdischarge detection voltage (VDD1, 2), the IC can't detects the overdischarge as long as the load is connected. Therefore the IC's current consumption at the one of the battery voltage is lower than the overdischarge detection voltage is same as normal status current consumption (IOPE) (refer to the Figure 11). The battery voltage is less than the overdischarge detection voltage, by self current consum ption B attery voltage VDD C urrent consum ption IO P E 0 V A s long as the load is connected, the IC 's current is sam e as norm al current consum ption (I O P E ) W IP D N 0 A VCC D O pin voltage V CC V IO V 2 V IO V 1 V SS E B Load connect R V M pin voltage NE V SS The over current delay FO Long haul load connected Figure 11 DE D [Cause] The reason is as follows. If the overcurrent detection and overdischarge detection occur at same time, the overcurrent detection takes precedence the overdischarge detection. As long as the IC detects overcurrent, the IC can't detect overdischarge. MM EN [Conclusion] If the load is taken off at least one time, the overcurrent is released and the overdischarge detection works. Unless keeping the IC with load for a long time, the reduction of battery voltage will be neglected, because of the IC's current consumption (typ. 7.5 A) is small. Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. NO T RE CO ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement of the products including this IC upon patents owned by a third party. 21 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 Characteristics (Typical Data) 1. Detection Voltage Temperature Characteristics -20 0 20 40 60 80 4.2 -40 100 DE SI G -20 0 NE Ta [C] Overcharge release voltage1 vs. temperature 20 40 60 80 100 Ta [C] Overcharge release voltage2 vs. temperature VCD1 4.00 V VCD2 4.00 V 4.1 VCD2 [V] FO -20 0 20 40 60 Auxiliary overcharge detection voltage1 vs. temperature VCUaux1 5.375 V 5.35 -20 0 20 RE 5.25 -40 CO VCUaux1 [V] 5.45 40 NO T Ta [C] 22 60 80 100 4 3.9 -40 100 MM EN Ta [C] 80 -20 0 20 40 60 80 100 Ta [C] Auxiliary overcharge detection voltage2 vs. temperature VCUaux2 5.375 V 5.45 VCUaux2 [V] 3.9 -40 D 4 DE VCD1 [V] R 4.1 4.3 W 4.3 4.2 -40 VCU2 4.30 V 4.4 VCU2 [V] 4.4 VCU1 [V] Overcharge detection voltage2 vs. temperature VCU1 4.30 V N Overcharge detection voltage1 vs. temperature 5.35 5.25 -40 -20 0 20 40 Ta [C] 60 80 100 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S-8232 Series Rev6.2_01 Overdischarge detection voltage1 vs. temperature Overdischarge detection voltage2 vs. temperature VDD1 2.00 V VDD2 2.00 V 2.1 2 1.9 -40 DE SI G VDD2 [V] VDD1 [V] N 2.1 2 1.9 -20 0 20 40 60 80 100 -40 -20 0 100 NE VDU2 2.60 V R VDU2 [V] 2.7 2.6 FO 2.6 2.5 -20 0 20 40 60 80 100 DE Ta [C] Overcurrent1 detection voltage vs. temperature 0 20 40 CO -20 MM EN 0.10 0 20 60 80 100 40 60 80 100 Overcurrent1 detection voltage vs. temperature VIOV2 1.20 V (VCC reference) -1.10 -1.15 -1.20 -1.25 -1.30 -40 -20 0 20 40 60 80 100 Ta [C] NO T RE Ta [C] -20 Ta [C] VIOV1 0.1 V 0.12 0.08 -40 -40 D -40 VIOV2 [V] VDU1 [V] 80 Overdischarge release voltage1 vs. temperature VDU1 2.60 V 2.5 VIOV1 [V] 60 Ta [C] Overdischarge release voltage1 vs. temperature 2.7 40 W Ta [C] 20 23 BATTERY PROTECTION IC FOR 2-SERIAL-CELL PACK S8232 Series Rev.6.2_01 2. Current Consumption Temperature Characteristics Current consumption vs. temperature in normal mode N 15 VCC 3.0 V 10 5 -20 0 20 40 60 80 100 50 0 Ta [C] -40 -20 0 20 W 0 -40 DE SI G 100 IPDN [nA] IOPE [A] Current consumption vs. temperature in power-down mode VCC 7.2 V 40 60 80 100 NE Ta [C] 3. Delay Time Temperature Characteristics Overcharge detection1 time vs. temperature C3 0.22 F 150 TDD [ms] FO R 1.5 D 1 0.5 -40 -20 0 20 40 DE tCU [s] Overcharge detection1 time vs. temperature C3 0.22 F 60 80 50 -40 -20 0 20 40 Ta [C] MM EN Ta [C] 100 100 Overcurrent1 detection time vs. temperature C3 0.22 F 12 10 9 8 7 -20 0 RE -40 CO tIOV1 [ms] 11 20 40 60 80 100 NO T Ta [C] Caution Please design all applications of the S-8232 Series with safety in mind. 24 60 80 100 +0.3 5 1 4 NE W DE SI G 8 N 3.00 -0.2 DE D FO R 0.170.05 MM EN 0.20.1 CO 0.65 NO T RE No. FT008-A-P-SD-1.2 TITLE TSSOP8-E-PKG Dimensions No. FT008-A-P-SD-1.2 ANGLE UNIT mm ABLIC Inc. 4.00.1 2.00.05 o1.550.05 DE SI G N 0.30.05 +0.1 8.00.1 NE W o1.55 -0.05 FO R (4.4) +0.4 MM EN DE D 6.6 -0.2 8 1 4 Feed direction NO T RE CO 5 No. FT008-E-C-SD-1.0 TITLE TSSOP8-E-Carrier Tape FT008-E-C-SD-1.0 No. ANGLE UNIT mm ABLIC Inc. N DE SI G W NE R FO D 20.5 o130.5 CO MM EN o210.8 17.51.0 DE Enlarged drawing in the central part 13.41.0 NO T RE No. FT008-E-R-SD-1.0 TITLE TSSOP8-E-Reel No. FT008-E-R-SD-1.0 QTY. ANGLE UNIT mm ABLIC Inc. 3,000 Disclaimers (Handling Precautions) All the information described herein (product data, specifications, figures, tables, programs, algorithms and application circuit examples, etc.) is current as of publishing date of this document and is subject to change without notice. 2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of any specific mass-production design. ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use of the information described herein. 3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein. 4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings, operation voltage range and electrical characteristics, etc. ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the products outside their specified ranges. 5. When using the products, confirm their applications, and the laws and regulations of the region or country where they are used and verify suitability, safety and other factors for the intended use. 6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related laws, and follow the required procedures. 7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use. 8. The products are not designed to be used as part of any device or equipment that may affect the human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc. Especially, the products cannot be used for life support devices, devices implanted in the human body and devices that directly affect human life, etc. Prior consultation with our sales office is required when considering the above uses. ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products. 9. Semiconductor products may fail or malfunction with some probability. The user of the products should therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction. The entire system must be sufficiently evaluated and applied on customer's own responsibility. MM EN DE D FO R NE W DE SI G N 1. 10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the product design by the customer depending on the intended use. CO 11. The products do not affect human health under normal use. However, they contain chemical substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be careful when handling these with the bare hands to prevent injuries, etc. 12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used. RE 13. The information described herein contains copyright information and know-how of ABLIC Inc. The information described herein does not convey any license under any intellectual property rights or any other rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this document described herein for the purpose of disclosing it to a third-party without the express permission of ABLIC Inc. is strictly prohibited. NO T 14. For more details on the information described herein, contact our sales office. 2.0-2018.01 www.ablicinc.com