Order this dsta sheet by 6226/D MOTOROLA SEMICONDUCTOR . TECHNICAL Advance DATA II Information II Militarv* 6226 128K x 8 Bit Static Random Access Memory The 6226 is a 1,048,576 bit static random access memory organized as 131,072 words of 8 bits, fabricated using high petiormance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes, while CMOS circuitry reduces power consumption and provides for greater reliability. The 6226 is equipped'with both chip enable(E) and output enable(G) inputs, allowing forgreatersystem flexibility. Either input, when high, will force theoutputsto high impedante. The 6226 is available in a 600 roil, 32 lead ceramic DIL and in a 550 x 850 roil, 32 lead surface-mount LCC package. Single 5.0 V * 10/0 Power Supply Full Access Time -- 35 ns Max. Equal Address and Chip Enable Access Time Three State Outputs Fully TTL Compatible Low Power Dissipation: 150/1 40/1 30 mA Maximum, Active AC 35ns=150mA ~p~,p' ///~&g$ . . ~R&a y c \ , ,,s@$ti~LABLE I1 AS c ;: ;~;k~ CASE OUTLINE AS FOLLOWS: ~a'~: `~@ACKAGE: DIL: X ~~~1~", LCC: U -~ \*> .,:, ~(l,i :,i~ ,: ,,r,l~~ .*.*.!: `~'y XX= Speed inns (35, 45, 55) ,,$l,! $:,. The letter "M" appears afier the ,$.~:.ctx:i speed on LCC .':...,i,. ,,,,>:,..,, ~,,. ,,` ~'. ?L*,I, Y -. This document contains information I on a new product. Specifications and information herein are subje~ to change without w notice. m @ MOTOROLA INC., 1990 m MOTOROLA W ADI1760 PIN ASSIGNMENTS BURN-IN CONDITIONS: Burn-In Vcc = 5.0 V(min)/ 6.0 V(max), R1 = 39.2 ~ vH = 3.0 v(min)/5.O v(m~), CP1 : 100 kHz CP6: + 207., Cl = 0.1 yF i 207., CPI1: 97.66 HZ CP16: LCC DIL N.C. 3.052 HZ Al 6 2 2 CP2 CP3 CP2: 50 kHz CP7: 1.563 kHz CP12: 48.83 HZ CP17: 1.526 HZ A14 3 3 CP3: 25 kHz CP8: 0.781 kHz CP13: 24.41 HZ CP18: 0.763 HZ Al 2 4 4 CP4: 12.5 kHz CP9: 0.391 kHz CP14: 12.21 HZ CP19: 0.382 HZ A7 5 5 CP5: 6.25 kHz CP1O: 0.195 kHz CP15: 6.104 HZ CP20: 0.191 HZ A6 6 6 ,,e>t,;::@+6 ,,,, A5 7 7,$$ A4 8 A3 9 PIN NAME and FUNCTIONS Ao- Aj6 w ~, E G DQO - DQ7 Vcc Vss NC. Address Inputs Write Enable Chip Enable Output Enable Data lnpuVOutput + 5.0 V Power Supply Ground No Connection A2 Al A. ,~.o + :.;::;$ ` CP7 ,~.:p ,,::&>{@$ ,: , ` :\;>..:, CP8 "~pg.y CP9 t. 10 1&%$ ,,,,,,$ .~,:$\+. ,1 ~v~+ ..~ ~,q; ~~$$ 12 w $;. I CP1O CP1l CP12 14 13 ,4 CP20 to R1 15 15 CP20 to R1 13 CP20 to R1 16 16 GND DQ3 17 17 CP20 to R1 This device contains circuitry to protect the inputs against darn~~g,~ DQ4 18 18 CP21 to R1 due to high static voltages or electric fields; however, it is ady~~~,:-' that normal precautions be taken to avoid application of any ~~~es higher than maximum rated voltages to this high-imped,ancq.circuit. DQ5 19 19 CP21 to R1 DQ6 20 20 CP21 to R1 DQ7 21 21 CP21 to R1 E 22 22 GND Al o 23 23 CP18 G 24 24 CP19 Al 3 28 28 CP14 w 29 29 CP1 \.* ..:,.~ ):."~.T\., >..14 +:{*, \ .::,. . ,, MOTOROLA 2 - (Condition-D) IN.C.11111 vL = - 0.5 v(min)/O.O v(maX), 3.125 kHz Function E 30 30 HIGH Al 5 31 31 CP13 Vcc 32 32 Vcc, Cl to GND 6226 TRUTH TABLE E G w Mode VCC Current 1/0 Pin Cycle H x x Not Selected tSBl , 1SB2 High Z -- L H H Read tCCA High Z -- L L H Read lCCA DOUT Read Cycle L x L Write iCCA DIN Write Cycle X = Don't Care ABSOLUTE MAXIMUM Rating Power Supply Voltage Voltage Relative to Vss for Any Pin Except VCC - 0.5 to + 7.0 Tbias Under Bias (TA = 25C) Range Operating Temperature Tstg Range TAP .,f "$'$:.$ :> :,,:' - 0.5 to Vcc + 5<@% "*' v , ..:.$. ,.:,i,,~,, +20,,$*~i<:;$\ " mA .,. ,,, -:,$,> ,l!.", **pt$&5,*s~ w - ~~~~$$25 ,,F ,;,,., ~.:. +${:.$= to +150 , ,:.+ .?,> ;`.'!..:,,. .,. > ;%,;(' -55to+125 \ `c `c `c device damage may occur if ABSOLUTE MAXIMUM RATINGS,@re e~$~eded. Fundional operation should be reatri~ed OPERATING CONDITIONS, Exposure to higher than recom~~dad volkges fOr extended petiods Of time could affeCt .,, ~*!.,\ ~t\*.., `.:,:. ."$:?.,$.+. # ,..., /, ,x+>:.. -ii~l., .. ,, ....),,.? DC OPERATING (Vcc RECOMMENDED 6226 Vcc pD Storage Temperature device reliability. Value IOUT Power Dissipation NOTE: Permanent RECOMMENDED Symbol V[N, VOUT Output Current Temperature .:}? ,":?~,.. ~~, .,~~:.+: :r ,,:,:, >% >~$~t'"8,: $ .,:, RATINGS (See Note) CONDITI*AND = 5.0 V *1 07., TA = -55$ ~~>.:.$' OPERATING to CHARACTERISTICS to+l 25C, Unless Othemise Noted) Qti~&TIONS MOTOROLA 3 I I DC CHARACTERISTICS I Parameter I Symbol 1 Min I Typ I Max I Unit -- Input Leakage Current (All Inputs, ~n = O to VCC) Ilkg(l) -- -- t5.o WA Output Leakage Current (~= VIH, VOUT = O to Vcc) llkg(0) -- -- f5.o PA ICCA ICCA iCCA -- -- -- -- -- -- 150 140 130 mA ISBI -- 30 40 1SB2 -- 20 Output Low Voltage (IOL = 8.0 mA) VOL -- -- Output High Voltage (IOH = - 4.0 mA) VOH 2,4 -- AC Supply Current ([OUT= O mA) 6226-35: tAvAv = 35 ns 6226-45: tAvAv = 45 ns 6226-55: tAvAv = 55 ns TTL Standby Current (~ = VIH, No Restrictions on Other Inputs) CMOS Standby Current (~ 2 VCC - 2.0 V, No Restrictions I on Other Inputs) #* ,,.g, T 30 \.,y$;$~:,fmA ,,*:,t ->.} , <$,*f:) "" v <:$,`>.<,+ ,1-. - ., `*S v Characteristic Input Capacitance All Inputs Except ~, E and DQ ~, E l/O Capacitance DQ .- MOTOROLA 4 6226 AC OPERATING CONDITIONS AND CHARACTERISTICS (VCC = 5,0 V * 10Y.,TA=-55Cto+125"C, Y Input Timing Measurement Reference Level Input Pulse levels Input Rise/Falls Time Output Timing Measurement Reference Level Output Load Unless Othemise Noted) 1.5V o to 3.0 v >5.0 ns 1.5V See Figure 1A ,:~4' ,.."*+3:, READ CYCLE ` -:]: ~>. ", ,,~ ,~ft~;. ".~:-t~i? .,:$" (See Note 1) Parameter Symbol Alternate Min Max Min Max tAVAV tRC 35 -- 45 -- Read Cycle Time Address Access Time tAVQV Enable Access Time tELQV Output Enable Access Time tGLQV Output Hold from Address Change tAXQX 45 ns 4*": .+$; 55 ns -- toE -- 15 -- ,~~~<;f F-- 20 ns _ toH 5.0 -- -- ns -- 5.0 -- ns 3,4,5 _ 20 Output Enable to Output Active tGLQX t~ tELiCCH Power Down Time tEH[CCL 5,0 -- ~ *Y -- : lg p~ tpu :?'$: *: :~~ti& tPQ...,, "%,. "" - from the last valid address to the first transitio~g 35 ,5 5.0 ns 3,4,5 -- o -- ns 3,4,5 20 ns o 15 0 0 _ o _ ns 5 -- 45 -- 55 ns 5 3,4,5 tE~~~ max is Ieaa than tE~~~ ad~ess. rein, and$wi x max is less than t~~~~ .,, %3 Transition is meaaured +500 mV from steady-state voltage with load of ~~{re'+q<. . i+i.~: *:+> These parameter are periodically sampled and not 100Y. tested, ~~. `+:;:+ \>.;i.*'.,<:, -,, Oevice is continuously selected (= = YL, E = VIH, ~ = VIL). ~,..~,,k.!s. Address valid prior to coincident with E going low/E going high. ~~, .%, p" ,.+ .>., $>y 6226 `"*$,3. ,2 t, .'T:> `"<`??'o o tHz 5.0 " g:~~ -- .,., , . ....t.* *C,:,> ~.,.. 3, A any given voltage and temperature, 7. -- -- tLz 1. ~ is high for read qcle, 5. 35 35 tHz 2. All read cycle timing is referen~d 6, -- -- tELQX NOTES: 4, tAA tEHQz Power Up Time 2 tACS `.$gg,?,- -- Notes -- Enable High to Output High-Z tGLQz 6226-55 ; ~;;F$p Min &.,\ ~.l%f :$ Unit . . . 1. 55 +; :W' n~ -- +~ .,k ~::., `-k55 *:,.,>,,,, Enable Low to Output Active Output Enable to Output High-Z Y 6226-45 6226-35 Symbol Standard rein, both for a given device and from device to device, MOTOROLA 5 WRITE CYCLE 1 (W Controlled, See Note 1) 6226-45 6226-35 6226-55 Symbol Standard Symbol Alternate Write Cycle Time tAVAV twc 35 -- 45 -- Address Setup Time tAVWL tAS o -- o -- Address Valid to End of Write tAVWH tAW 20 -- 20 -- Parameter Min Max Min Min Max Max Unit Notes 55 -- ns 2 o -- ns -- 30 -- ns -- `.3,L ns i "?>+<:: *>.:,> Y naP ,,$*:,,$:$:,f `w$- Write Pulse Width tWLWH twp 20 -- 20 -- 30 -- Data Valid to End of Write tDVWH tDW 15 -- 15 -- 20 -- Data Hold Time tWHDx tDH o -- o -- o -- Write Low to Data High-Z twLQz twz o 15 0 15 0 2Q$ , :`~';;t$ Write High to Output Active twHQx tow o -- o -- Write Recovery Time tWHAx tWR o -- o -- t5.ov ,:;,,,$b>"'" `- -- ~"~.,>~~ ,,, ,,tfi:\~3.., ..~}' ns . \ ..,,, >.. o Q ` ~'i>g ... ). ns 4,5,6 4, 5,6 -- t5,0 v 480Q 480 Q 5 pF (INCLUDING SCOPE AND JIG) = Figure MOTOROLA 6 1 B. 6226 -- WRITE CYCLE 2 (~ Controlled) 6226 MOTOROLA 9 READ CYCLE 1 (See Note 6 above) * tAvAv 4 A (ADDRESS) * Q (DATA OUT) tAvQx PREVIOUS DATA VALID $~.r< !,. <* f,. * DATA VALID ,. ,+ $4*$$ ` .. ...'s A (ADDRESS) ~ (CHIP ENABLE) ~ (OUTPUT ENABLE) Q (DATA OUT) 6226 MOTOROLA 8 I WRITE CYCLE 2 (E Controlled, See Note 1) I Symbol 6226-35 6226-45 6226-55 Standard Symbol Alternate Min Write Cycle Time tAVAV twc 35 45 Address Setup Tme tAVEL tAS o 0 Address Valid to End of Write tAVEH tAw 20 25 Enable to End of Write tELEH tcw 20 25 30 Write Pulse Width twLEH twp 20 25 30 ns,4:$:+&:@, 4 ,.. ,L {$s::$ $ * ." ~>, "~:::::G ,* .,.. *I ,,>;?,$., .,.:**..ns .)* ,;,, T Parameter Max Min Max Min Unit Notes 55 ns 2 0 ns 30 ns Data Valid to End of Write tDVEH tDw 15 15 20 Data Hold Time tEHDx tDH o 0 0 Write Recovery Time tEHAx twR o 0 to the fhat transitioning address. NOTES: 1. A wtite occurs duting the overlap of= 2. All wtite cycle timing is referenced 3. If ~ goes low coincident IOWIE high and ~ low. from the last valid address with or after ~ goes low, the output will remain in a high impedance 4. If ~ goes high coincident with or after W goes high, the output will ramain in a high impedance condition. mndtion. Max . .,. .:J:. `~\~i\ ,\?y,,,t, . .. k,.' `*s:~$, ~,~<, ~,<. ~?., ,4,... \\.. .,,,?` ,.$>,-,.~!:;. ... ~,,*:.,.l . ~8J .&,,x.<..1> ,i?~.:' -,.< **, ;;~~,lly,,.]h$> ..!l%-.,*,, ,, A (ADDRESS) ~ (CHIP ENABLE) ~ (WRITE ENABLE) D (DATAIN) Q (DATAOUT) \...t$t, t*\+\+ $, <$ ~,, ~.,>..:,! .~,> ~ ,,,>,,, ...... `:~:$k ~:4, .*$i\>1. .,.~~+,:>. *,.s:+"if:\i , TIMING~\M#~ T~$& of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from t&~~Wnal system point of view. Thus, address setup time is shown as a minimum since the system must supply at least that much tifi~~$ven though most devices do not require it). On the other hand, responses from the memory are specified from the device point of Jew. Thus, the access time is shown as a maximum since the device never provides data later than that time. 6226 MOTOROLA 7 -- -. Motorol~res~8b the right to make changes without further notice to any products herein to improve reliability, function or design. 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