CPC1218 Voltage-Controlled, Single-Pole, Normally Open, 4-Pin SIP OptoMOS(R) Relay Blocking Voltage Load Current Max RON Input Voltage to operate CPC1218 60 600 1.1 5-12 Description Units VP mA V Features * Voltage-Controlled Operation * Designed for use in Security Systems Complying with EN50130-4 * 2500Vrms Input/Output Isolation * 100% Solid State * Matches Popular Reed Relay Pin-Out * Small 4-Pin SIP Package * TTL/CMOS Compatible Input * Arc-Free With No Snubbing Circuits * No EMI/RFI Generation * Immune to Radiated EM Fields * Auto Pick & Place, Wave Solderable The CPC1218 is a miniature voltage-controlled, singlepole, normally open (1-Form-A) Solid State Relay in a 4-pin Single In-line Package (SIP) that employs optically coupled MOSFET technology to provide 2500Vrms of input to output isolation. The super efficient MOSFET switches and photovoltaic die use Clare's patented OptoMOS architecture. The optically-coupled output is controlled by the input's highly efficient GaAlAs infrared LED with a built-in series resistor to provide input voltage-controlled operation. Featuring a pin-out that matches many popular reed relays, CPC1218 is a "drop-in" solid state replacement. Because the input is solid state there is no need for snubbers or "catch" diodes to suppress the inductive fly-back transient voltage normally associated with EMR coils. Approvals * UL 508 Approved Component: File E69938 * CSA Certified Component: Certificate 1172007 Applications * Security * Passive Infrared Detectors (PIR) * Data Signalling * Sensor Circuitry * Instrumentation * Multiplexers * Data Acquisition * Electronic Switching * I/O Subsystems * Energy Meters * Medical Equipment--Patient/Equipment Isolation * Aerospace * Industrial Controls Ordering Information Part # CPC1218Y Description 4-Pin SIP (8-Pin Body) (25/tube) Pin Configuration CPC1218 Pinout 1 2 + 3 - 4 Switching Characteristics of Normally Open Devices Form-A IF 90% 10% ILOAD ton Pb RoHS 2002/95/EC DS-CPC1218-R05 toff e3 www.clare.com 1 CPC1218 Absolute Maximum Ratings @ 25C Parameter Blocking Voltage Reverse Input Voltage Input Control Voltage Input Power Dissipation Total Power Dissipation 1 Isolation Voltage, Input to Output Operational Temperature Storage Temperature 1 Ratings 60 5 15 225 800 2500 -40 to +85 -40 to +125 Units VP V V mW mW Vrms C C Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. Derate linearly 6.67 mW / C Electrical Characteristics @ 25C Parameter Output Characteristics Load Current Continuous 1 Peak On-Resistance 2 Off-State Leakage Current Switching Speeds Turn-On Turn-Off Output Capacitance Input Characteristics Input Control Voltage (must operate) Off Voltage (must be off) Reverse Input Current Input Resistor Common Characteristics Capacitance, Input to Output 1 2 2 Conditions Symbol Min Typ Max Units VIN=5V t=10ms IL=600mA VL=60VP IL ILPK RON ILEAK - - 600 1 1.1 1 mA A VL=50V, f=1MHz ton toff COUT - 25 5 5 - IL=600mA VR=5V - VOP VOFF IR - 1 900 1000 3.75 10 1100 V V A - - - 1 - pF VIN=5V, VL=10V A ms pF Load current derates linearly from 600mA @ 25oC to 480mA @80oC. Measurement taken within 1 second of on-time. www.clare.com R05 CPC1218 PERFORMANCE DATA* Typical Turn-On Time (N=50, VIN=5V, IL=100mA, TA=25C) 25 15 10 5 0 0.51 10 5 0.53 Device Count (N) 15 10 5 0.20 0.21 0.22 0.23 Turn-Off (ms) 0.24 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1.55 1.6 1.65 1.7 1.75 Typical VIN for Switch Dropout (N=50, IL=100mA, TA=25C) 35 0.58 0.60 0.62 0.64 0.66 Typical Blocking Voltage Distribution (N=50, TA=25C) 30 20 15 10 5 25 20 15 10 5 0 1.5 1.8 1.55 1.6 1.65 1.7 1.75 1.8 63.5 64.0 64.5 65.0 65.5 66.0 66.5 Input Voltage (V) Input Voltage (V) Blocking Voltage (VP) Typical Turn-On vs. VIN (IL=100mA) Typical VIN for Switch Operation vs. Temperature (IL=100mA) Typical Turn-On vs. Temperature (IL=100mA) 1.45 Turn-On (ms) VIN (V) 1.30 1.25 1.20 1.15 0 5 10 VIN (V) 15 20 -40 Typical Turn-Off vs. VIN (IL=100mA) -20 0 60 20 40 Temperature (C) 80 Turn-Off (ms) VIN (V) 0.3 1.30 1.25 0.2 1.20 0.1 0 1.15 4 6 8 10 VIN (V) 12 14 16 18 20 -40 -20 0 20 40 60 Temperature (C) VIN = 10V -20 0 20 40 60 80 100 Temperature (C) 1.35 0.4 VIN = 5V -40 1.40 0.5 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 100 Typical VIN for Switch Dropout vs. Temperature (IL=100mA) 1.45 0.6 2 0.56 On-Resistance () 1.35 0 10 0.54 1.40 0.7 15 0.25 0 1.5 20 0 25 20 25 5 0.19 0 Turn-On (ms) 15 Device Count (N) 0.45 0.47 0.49 Turn-On (ms) Typical VIN for Switch Operation (N=50, IL=100mA, TA=25C) 25 Device Count (N) 0.43 Typical On-Resistance Distribution (N=50, VIN=5V, IL=100mA, TA=25C) 30 20 0 0.41 Turn-Off (ms) 35 Device Count (N) 20 Device Count (N) Device Count (N) 25 Typical Turn-Off Time (N=50, VIN=5V, IL=100mA, TA=25C) 80 100 Typical Turn-Off vs. Temperature (IL=100mA) 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 VIN = 10V VIN = 5V -40 -20 0 20 40 60 80 100 Temperature (C) *The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifications, please contact our application department. R05 www.clare.com 3 CPC1218 PERFORMANCE DATA* Typical Maximum Load Current vs. Temperature 0.80 Steady State 0.7 VIN = 10V 0.6 0.5 Load Current (A) 0.8 0.75 400 200 0 -200 -400 -600 -0.3 0.3 -40 -20 0 20 40 60 Temperature (C) 80 100 Typical Blocking Voltage vs. Temperature 72 0.016 70 0.014 Leakage (A) 68 66 64 62 -0.1 0 0.1 Load Voltage (V) 0.2 -40 -20 0 20 40 60 Temperature (C) 80 100 Typical Leakage vs. Temperature Measured Across Pins 1&4 (VL=Max Rated) 0.55 VIN =10V 0.50 0.45 VIN =5V 0.010 0.008 0.006 -20 0 20 40 60 Temperature (C) 80 -20 0 20 40 60 80 Temperature (C) 100 120 Energy Rating Curve 0.012 0 -40 0.60 -40 0.3 0.002 58 0.65 0.35 -0.2 0.004 60 0.70 0.40 Load Current (A) On-Resistance () 600 0.4 Blocking Voltage (VP) Typical Load Current vs. Load Voltage (VIN=5V, TA=25C) VIN = 5V 0.9 Load Current (mA) 1.0 Typical On-Resistance vs. Temperature (IL=Max Rated @ Temperature) 100 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 10s 100s 1ms 10ms 100ms 1s 10s 100s Time *The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifications, please contact our application department. 4 www.clare.com R05 CPC1218 Manufacturing Information Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. Clare classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device Moisture Sensitivity Level (MSL) Rating CPC1218Y MSL 1 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. Reflow Profile This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020 must be observed. Device Maximum Temperature x Time CPC1218Y 245C for 30 seconds Board Wash Clare recommends the use of no-clean flux formulations. However, board washing to remove flux residue is acceptable. Since Clare employs the use of silicone coating as an optical waveguide in many of its optically isolated products, the use of a short drying bake could be necessary if a wash is used after solder reflow processes. Chlorine- or Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be used. Pb R05 RoHS 2002/95/EC e3 www.clare.com 5 CPC1218 MECHANICAL DIMENSIONS CPC1218Y 6.401 0.127 (0.252 0.005) 19.202 0.381 (0.756 0.015) PCB Hole Pattern 3.302 0.051 (0.130 0.002) 5.08 (0.200) 2.642 0.127 (0.104 0.005) 10.16 (0.400) 15.24 (0.600) 5.944 0.127 (0.234 0.005) FINISHED HOLE 0.80 DIA x4 (0.031 DIA x4) 1.30 (0.051) Pin 1 0.457 0.076 (0.018 0.003) 5.080 0.127 (0.200 0.005) Pin 4 3.251 0.102 (0.128 0.004) 5.080 0.127 (0.200 0.005) 0.254 0.013 (0.010 0.0005) DIMENSIONS mm (inches) For additional information please visit our website at: www.clare.com Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in Clare's Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of Clare's product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-CPC1218-R05 (c)Copyright 2010, Clare, Inc. OptoMOS(R) is a registered trademark of Clare, Inc. All rights reserved. Printed in USA. 10/18/2010 6