OPA2673IRGVRG4 - Texas Instruments

OPA2673

348W

2kW

2kW1mF

50W

511W

1/2

OPA2673

1/2

OPA2673

+12V

1:1.4

8VPP

+6.0V

2VPP

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

Dual, Wideband, High Output Current

Operational Amplifier with Active Off-Line Control

Check for Samples: OPA2673

1FEATURES DESCRIPTION

2• WIDEBAND +12V OPERATION: The OPA2673 provides the high output current and

340MHz (G = +4V/V) low distortion required in emerging Power Line

Modem driver applications. Operating on a single

• UNITY-GAIN STABLE: 600MHz (G = +1) +12V supply, the OPA2673 consumes a low 16mA/ch

• HIGH OUTPUT CURRENT: 700mA quiescent current to deliver a very high 700mA output

• OUTPUT VOLTAGE SWING: 9.8VPP current. This output current supports even the most

demanding Power Line Modem requirements with

• HIGH SLEW RATE: 3000V/msgreater than 460mA minimum output current (+25°C

• LOW SUPPLY CURRENT: 16mA/ch minimum value) with low harmonic distortion.

• OVERTEMPERATURE PROTECTION CIRCUIT Power control features are included to allow system

• FLEXIBLE POWER CONTROL power consumption to be minimized. Two logic

• OUTPUT CURRENT LIMIT (±800mA) control lines allow four quiescent power settings: full

power, 75% bias power in applications that are less

• ACTIVE OFF-LINE FOR TDMA demanding, 50% bias power cutback for short loops,

and offline with active offline control to present a high

APPLICATIONS impedance even with large signals present at the

• POWER LINE MODEMS output pin.

• MATCHED I/Q CHANNEL AMPLIFIERS Specified on ±6V supplies (to support +12V

• BROADBAND VIDEO LINE DRIVERS operation), the OPA2673 also supports up to +13V

• ARB LINE DRIVERS single or ±6.5V dual supplies. Video applications

• HIGH CAP LOAD DRIVERS benefit from a very high output current to drive up to

10 parallel video loads (15Ω) with < 0.1%/0.1° dG/dΦ

RELATED PRODUCTS nonlinearity.

SINGLES DUALS TRIPLES NOTES

Single +12V

OPA691 OPA2691 OPA3691 Capable

—THS6042 — ±15V Capable

Single +12V

—OPA2677 —Capable

—OPA2674 — Single +12V

Capable,

Output Current

Limit

space

Single-Supply Line Driver

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

NC(1)

-INA

+INA

GND

NC(1)

-INB

+INB

OUTA

NC(1)

+VS

OUTB

NC(1)

-VS

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE/ORDERING INFORMATION(1)

SPECIFIED

PACKAGE- PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT MEDIA,

PRODUCT LEAD DESIGNATOR RANGE MARKING NUMBER QUANTITY

OPA2673IRGVT Tape and Reel, 250

OPA2673 QFN-16 RGV –40°C to +85°C OPA2673 OPA2673IRGVR Tape and Reel, 2500

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

ABSOLUTE MAXIMUM RATINGS(1)

Over operating free-air temperature range (unless otherwise noted).

PARAMETER OPA2673 UNIT

Power supply ±6.5 VDC

Internal power dissipation See Thermal Characteristics

Differential input voltage ±2 V

Input common-mode voltage range ±VSV

Storage temperature range: RGV package –65 to +125 °C

Junction temperature, TJ+150 °C

Continuous operating junction temperature +139 °C

Human body model (HBM) 2000 V

ESD Charge device model (CDM) 1500 V

rating: Machine model (MM) 200 V

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to

absolute-maximum-rated conditions for extended periods may affect device reliability.

PIN CONFIGURATION

RGV PACKAGE

QFN-16

(TOP VIEW)

Product Folder Link(s): OPA2673

OPA2673

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SBOS382F –JUNE 2008–REVISED MAY 2010

ELECTRICAL CHARACTERISTICS: VS= ±6V

At TA= +25°C, A0 = A1 = 0 (full power), G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise noted. See Figure 76 for ac

performance only. Single channel specifications, except where noted. OPA2673IRGV

MIN/MAX OVER

TYP TEMPERATURE

0°C to –40°C to MIN/ TEST

PARAMETER CONDITIONS +25°C +25°C(2) 70°C(3) +85°C(3) UNIT MAX LEVEL(1)

AC PERFORMANCE

Small-signal bandwidth G = +1V/V, RF= 511Ω, VO= 500mVPP 600 MHz typ C

G = +2V/V, RF= 475Ω, VO= 500mVPP 450 MHz typ C

G = +4V/V, RF= 402Ω, VO= 500mVPP 340 270 265 260 MHz min B

G = +8V/V, RF= 250Ω, VO= 500mVPP 360 270 265 260 MHz min B

Peaking at a gain of +1V/V G = +1V/V, RF= 511Ω2 dB typ C

Bandwidth for 0.1dB flatness G = +4V/V, VO= 500mVPP 50 MHz typ C

Large-signal bandwidth G = +4V/V, VO= 5VPP 300 MHz typ C

Slew rate G = +4V/V, 5V step 3000 2600 2400 2300 V/ms min B

Rise-and-fall time G = +4V/V, 2V step 1.2 ns typ C

Harmonic distortion G = +4V/V, VO= 2VPP, 10MHz,

RL= 50Ω

2nd harmonic A1 = 0, A0 = 0, full bias –67 –61 –60 –59 dBc max B

A1 = 0, A0 = 1, 75% bias –70 –60 –59 –58 dBc max B

A1 = 1, A0 = 0, 50% bias –69 dBc typ C

3rd harmonic A1 = 0, A0 = 0, full bias –80 –73 –72 –70 dBc max B

A1 = 0, A0 = 1, 75% bias –75 –68 –67 –66 dBc max B

A1 = 1, A0 = 0, 50% bias –68 dBc typ C

G = +4V/V, VO= 2VPP, 20MHz,

RL= 50Ω

2nd harmonic A1 = 0, A0 = 0, full bias -68 –62 –61 –60 dBc max B

A1 = 0, A0 = 1, 75% bias -67 –60 –59 –58 dBc max B

A1 = 1, A0 = 0, 50% bias -65 dBc typ C

3rd harmonic A1 = 0, A0 = 0, full bias -72 –63 –62 –61 dBc max B

A1 = 0, A0 = 1, 75% bias -66 –60 –53 –58 dBc max B

A1 = 1, A0 = 0, 50% bias -60 dBc typ C

Input voltage noise f > 1MHz 2.4 2.8 3.2 3.6 nV/√Hz max B

Noninverting input current noise f > 1MHz 5.2 5.8 5.3 6.0 pA/√Hz max B

Inverting input current noise f > 1MHz 35 40 42 43 pA/√Hz max B

Differential gain error NTSC, RL= 150Ω0.03 % typ C

NTSC, RL= 37.5Ω0.05 % typ C

Differential phase error NTSC, RL= 150Ω0.01 degrees typ C

NTSC, RL= 37.5Ω0.04 degrees typ C

Channel-to-channel crosstalk (QFN-16) f = 5MHz, Input-referred –92 dBc typ C

DC PERFORMANCE(4)

Open-loop transimpedance gain (ZOL) Differential, VO= 0V, RL= 100Ω90 60 56 55 kΩmin A

Input offset voltage, full bias VCM = 0V ±2 ±7 ±8 ±9 mV max A

Average offset drift, full bias VCM = 0V ±25 ±30 mV/°C max B

Input offset voltage matching, full bias VCM = 0V ±0.5 ±2 ±2.5 ±2.5 mV max A

Input offset voltage, 75% bias VCM = 0V ±2 ±7 ±8 ±9 mV max B

Input offset voltage, 50% bias VCM = 0V ±2 ±7 ±8 ±9 mV max B

(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization

and simulation. (C) Typical value only for information.

(2) Junction temperature = ambient for +25°C tested specifications.

(3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +18°C at high temperature limit for over

temperature specifications.

(4) Current is considered positive-out-of node. VCM is the input common-mode voltage.

Product Folder Link(s): OPA2673

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

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ELECTRICAL CHARACTERISTICS: VS= ±6V (continued)

At TA= +25°C, A0 = A1 = 0 (full power), G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise noted. See

Figure 76 for ac performance only. Single channel specifications, except where noted.

OPA2673IRGV

MIN/MAX OVER

TYP TEMPERATURE

0°C to –40°C to MIN/ TEST

PARAMETER CONDITIONS +25°C +25°C(2) 70°C(3) +85°C(3) UNIT MAX LEVEL(1)

DC PERFORMANCE (continued)

Noninverting input bias current VCM = 0V ±5 ±25 ±27 ±28 mA max A

Noninverting input bias current drift VCM = 0V ±45 ±47 mA/°C max B

Noninverting input bias current matching VCM = 0V ±0.5 ±5 ±6 ±7 mA max A

Inverting input bias current VCM = 0V ±6 ±48 ±52 ±55 mA max A

Inverting input bias current drift VCM = 0V ±90 ±110 mA/°C max B

Inverting input bias current matching VCM = 0V ±6 ±25 ±30 ±30 mA max A

INPUT(5)

Common-mode input range(6) ±3.6 ±3.5 ±3.3 ±3.2 V min A

Common-mode rejection ratio VCM = 0V, Input-referred 56 50 48 47 dB min A

Noninverting input impedance 1.5 || MΩ|| pF typ C

1.5

Inverting input resistance Open-loop 32 16 Ωmin B

Inverting input resistance Open-loop 32 40 Ωmax B

Shutdown isolation G = +4V/V, f = 1MHz, A1= A0= 1 85 dB typ C

OUTPUT

Voltage output swing No load ±4.9 ±4.8 ±4.75 ±4.7 V min A

100Ωload ±4.8 ±4.75 ±4.7 ±4.65 V min B

25Ωload ±4.7 ±4.5 ±4.45 ±4.4 V min A

Output current at full power (peak) RL= 4Ω, A1 = 0, A0 = 0 ±700 ±460 ±440 ±425 mA min A

Output current at 75% bias (peak) RL= 4Ω, A1 = 0, A0 = 1 ±500 ±350 ±325 ±300 mA min A

Output current at 50% bias (peak) RL= 4Ω, A1 = 1, A0 = 0 ±180 ±120 ±115 ±110 mA min A

Short-cIrcuit current VO= 0V ±800 mA typ C

Closed-loop output impedance at full power G = +4V/V, f ≤100kHz, A1 = 0, A0 = 0 0.01 Ωtyp C

Closed-loop output impedance at 75% bias G = +4V/V, f ≤100kHz, A1 = 0, A0 = 1 0.01 Ωtyp C

Closed-loop output impedance at 50% bias G = +4V/V, f ≤100kHz, A1 = 1, A0 = 0 0.01 Ωtyp C

Output impedance at shutdown 25 || 4 kΩ|| pF typ C

Output switching glitch Inputs at GND ±20 mV typ C

POWER CONTROL

Maximum logic 0 A1, A0, VS= ±6V 0.8 0.8 0.8 V max A

Minimum logic 1 A1, A0, VS= ±6V 22 2 V min A

Logic input current A0, A1 = 0, each line 6 89 10 mA max A

A0, A1 = 1, each line –50 –110 –125 –150 mA min A

(5) Current is considered positive-out-of node. VCM is the input common-mode voltage.

(6) Tested < 3dB below minimum CMRR specifications at ±CMIR limits.

Product Folder Link(s): OPA2673

OPA2673

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SBOS382F –JUNE 2008–REVISED MAY 2010

ELECTRICAL CHARACTERISTICS: VS= ±6V (continued)

At TA= +25°C, A0 = A1 = 0 (full power), G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise noted. See

Figure 76 for ac performance only. Single channel specifications, except where noted.

OPA2673IRGV

MIN/MAX OVER

TYP TEMPERATURE

0°C to –40°C to MIN/ TEST

PARAMETER CONDITIONS +25°C +25°C(2) 70°C(3) +85°C(3) UNIT MAX LEVEL(1)

POWER SUPPLY

Specified operating voltage ±6 V typ C

Maximum operating voltage ±6.5 ±6.5 ±6.5 V max A

Minimum operating voltage (dual supply) ±3.5 V typ C

Minimum operating voltage (single supply) +5.75 V typ C

Maximum quiescent current at full power VS= ±6V, Total both channels, 32 38 40 42 mA max A

A1 = 0, A0 = 0

Minimum quiescent current at full power VS= ±6V, Total both channels, 32 26 25 24 mA min A

A1 = 0, A0 = 0

Supply current at 75% bias VS= ±6V, Total both channels, 24 29 31 33 mA max A

A1 = 0, A0 = 1

Supply current at 50% bias VS= ±6V, Total both channels, 16 19 20 21 mA max A

A1 = 1, A0 = 0

Supply current (off-line) VS= ±6V, Total both channels, 5.5 77.5 8 mA max A

A1 = 1, A0 = 1

Supply current step time

Power-supply rejection ratio (–PSRR) Input-referred 54 49 48 47 dB min A

THERMAL CHARACTERISTICS

Specified operating temperature range IRGV package –40 to °C typ C

+85

Thermal resistance, qJA Junction-to-ambient

RGV QFN-16 PowerPAD soldered to PCB 45 °C/W typ C

PowerPAD floating(7) 75

(7) PowerPad is physically connected to the negative (-VS) supply for dual-supply configuration or ground (GND) for single-supply

configuration.

Product Folder Link(s): OPA2673

NormalizedGain(dB)

10M 100M 1G

Frequency(Hz)

G=+2V/V

R =475

G=+4V/V

R =402

G=+8V/V

R =250

V =500mV

R =100

O PP

G=+1V/V

R =511

NormalizedGain(dB)

0 100 200 300 400 500 600 700 800 900 1000

Frequency(MHz)

50%Bias

75%Bias

FullPower

G=+4V/V

R =100

V =500mV

O PP

300

200

100

200

300

OutputVoltage(V)

OutputVoltage(mV)

Time(10ns/div)

G=+4V/V

R =100

LargeSignal 2.5VP

LeftScale

SmallSignal 100mVP

RightScale

NormalizedGain(dB)

0 100 200 300 400 500 600 700 800 900 1000

Frequency(MHz)

G=+4V/V

R =100

V =2V

O PP

V =5V

O PP

V =1V

O PP

V =8V

O PP

Crosstalk(dB)

1 10 100

Frequency(MHz)

Input-Referred

OutputVoltage(V)

-800 -600 -400 -200 0 200 400 600 800

OutputCurrent(mA)

2WInternal

PowerDissipation

SingleChannel

2WInternal

PowerDissipation

SingleChannel

100 LoadLineW

25 LoadLineW

10 LoadLineW

LoadLine

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V, Full Bias

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

SMALL-SIGNAL FREQUENCY RESPONSE

SMALL-SIGNAL FREQUENCY RESPONSE OVER POWER SETTINGS

Figure 1. Figure 2.

SMALL-SIGNAL AND

LARGE-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL PULSE RESPONSES

Figure 3. Figure 4.

CHANNEL-TO-CHANNEL CROSSTALK OUTPUT VOLTAGE AND CURRENT LIMITATIONS

Figure 5. Figure 6.

Product Folder Link(s): OPA2673

-55

100

105

HarmonicDistortion(dBc)

0.1 1 10 100

Frequency(MHz)

2ndHarmonic

3rdHarmonic

SingleChannel

G=+4V/V

R =100

V =2V

O PP

100

105

110

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

f=10MHz

0 2 46 8 10

OutputVoltage(V )

HarmonicDistortion(dBc)

10 100 1k

Resistance( )W

2ndHarmonic

3rdHarmonic

G=+4V/V

V =2V

f=10MHz

PPO

-76

HarmonicDistortion(dBc)

3.0 3.5 4.0 4.5 5.0 5.5 6.0

SupplyVoltage(±V )

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

f=10MHz

V =2V

O PP

InterceptPoint(+dBm)

010 20 30 40 50 100

Frequency(MHz)

PoweratMatched50 LoadW

9080

-60

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

f=10MHz

R =100

V =2V

O PP

1 10

Gain(V/V)

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V, Full Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs OUTPUT VOLTAGE

Figure 7. Figure 8.

HARMONIC DISTORTION vs LOAD RESISTANCE HARMONIC DISTORTION vs SUPPLY VOLTAGE

Figure 9. Figure 10.

TWO-TONE, THIRD-ORDER INTERMODULATION

HARMONIC DISTORTION vs NONINVERTING GAIN INTERCEPT

Figure 11. Figure 12.

Product Folder Link(s): OPA2673

InputVoltage(V)

OutputVoltage(V)

Time(25ns/div)

G=+4V/V

R =100

LWInput

Output

Power-SupplyRejectionRatio(dB),

Common-ModeRejectionRatio(dB)

1k 10k 100M

Frequency(Hz)

+PSRR

-PSRR

CMRR

100k 1M 10M

120

100

TransimpedanceGain(dB )W

10k 100k 1G

Frequency(Hz)

Phase

Gain

1M 10M 100M

135

180

225

270

TransimpedancePhase( )°

0.1

0.01

0.001

Impedance( )W

10k 100k 10M

Frequency(Hz)

VoltageRange(±V)

3.5 4.0 6.0

SupplyVoltage( V)±

4.5

PositiveandNegativeOutputVoltageSwing

PositiveandNegativeCommon-ModeInputVoltage

5.0 5.5

100k

10k

100

Impedance( )W

10k 100k 10M

Frequency(Hz)

Open-Loop

Closed-Loop(R =402 ,G=+4V/V)W

Single-Ended

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V, Full Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

OVERDRIVE RECOVERY CMRR AND PSRR vs FREQUENCY

Figure 13. Figure 14.

OPEN-LOOP TRANSIMPEDANCE GAIN AND PHASE CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY

Figure 15. Figure 16.

COMMON-MODE INPUT VOLTAGE RANGE

ACTIVE OFF-LINE IMPEDANCE vs FREQUENCY AND OUTPUT SWING vs SUPPLY VOLTAGE

Figure 17. Figure 18.

Product Folder Link(s): OPA2673

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.5-

InputOffsetVoltage(mV),

NoninvertingInputBiasCurrent( A)m

-50 -25 125

Temperature( C)°

InvertingBiasCurrent

NoninvertingBiasCurrent

InputOffsetVoltage

100755025

17.5

18.0

18.5

19.0

19.5

20.0

20.5

21.0

21.5

22.0

InvertingInputBiasCurrent( A)m

dG,d (%/ )f °

1 2 4

Numberof150 LoadsW

d ,PositiveVideof

d ,NegativeVideof

dG,PositiveVideo

dG,NegativeVideo

G=+2V/V

R =475

V = 6V

600

580

560

540

520

500

480

460

440

420

400

OutputCurrent(mA)

-50 -25 125

Temperature( C)°

SupplyCurrent

SinkingOutputCurrent

SourcingOutputCurrent

100755025

31.0

30.8

30.6

30.4

30.2

30.0

29.8

29.6

28.4

29.2

29.0

SupplyCurrent(mA)

100

VoltageNoiseDensity(nV/ ),

CurrentNoiseDensity(pA/ )

100 1k 10M

Frequency(Hz)

InvertingCurrentNoise(35pA/ )ÖHz

VoltageNoise(2.4nV/ )ÖHz

NoninvertingCurrentNoise(5.2pA/ )ÖHz

1M100k10k

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V, Full Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

COMPOSITE VIDEO (dG/df) TYPICAL DC DRIFT OVER TEMPERATURE

Figure 19. Figure 20.

SUPPLY AND OUTPUT CURRENT vs TEMPERATURE INPUT VOLTAGE AND CURRENT NOISE DENSITY

Figure 21. Figure 22.

Product Folder Link(s): OPA2673

NormalizedGain(dB)

10M 100M 1G

Frequency(Hz)

G =

DIFF

+2 V

G =+4V/V

DIFF

G = V/

DIFF +8 V

G =+1V/V

V =500mV

R =100 Differential

O PP

G = V/

DIFF +1 V

NormalizedGain(dB)

0 100 200 300 400 500 600 700

Frequency(MHz)

G =+4V/V

G =+1V/V

R =100 Differential

DIFF

O PP

V =500mV

50%Bias

75%Bias

FullBias

OutputVoltage(V)

Time(10ns/div)

Small-Signal 0.5V

RightScale

Large-Signal 4V

LeftScale

1.0

0.8

0.6

0.4

0.2

0.4

0.6

0.8

1.0

OutputVoltage(V)

NormalizedGain(dB)

0 100 700

Frequency(MHz)

V =4V

OPP

V = V

OPP

G =+4V/V

DIF

G =+1V/V

R =100 Differential

V = V

O16 PP

600500400300200

R ( )W

1 10 100 1000

Capacitance(pF)

Gain(dB)

10M 100M 500M

Frequency(Hz)

C =

22pF

C =

L47pF

C =

L10pF

C =

L100pF

OPA2673

(optional)

VIN VOUT

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V Differential, Full Bias

At TA= +25°C, RF= 511Ω, RL= 100ΩDifferential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.

SMALL-SIGNAL FREQUENCY RESPONSE

SMALL-SIGNAL FREQUENCY RESPONSE OVER POWER SETTING

Figure 23. Figure 24.

SMALL-SIGNAL AND

LARGE-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL PULSE RESPONSES

Figure 25. Figure 26.

DIFFERENTIAL RSvs CAPACITIVE LOAD FREQUENCY RESPONSE vs CAPACITIVE LOAD

Figure 27. Figure 28.

Product Folder Link(s): OPA2673

100

110

HarmonicDistortion(dBc)

0.1 1 10 100

Frequency(MHz)

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

R =100 Differential

V =2V

DIFF

O PP

100

105

110

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

0 2 46 8 10

OutputVoltage(V )

G =+4V/V

G =+1V/V

R =100 Differential

f=10MHz

DIFF

100

105

HarmonicDistortion(dBc)

10 100 1k

Resistance( )W

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

V =2V

f=10MHz

DIFF

100-

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

1 10

Gain(V/V)

G =+1V/V

V =2V

f=10MHz

R =100 Differential

PPO

-84

HarmonicDistortion(dBc)

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

SupplyVoltage( V )

3rdHarmonic

2ndHarmonic

G =+4V/V

G =+1V/V

R =100 Differential

f=10MHz

V =2V

DIFF

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V Differential, Full Bias (continued)

At TA= +25°C, RF= 511Ω, RL= 100ΩDifferential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.

HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs OUTPUT VOLTAGE

Figure 29. Figure 30.

HARMONIC DISTORTION vs LOAD RESISTANCE HARMONIC DISTORTION vs NONINVERTING GAIN

Figure 31. Figure 32.

HARMONIC DISTORTION vs SUPPLY VOLTAGE

Figure 33.

Product Folder Link(s): OPA2673

NormalizedGain(dB)

10M 100M 1G

Frequency(Hz)

G= V/

R =475

+2 V

G=+4 V

R =402

G= V/

R =250

+8 V

V =500mV

R =100

O PP

G=

R =511

+1V/V

NormalizedGain(dB)

0 100 200 300 400 500 600 700 800 900

Frequency(MHz)

G=+4V/V

R =100

V =1V

O PP

V =5V

O PP

V =2V

O PP

V =8V

O PP

300

200

100

200

300

OutputVoltage(V)

OutputVoltage(mV)

Time(10ns/div)

G=+4V/V

R =100

LargeSignal 2.5VP

LeftScale

SmallSignal 100mVP

RightScale

InputVoltage(V)

OutputVoltage(V)

Time(25ns/div)

G=+4V/V

R =100

Input

Output

500

480

460

440

420

400

380

360

340

320

300

OutputCurrent(mA)

-50 -25 125

Temperature( C)°

SupplyCurrent

SinkingOutputCurrent

SourcingOutputCurrent

100755025

24.50

24.25

24.00

23.75

23.50

23.25

23.00

22.75

22.50

22.25

22.00

SupplyCurrent(mA)

0.005

0.010

0.015

0.020

0.025

0.030

0.035

0.040

0.045

dG,d (%/ )f °

1 2 4

Numberof150 LoadsW

d ,PositiveVideof

d NegativeVideof,

dG,PositiveVideo

dG,NegativeVideo

G=+2V/V

R =475

V = 6V

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V, 75% Bias

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE

Figure 34. Figure 35.

SMALL-SIGNAL AND

LARGE-SIGNAL PULSE RESPONSES OVERDRIVE RECOVERY

Figure 36. Figure 37.

COMPOSITE VIDEO (dG/df) SUPPLY AND OUTPUT CURRENT vs TEMPERATURE

Figure 38. Figure 39.

Product Folder Link(s): OPA2673

-55

100

105

HarmonicDistortion(dBc)

0.1 1 10 100

Frequency(MHz)

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

V =2V

O PP

100

105

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

f=10MHz

0 2 46 8 10

OutputVoltage(V )

HarmonicDistortion(dBc)

10 100 1k

Resistance( )W

2ndHarmonic

3rdHarmonic

G=+4V/V

V =2V

f=10MHz

PPO

-74

HarmonicDistortion(dBc)

3.0 3.5 4.0 4.5 5.0 5.5 6.0

SupplyVoltage( V )±S

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

f=10MHz,V =2V

O PP

InterceptPoint(+dBm)

010 20 30 40 50 100

Frequency(MHz)

PoweratMatched50 LoadW

9080

-60

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

f=10MHz

R =100

V =2V

O PP

1 10

Gain(V/V)

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V, 75% Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs OUTPUT VOLTAGE

Figure 40. Figure 41.

HARMONIC DISTORTION vs LOAD RESISTANCE HARMONIC DISTORTION vs SUPPLY VOLTAGE

Figure 42. Figure 43.

TWO-TONE, THIRD-ORDER INTERMODULATION

HARMONIC DISTORTION vs NONINVERTING GAIN INTERCEPT

Figure 44. Figure 45.

Product Folder Link(s): OPA2673

0.1

0.01

0.001

Impedance( )W

10k 100k 10M

Frequency(Hz)

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V, 75% Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY

Figure 46.

Product Folder Link(s): OPA2673

NormalizedGain(dB)

10M 100M 1G

Frequency(Hz)

G =

DIFF

+2 V

G =+4 V

DIFF V/

G = V/

DIFF +8 V

G =+1V/V

V =500mV

R =100 Differential

O PP

G =

DIFF +1V/V

NormalizedGain(dB)

0 100 700

Frequency(MHz)

V =4V

OPP

V = V

OPP

G =+4V/V

DIF

G =+1V/V

R =100 Differential

V = V

O16 PP

600500400300200

OutputVoltage(V)

Time(10ns/div)

Small-Signal 0.5V

RightScale

Large-Signal 4V

LeftScale

1.0

0.8

0.6

0.4

0.2

0.4

0.6

0.8

1.0

OutputVoltage(V)

-50

100

110

HarmonicDistortion(dBc)

100k 1M 10M 100M

Frequency(Hz)

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

R =100 Differential

V =2V

DIFF

O PP

100

110

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

0 2 46 8 10

OutputVoltage(V )

G =+4V/V

G =+1V/V

R =100 Differential

f=10MHz

DIFF

100

105

HarmonicDistortion(dBc)

10 100 1k

Resistance( )W

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

V =2V

f=10MHz

DIFF

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V Differential, 75% Bias

At TA= +25°C, RF= 511Ω, RL= 100ΩDifferential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.

SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE

Figure 47. Figure 48.

SMALL-SIGNAL AND

LARGE-SIGNAL PULSE RESPONSES HARMONIC DISTORTION vs FREQUENCY

Figure 49. Figure 50.

HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs LOAD RESISTANCE

Figure 51. Figure 52.

Product Folder Link(s): OPA2673

100

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

1 10

Gain(V/V)

G =+1V/V

V =2V

f=10MHz

PPO

R =100 Differential

-74

HarmonicDistortion(dBc)

2.5 3.5 4.0 4.5 5.0 5.5 6.0

SupplyVoltage( V )±S

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

R =100 Differential

f=10MHz

V =2V

DIFF

O PP

3.0

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V Differential, 75% Bias (continued)

At TA= +25°C, RF= 511Ω, RL= 100ΩDifferential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.

HARMONIC DISTORTION vs NONINVERTING GAIN HARMONIC DISTORTION vs SUPPLY VOLTAGE

Figure 53. Figure 54.

Product Folder Link(s): OPA2673

NormalizedGain(dB)

10M 100M 1G

Frequency(Hz)

G=

R =475

+2V/V

G=+4 V

R =402

G= V/

R =250

+8 V

V =500mV

R =100

O PP

G= V/

R =511

+1 V

NormalizedGain(dB)

100 200 300 400 500 600 700

Frequency(MHz)

G=+4V/V

R =100

V =1V

O PP

V =5V

O PP

V =2V

O PP

V =8V

O PP

300

200

100

200

300

OutputVoltage(V)

OutputVoltage(mV)

Time(10ns/div)

G=+4V/V

R =100

LargeSignal 2.5VP

LeftScale

SmallSignal 100mVP

RightScale

InputVoltage(V)

OutputVoltage(V)

Time(25ns/div)

G=+4V/V

R =100

Input

Output

240

220

200

180

160

140

120

100

OutputCurrent(mA)

-50 -25 125

Temperature( C)°

SupplyCurrent

SinkingOutputCurrent

SourcingOutputCurrent

100755025

15.0

14.8

14.6

14.4

14.2

14.0

13.8

13.6

SupplyCurrent(mA)

0.005

0.010

0.015

0.020

0.025

0.030

0.035

0.040

0.045

0.050

dG,d (%/ )f °

1 2 4

Numberof150 LoadsW

d ,PositiveVideof

d ,NegativeVideof

dG,PositiveVideo

dG,NegativeVideo

G=+2V/V

R =475

V = 6V

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V, 50% Bias

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE

Figure 55. Figure 56.

SMALL-SIGNAL AND

LARGE-SIGNAL PULSE RESPONSES OVERDRIVE RECOVERY

Figure 57. Figure 58.

COMPOSITE VIDEO (dG/df) SUPPLY AND OUTPUT CURRENT vs TEMPERATURE

Figure 59. Figure 60.

Product Folder Link(s): OPA2673

100

110

HarmonicDistortion(dBc)

100k 1M 10M 100M

Frequency(Hz)

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

V =2V

O PP

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

f=10MHz

0 2 46 8 10

OutputVoltage(V )

HarmonicDistortion(dBc)

10 100 1k

Resistance( )W

2ndHarmonic

3rdHarmonic

G=+4V/V

V =2V

f=10MHz

PPO

-70

HarmonicDistortion(dBc)

678 9 10 11 12

SupplyVoltage(V )

2ndHarmonic

3rdHarmonic

G=+4V/V

R =100

f=10MHz

V =2V

O PP

InterceptPoint(+dBm)

010 20 30 40 50 100

Frequency(MHz)

PoweratMatched50 LoadW

9080

-60

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

f=10MHz

R =100

V =2V

O PP

1 10

Gain(V/V)

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V, 50% Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs OUTPUT VOLTAGE

Figure 61. Figure 62.

HARMONIC DISTORTION vs LOAD RESISTANCE HARMONIC DISTORTION vs SUPPLY VOLTAGE

Figure 63. Figure 64.

TWO-TONE, THIRD-ORDER INTERMODULATION

HARMONIC DISTORTION vs NONINVERTING GAIN INTERCEPT

Figure 65. Figure 66.

Product Folder Link(s): OPA2673

0.1

0.01

0.001

Impedance( )W

10k 100k 10M

Frequency(Hz)

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V, 50% Bias (continued)

At TA= +25°C, G = +4V/V, RF= 402Ω, and RL= 100Ω, unless otherwise specified.

CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY

Figure 67.

Product Folder Link(s): OPA2673

NormalizedGain(dB)

10M 100M 1G

Frequency(Hz)

G =

DIFF

+2 V

G =+4V/V

DIFF

G = V/

DIFF +8 V

G =+1V/V

V =500mV

R =100 Differential

O PP

G = V/

DIFF +1 V

NormalizedGain(dB)

0 100 600

Frequency(MHz)

V = V

OPP

G =+4V/V

DIF

G =+1V/V

R =100 Differential

V = V

O16 PP

500400300200

V = V

OPP

OutputVoltage(V)

Time(10ns/div)

Small-Signal 0.5V

RightScale

Large-Signal 4V

LeftScale

1.0

0.8

0.6

0.4

0.2

0.4

0.6

0.8

1.0

OutputVoltage(V)

-45

105

HarmonicDistortion(dBc)

100k 1M 10M 100M

Frequency(Hz)

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

R =100 Differential

V =2V

DIFF

O PP

100

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

0 2 46 8 10

OutputVoltage(V )

G =+4V/V,

G =+1V/V,f=10MHz

DIFF

R =100 Differential

100

105

110

HarmonicDistortion(dBc)

10 100 1k

Resistance( )W

2ndHarmonic

3rdHarmonic

G =+4V/V

G =+1V/V

V =2V

f=10MHz

DIFF

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS: VS= ±6V Differential, 50% Bias

At TA= +25°C, RF= 511Ω, RL= 100ΩDifferential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.

SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE

Figure 68. Figure 69.

SMALL-SIGNAL AND

LARGE-SIGNAL PULSE RESPONSES HARMONIC DISTORTION vs FREQUENCY

Figure 70. Figure 71.

HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs LOAD RESISTANCE

Figure 72. Figure 73.

Product Folder Link(s): OPA2673

100

HarmonicDistortion(dBc)

2ndHarmonic

3rdHarmonic

Gain(V/V)

G =+1V/V

V =2V

f=10MHz

PPO

R =100 Differential

HarmonicDistortion(dBc)

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

SupplyVoltage( V )

2ndHarmonic

3rdHarmonic

G =+4V/V

G +1V/V

R =100 Differential

f=10MHz

V =2V

DIFF

O PP

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TYPICAL CHARACTERISTICS: VS= ±6V Differential, 50% Bias (continued)

At TA= +25°C, RF= 511Ω, RL= 100ΩDifferential, GDIFF = +4V/V, and GCM = +1V/V, unless otherwise specified.

HARMONIC DISTORTION vs NONINVERTING GAIN HARMONIC DISTORTION vs SUPPLY VOLTAGE

Figure 74. Figure 75.

Product Folder Link(s): OPA2673

2kW

82.5W

75 CableW

RG-59

82.5W

75W

475W402W

Video1

+5V

-5V

1/2

OPA2673

1/2

OPA2673

2kW

75W

475W402W

Video2

-5V

+5V

DIS

Power-supply

decouplingnotshown.

VDIS

1/2

OPA2673

+6V

-6V

50 LoadW

50W

50WVO

50 SourceW

133W

402W

6.8 Fm

0.1 Fm6.8 Fm

0.1 Fm

+VS

-VS

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

APPLICATION INFORMATION

WIDEBAND VIDEO MULTIPLEXING

WIDEBAND CURRENT-FEEDBACK

OPERATION One common application for video speed amplifiers

that include a disable pin is to wire multiple amplifier

The OPA2673 gives the exceptional ac performance outputs together, then select one of several possible

of a wideband current-feedback op amp with a highly video inputs to source onto a single line. This simple

linear, high-power output stage. Requiring 16mA/ch wired-OR video multiplexer can be easily

quiescent current, the OPA2673 swings to within 1.1V implemented using the OPA2673, as Figure 77

of either supply rail and delivers in excess of 460mA illustrates.

at room temperature. This low output headroom

requirement, along with supply voltage independent

biasing, gives remarkable dual (±6V) supply

operation. The OPA2673 delivers greater than

450MHz bandwidth driving a 2VPP output into 100Ω

on a single +12V supply. Previous boosted output

stage amplifiers typically suffer from very poor

crossover distortion as the output current goes

through zero. The OPA2673 achieves a comparable

power gain with much better linearity. The primary

advantage of a current-feedback op amp over a

voltage-feedback op amp is that ac performance

(bandwidth and distortion) is relatively independent of

signal gain. Figure 76 shows the dc-coupled, gain of

+4V/V, dual power-supply circuit configuration used

as the basis of the ±6V Electrical Characteristics and

Typical Characteristics. For test purposes, the input

impedance is set to 50Ωwith a resistor to ground and

the output impedance is set to 50Ωwith a series

output resistor. Voltage swings reported in the Figure 77. Two-Channel Video Multiplexer

Electrical Characteristics are taken directly at the

input and output pins, while load powers (dBm) are Typically, channel switching is performed either on

defined at a matched 50Ωload. For the circuit of sync or retrace time in the video signal. The two

Figure 76, the total effective load is 100Ω|| 402Ω=inputs are approximately equal at this time. The

80Ω.make-before-break disable characteristic of the

OPA2673 ensures that there is always one amplifier

controlling the line when using a wired-OR circuit

similar to that shown in Figure 77. Because both

inputs may be on for a short period during the

transition between channels, the outputs are

combined through the output impedance matching

resistors (82.5Ωin this case). When one channel is

disabled, its feedback network forms part of the

output impedance and slightly attenuates the signal in

getting out onto the cable. The gain and output

matching resistors have been slightly increased to get

a signal gain of +1V/V at the matched load and

provide a 75Ωoutput impedance to the cable. The

video multiplexer connection (as shown in Figure 77)

also ensures that the maximum differential voltage

across the inputs of the unselected channel do not

exceed the rated ±1.2V maximum for standard video

signal levels. The active-off line circuitry integrated

Figure 76. DC-Coupled, G = +4V/V, Bipolar within the OPA2673 ensures that the off-channel will

Supply, Specification and Test Circuit stay off independently of the signal amplitude present

at the output.

Product Folder Link(s): OPA2673

-4

-8

-12

Frequency(MHz)

20MHz,SECOND-ORDERBUTTERWORTH

LOW-PASSFREQUENCYRESPONSE

0.1 100101

Gain(dB)

600W

20MHz,Second-OrderButterworth

Low-PassFilter

1/2

OPA2673

+10V

Power-supply

decouplingnotshown.

32.3W105W

5kW

5kW51W

0.1 Fm

402W

1/2

OPA2673

4VI

100pF

133W

0.1 Fm

150pF

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

Where two outputs are switched (see Figure 77), the has been adjusted to optimize bandwidth for the

output line is always under the control of one amplifier itself. As the single-supply frequency

amplifier or the other as a result of the response plots show, the OPA2673 in this

make-before-break disable timing. In this case, the configuration gives greater than 400MHz small-signal

switching glitches for two 0V inputs drop to less than bandwidth. The capacitor values were chosen as low

20mV. as possible but adequate to override the parasitic

input capacitance of the amplifier. The resistor values

were slightly adjusted to give the desired filter

HIGH-SPEED ACTIVE FILTERS frequency response while accounting for the

Wideband current-feedback op amps make ideal approximate 1ns propagation delay through each

elements for implementing high-speed active filters channel of the OPA2673.

where the amplifier is used as a fixed gain block

inside a passive RC circuit network. The relatively HIGH-POWER TWISTED-PAIR DRIVER

constant bandwidth versus gain provides low

interaction between the actual filter poles and the A very demanding application for a high-speed

required gain for the amplifier. Figure 78 shows an amplifier is to drive a low load impedance while

example single-supply buffered filter application. In maintaining a high output voltage swing to high

this case, one of the OPA2673 channels is used to frequencies. Using the dual current-feedback op amp

set up the dc operating point and provide impedance OPA2673, an 8VPP output signal swing into a

isolation from the signal source into the second-stage twisted-pair line with a typical impedance of 50Ωcan

filter. That stage is set up to implement a 20MHz, be realized. Configured as shown on the front page,

maximally flat Butterworth frequency response and the two amplifiers of the OPA2673 drive the output

provide an ac gain of +4V/V. transformer in a push-pull configuration, thus doubling

the peak-to-peak signal swing at each op amp output

The 51Ωinput matching resistor is optional in this to 8VPP. The transformer has a turns ratio of 1.4. The

case. The input signal is ac-coupled to the 5V dc total load seen by the amplifier is 35Ω.

reference voltage developed through the resistor

divider from the +10V power supply. This first stage Line driver applications usually have a high demand

acts as a gain of +1V/V voltage buffer for the signal for transmitting the signal with low distortion.

where the 600Ωfeedback resistor is required for Current-feedback amplifiers such as the OPA2673

stability. This first stage easily drives the low input are ideal for delivering low-distortion performance to

resistors required at the input of this high-frequency higher gains. The example shown is set for a

filter. The second stage is set for a dc gain of +1V/V, differential gain of 4V/V. This circuit can deliver the

carrying the 5V operating point through to the output maximum 8VPP signal with over 200MHz bandwidth.

pin, and an ac gain of +4V/V. The feedback resistor

Figure 78. Buffered Single-Supply Active Filter

Product Folder Link(s): OPA2673

P =10 log´

L(1mW) R´L

VRMS

VLPP

nVLPP

±IP

2VLPP

1:n

V =

RMS

(1mW) R 10´ ´

V =CrestFactor V =CF V

PRMS RMS

´ ´

V =2 CF V

LP RMS

P´ ´

V =V (V +V ) I (R +R )-

OPP CC 1 2

- ´

P1 2

V =

CC 1 2

P´V +(V +V )+I (R +R )

OPP 1 2

V =2 CF

LPP ´ ´

(1mW) R 10´ ´

±I =

P4RM

2 V´LPP

R =

ZLINE

2n2

+VCC

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

LINE DRIVER HEADROOM MODEL

The first step in a driver design is to compute the

peak-to-peak output voltage from the target

specifications. This calculation is done using the

following equations:

(1)

With PLpower and VRMS voltage at the load, and RL

load impedance, this calculation gives: Figure 79. Driver Peak Output Model

With the required output voltage and current versus

(2) turns ratio set, an output stage headroom model

(3) allows the required supply voltage versus turns ratio

to be developed.

With VPpeak voltage at the load and the crest factor,

CF: The headroom model (see Figure 80) can be

described with the following set of equations:

(4) First, as available output voltage for each amplifier:

with VLPP: peak-to-peak voltage at the load. (8)

Consolidating Equation 1 through Equation 4 allows

the required peak-to-peak voltage at the load function Or, second, as required single-supply voltage:

of the crest factor, the load impedance, and the (9)

power in the load to be expressed. Thus: The minimum supply voltage for a set of power and

load requirements is given by Equation 9.

(5) Table 1 gives V1, V2, R1, and R2for +12V operation

of the OPA2673.

This VLPP is usually computed for a nominal line

impedance and may be taken as a fixed design

target.

The next step for the driver is to compute the

individual amplifier output voltage and currents as a

function of VPP on the line and transformer turns ratio.

As the turns ratio changes, the minimum allowed

supply voltage also changes. The peak current in the

amplifier is given by:

(6)

With VLPP defined in Equation 5 and RMdefined in

Equation 7.

(7)

The peak current is computed in Figure 79 by noting

that the total load is 4RMand that the peak current is Figure 80. Line Driver Headroom Model

half of the peak-to-peak calculated using VLPP.

Table 1. Line Driver Headroom Model Values

V1R1V2R2

+12V 0.9V 2Ω0.9V 2Ω

Product Folder Link(s): OPA2673

+VCC

I =

AVG

P =

OUT CF

´ -

V 2PL

P =I V +

TOT Q´CC CF

´ -

V 2PL

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

TOTAL DRIVER POWER FOR LINE DRIVER DESIGN-IN TOOLS

APPLICATIONS Demonstration Fixture

The total internal power dissipation for the OPA2673

in a line driver application is the sum of the quiescent A printed circuit board (PCB) is available to assist in

power and the output stage power. The OPA2673 the initial evaluation of circuit performance using the

holds a relatively constant quiescent current versus OPA2673 in its QFN package option. This demo

supply voltage—giving a power contribution that is board is offered free of charge as an unpopulated

simply the quiescent current times the supply voltage PCB, delivered with a user’s guide. The summary

used (the supply voltage is greater than the solution information for this fixture is shown in Table 2.

given in Equation 9). The total output stage power

may be computed with reference to Figure 81.Table 2. Demonstration Fixture by Package

ORDERING LITERATURE

PRODUCT PACKAGE NUMBER NUMBER

OPA2673IRGV QFN-16 DEM-OPA-QFN-2A SBOU067

This demonstration fixture can be requested through

the Texas Instruments web site (www.ti.com).

Macromodels and Applications Support

Computer simulation of circuit performance using

SPICE is often useful when analyzing the

performance of analog circuits and systems. This

technique is particularly true for video and RF

amplifier circuits where parasitic capacitance and

inductance can have a major effect on circuit

Figure 81. Output Stage Power Model performance. A SPICE model for the OPA2673 is

available through the TI web site (www.ti.com). This

model does a good job of predicting small-signal ac

The two output stages used to drive the load of and transient performance under a wide variety of

Figure 79 can be seen as an H-Bridge in Figure 81.operating conditions, but does not do as well in

The average current drawn from the supply into this predicting the harmonic distortion or dG/dΦ

H-Bridge and load is the peak current in the load characteristics. This model does not attempt to

given by Equation 6 divided by the crest factor (CF). distinguish between the package types in small-signal

This total power from the supply is then reduced by ac performance, nor does it attempt to simulate

the power in RTto leave the power dissipated internal channel-to-channel coupling.

to the drivers in the four output stage transistors. That

power is simply the target line power used in OPERATING SUGGESTIONS

Equation 7 plus the power lost in the matching

elements (RM). In the examples here, a perfect match Setting Resistor Values to Optimize Bandwidth

is targeted giving the same power in the matching

elements as in the load. The output stage power is A current-feedback op amp such as the OPA2673

then set by Equation 10.can hold an almost constant bandwidth over signal

gain settings with the proper adjustment of the

external resistor values, which are shown in the

(10) Typical Characteristics; the small-signal bandwidth

decreases only slightly with increasing gain. These

The total amplifier power is then: characteristic curves also show that the feedback

resistor is changed for each gain setting. The resistor

values on the inverting side of the circuit for a

(11) current-feedback op amp can be treated as frequency

space response compensation elements, whereas the ratios

set the signal gain.

space

Product Folder Link(s): OPA2673

a1+ RG

1+ Z(s)

R +R

F I 1+ RG

=a ´ NG

1+ Z(s)

R +R

F I NG´

Z I(S) ERR

IERR

= LoopGain

R +R

F I ´NG

Z(s)

NG=NoiseGain=1+

R =530 NG R-

F´I

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

Figure 82 shows the small-signal frequency response Developing the transfer function for the circuit of

analysis circuit for the OPA2673. Figure 82 gives Equation 13:

(13)

This formula is written in a loop-gain analysis format,

where the errors arising from a non-infinite open-loop

gain are shown in the denominator. If Z(s) is infinite

over all frequencies, the denominator of Equation 13

reduces to 1 and the ideal desired signal gain shown

in the numerator is achieved. The fraction in the

denominator of Equation 13 determines the frequency

response. Equation 14 shows this as the loop-gain

equation:

Figure 82. Current-Feedback Transfer Function (14)

Analysis Circuit If 20log(RF+ NG × RI) is drawn on top of the

open-loop transimpedance plot, the difference

The key elements of this current-feedback op amp between the two would be the loop gain at a given

model are: frequency. Eventually, Z(s) rolls off to equal the

a= buffer gain from the noninverting input to the denominator of Equation 14, at which point the loop

inverting input gain has reduced to 1 (and the curves have

RI= buffer output impedance intersected). This point of equality is where the

IERR = feedback error current signal amplifier closed-loop frequency response given by

Equation 13 starts to roll off, and is exactly analogous

Z(s) = frequency-dependent open-loop to the frequency at which the noise gain equals the

transimpedance gain from IERR to VOopen-loop voltage gain for a voltage-feedback op

amp. The difference here is that the total impedance

in the denominator of Equation 14 may be controlled

(12) somewhat separately from the desired signal gain (or

The buffer gain is typically very close to 1.00V/V and NG). The OPA2673 is internally compensated to give

is normally neglected from signal gain considerations. a maximally flat frequency response for RF= 402Ωat

This gain, however, sets the CMRR for a single op NG = 4V/V on ±6V supplies. Evaluating the

amp differential amplifier configuration. For a buffer denominator of Equation 14 (which is the feedback

gain of a< 1.0, the CMRR = –20 × log(1 – a)dB. transimpedance) gives an optimal target of 530Ω. As

the signal gain changes, the contribution of the NG ×

RI, the buffer output impedance, is a critical portion of RIterm in the feedback transimpedance changes, but

the bandwidth control equation. The OPA2673 the total can be held constant by adjusting RF.

inverting output impedance is typically 32Ω.Equation 15 gives an approximate equation for

A current-feedback op amp senses an error current in optimum RF over signal gain:

the inverting node (as opposed to a differential input (15)

error voltage for a voltage-feedback op amp) and

passes this on to the output through an internal As the desired signal gain increases, this equation

frequency-dependent transimpedance gain. The eventually suggests a negative RF. A somewhat

Typical Characteristics show this open-loop subjective limit to this adjustment can also be set by

transimpedance response, which is analogous to the holding RGto a minimum value of 20Ω. Lower values

open-loop voltage gain curve for a voltage-feedback load both the buffer stage at the input and the output

op amp. stage if RFgets too low—actually decreasing the

bandwidth. Figure 83 shows the recommended RF

versus NGfor ±6V operation. The values for RF

versus gain shown here are approximately equal to

the values used to generate the Typical

Product Folder Link(s): OPA2673

600

500

400

300

200

NoiseGain

0 2010 155

FeedbackResistor( )W

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

Characteristics. They differ in that the optimized graph show the zero-voltage output current limit and

values used in the Typical Characteristics are also the zero-current output voltage limit, respectively. The

correcting for board parasitic not considered in the four quadrants give a more detailed view of the

simplified analysis leading to Equation 15. The values OPA2673 output drive capabilities, noting that the

shown in Figure 83 give a good starting point for graph is bounded by a safe operating area of 2W

designs where bandwidth optimization is desired. maximum internal power dissipation (in this case, for

one channel only). Superimposing resistor load lines

onto the plot shows that the OPA2673 can drive ±4V

into 10Ωor ±4.5V into 25Ωwithout exceeding the

output capabilities or the 2W dissipation limit. A 100Ω

load line (the standard test circuit load) shows the full

±4.8V output swing capability, as stated in the

Electrical Characteristics table. The minimum

specified output voltage and current over temperature

are set by worst-case simulations at the cold

temperature extreme. Only at cold startup do the

output current and voltage decrease to the numbers

shown in the Electrical Characteristics table. As the

output transistors deliver power, the junction

temperatures increase, decreasing the VBEs

(increasing the available output voltage swing), and

increasing the current gains (increasing the available

output current). In steady-state operation, the

Figure 83. Feedback Resistor vs Noise Gain available output voltage and current is always greater

than that shown in the over-temperature

The total impedance going into the inverting input specifications because the output stage junction

may be used to adjust the closed-loop signal temperatures is higher than the minimum specified

bandwidth. Inserting a series resistor between the operating ambient.

inverting input and the summing junction increases

the feedback impedance (the denominator of Driving Capacitive Loads

Equation 14), decreasing the bandwidth. The internal One of the most demanding and yet very common

buffer output impedance for the OPA2673 is slightly load conditions for an op amp is capacitive loading.

influenced by the source impedance coming from of Often, the capacitive load is the input of an

the noninverting input terminal. High-source resistors analog-to-digital converter (ADC)—including

also have the effect of increasing RI, decreasing the additional external capacitance that may be

bandwidth. For those single-supply applications that recommended to improve the ADC linearity. A

develop a midpoint bias at the noninverting input high-speed, high open-loop gain amplifier such as the

through high valued resistors, the decoupling OPA2673 can be very susceptible to decreased

capacitor is essential for power-supply ripple stability and closed-loop response peaking when a

rejection, noninverting input noise current shunting, capacitive load is placed directly on the output pin.

and to minimize the high-frequency value for RIin When the amplifier open-loop output resistance is

Figure 82.considered, this capacitive load introduces an

additional pole in the signal path that can decrease

Output Current and Voltage the phase margin. Several external solutions to this

The OPA2673 provides output voltage and current problem have been suggested.

capabilities that are unsurpassed in a low-cost dual When the primary considerations are frequency

monolithic op amp. Under no-load conditions at response flatness, pulse response fidelity, and/or

+25°C, the output voltage typically swings closer than distortion, the simplest and most effective solution is

1.1V to either supply rail; the tested (+25°C) swing to isolate the capacitive load from the feedback loop

limit is within 1.2V of either rail. Into a 4Ωload (the by inserting a series isolation resistor between the

minimum tested load), it delivers more than ±460mA. amplifier output and the capacitive load. This

The specifications described previously, though approach does not eliminate the pole from the loop

familiar in the industry, consider voltage and current response, but rather shifts it and adds a zero at a

limits separately. In many applications, it is the higher frequency. The additional zero acts to cancel

voltage times current (or V-I product) that is more the phase lag from the capacitive load pole, thus

relevant to circuit operation. Refer to the Output increasing the phase margin and improving stability.

Voltage and Current Limitations plot in the Typical The Typical Characteristics show the Differential RS

Characteristics (Figure 6). The X- and Y-axes of this vs Capacitive Load (Figure 27) and the resulting

Product Folder Link(s): OPA2673

E =

OE +(I R ) +4kTR

NI BN S S xNG +(I R ) +4kTR NG

BI F F

2 2 2

4kT

1/2

OPA2673

IBI

IBN

4kT=1.6E 20J-

at290 K°

ERS

ENI

Ö4kTRS

Ö4kTRF

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

frequency response at the load. Parasitic capacitive Typical Characteristics show 69dBc difference

loads greater than 2pF can begin to degrade the between the test-tone power and the third-order

performance of the OPA2673. Long PCB traces, intermodulation spurious levels. This exceptional

unmatched cables, and connections to multiple performance improves further when operating at

devices can easily cause this value to be exceeded. lower frequencies.

Always consider this effect carefully, and add the

recommended series resistor as close as possible to Noise Performance

the OPA2673 output pin (see the Board Layout Wideband current-feedback op amps generally have

Guidelines section). a higher output noise than comparable

voltage-feedback op amps. The OPA2673 offers an

Distortion Performance excellent balance between voltage and current noise

The OPA2673 provides good distortion performance terms to achieve low output noise. The inverting

into a 100Ωload on ±6V supplies. Generally, until the current noise (35pA/√Hz) is lower than earlier

fundamental signal reaches very high frequency or solutions, whereas the input voltage noise

power levels, the second harmonic dominates the (2.4nV/√Hz) is lower than most unity-gain stable,

distortion with a negligible third harmonic component. wideband voltage-feedback op amps. This low input

Focusing then on the second harmonic, increasing voltage noise is achieved at the price of higher

the load impedance improves distortion directly. noninverting input current noise (5.2pA/√Hz). As long

Remember that the total load includes the feedback as the ac source impedance from the noninverting

network—in the noninverting configuration (see node is less than 100Ω, this current noise does not

Figure 76), this network is the sum of RF+ RG; in the contribute significantly to the total output noise. The

inverting configuration, it is RF. Also, providing an op amp input voltage noise and the two input current

additional supply decoupling capacitor (0.01mF) noise terms combine to give low output noise under a

between the supply pins (for bipolar operation) wide variety of operating conditions. Figure 84 shows

improves the second-order distortion slightly (3dB to the op amp noise analysis model with all noise terms

6dB). included. In this model, all noise terms are taken to

be noise voltage or current density terms in either

In most op amps, increasing the output voltage swing nV/√Hz or pA/√Hz.

directly increases harmonic distortion. The Typical

Characteristics show the second harmonic increasing The total output spot noise voltage can be computed

at a little less than the expected 2x rate, whereas the as the square root of the sum of all squared output

third harmonic increases at a little less than the noise voltage contributors. Equation 16 shows the

expected 3x rate. Where the test power doubles, the general form for the output noise voltage using the

difference between it and the second harmonic terms given in Figure 84.

decreases less than the expected 6dB, while the

difference between it and the third harmonic

decreases by less than the expected 12dB. This (16)

factor also shows up in the two-tone, third-order

intermodulation spurious (IM3) response curves. The

third-order spurious levels are extremely low at

low-output power levels. The output stage continues

to hold them low even as the fundamental power

reaches very high levels. As the Typical

Characteristics show, the spurious intermodulation

powers do not increase as predicted by a traditional

intercept model. As the fundamental power level

increases, the dynamic range does not decrease

significantly. For two tones centered at 40MHz, with

10dBm/tone into a matched 50Ωload (that is, 2VPP

for each tone at the load, which requires 8VPP for the

overall two-tone envelope at the output pin), the

Figure 84. Op Amp Noise Analysis Model

Product Folder Link(s): OPA2673

E =

IE +(I xR ) +4kTR

NI BN S S +(I xR ) +4kTR

BI F F

2 2 2

NG2

Driver

ERS

Ö4kTRS

Ö4kTRF

ERS

Ö4kTRS

Ö4kTRG

Ö4kTRF

G =1+

2 R´F

E =

2E +(I R ) +4kTR

N N S S

2 2

2 G´D´

2+2(I R ) +2(4kTR G )

I F F D

E =

IE +(I R ) +4kTR

N N S S

2 2 4kTRF

+22 ´+2 II

V = (NG V ) (I R /2 NG) (I R )

whereNG=noninvertingsignalgain

± ´ ± ´ ´ ± ´

IO(MAX) BN S BI F

= (4 7mV)+(25 A 25 4) (402 48 A)

= 28mV 2.5mV 19.3mV

V = 49.8mV(maxat+25 C)

± ´ m ´ W ´ ± W ´ m

± ± ±

± °

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

Dividing this expression by the noise gain [NG = (1 +

RF/RG)] gives the equivalent input-referred spot noise

voltage at the noninverting input, as shown in

Equation 17.

(17)

Evaluating these two equations for the OPA2673

circuit and component values of Figure 76 gives a

total output spot noise voltage of 18nV/√Hz and a

total equivalent input spot noise voltage of 4.5nV/√Hz.

This total input-referred spot noise voltage is higher

than the 2.4nV/√Hz specification for the op amp

voltage noise alone. This result reflects the noise

added to the output by the inverting current noise

times the feedback resistor. If the feedback resistor is

reduced in high-gain configurations (as suggested

previously), the total input-referred voltage noise

given by Equation 17 approaches only the 2.4nV/√Hz

of the op amp. For example, going to a gain of +8V/V

using RF= 250Ωgives a total input-referred noise of

2.8nV/√Hz.

Differential Noise Performance

Because the OPA2673 is used as a differential driver

in PLC applications, it is important to analyze the

noise in such a configuration. See Figure 85 for the Figure 85. Differential Op Amp Noise Analysis

op amp noise model for the differential configuration. Model

As a reminder, the differential gain is expressed as:

DC Accuracy and Offset Control

(18) A current-feedback op amp such as the OPA2673

provides exceptional bandwidth in high gains, giving

The output noise voltage can be expressed as shown fast pulse settling but only moderate dc accuracy.

below: The Electrical Characteristics show an input offset

voltage comparable to high-speed, voltage-feedback

amplifiers; however, the two input bias currents are

(19) somewhat higher and are unmatched. While bias

Dividing this expression by the differential noise gain, current cancellation techniques are very effective with

GD= (1 + 2RF/RG), gives the equivalent input-referred most voltage-feedback op amps, they do not

spot noise voltage at the noninverting input, as shown generally reduce the output dc offset for wideband

in Equation 20. current-feedback op amps. Because the two input

bias currents are unrelated in both magnitude and

polarity, matching the input source impedance to

reduce error contribution to the output is ineffective.

Evaluating the configuration of Figure 76, using a

(20) worst-case +25°C input offset voltage and the two

Evaluating this equation for the OPA2673 circuit and input bias currents, gives a worst-case output offset

component values shown on the front page gives a range equal to:

total output spot noise voltage of 72.3nV/√Hz and a

total equivalent input spot noise voltage of

18.4nV/√Hz.

In order to minimize the noise contributed by IN, it is

recommended to keep the noninverting source

impedance as low as possible. (21)

Product Folder Link(s): OPA2673

+VS

A0orA1

1.4V

Control

GND

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

Power Control Operation The shutdown feature for the OPA2673 is a

ground-supply referenced, current-controlled

The OPA2673 provides a power control feature that interface. For voltage output logic interfaces, the

may be used to reduce system power. The four on/off voltage levels described in the Electrical

modes of operation for this power control feature are Characteristics apply only for either the ground pin

100% bias, 75% bias, 50% bias, and power RGV package or the –VSpin used for the

shutdown. These four operating modes are set single-supply specifications.

through two logic lines A0 and A1. Table 3 shows the

different modes of operation. THERMAL ANALYSIS

Table 3. Operating Modes As a result of the high output power capability of the

OPA2673, heat-sinking or forced airflow may be

MODE OF required under extreme operating conditions. The

OPERATION A1 A0 maximum desired junction temperature sets the

100% bias 0 0 maximum allowed internal power dissipation,

75% bias 0 1 described below. In no case should the maximum

50% bias 1 0 junction temperature be allowed to exceed +150°C.

Shutdown 1 1 Operating junction temperature (TJ) is given by TA+

PD×qJA. The total internal power dissipation (PD) is

The 100% bias mode is used for normal operating the sum of quiescent power (PDQ) and additional

conditions. The 75% bias mode brings the quiescent power dissipation in the output stage (PDL) to deliver

power to 24mA. The 50% bias mode brings the load power. Quiescent power is the specified no-load

quiescent power to 16mA. The shutdown mode has a supply current times the total supply voltage across

high output impedance as well as the lowest the part. PDL depends on the required output signal

quiescent power (5.5mA). and load; for a grounded resistive load, however, PDL

If the A0 and A1 pins are left unconnected, the is at a maximum when the output is fixed at a voltage

OPA2673 operates normally (100% bias). equal to 1/2 of either supply voltage (for equal bipolar

supplies). Under this condition, PDL = VS2/(4 × RL),

To change the power mode, the control pins (either where RLincludes feedback network loading.

A0 or A1) must be asserted low. This logic control is

referenced to the ground supply, as shown in the Note that it is the power in the output stage and not

simplified circuit of Figure 86.into the load that determines internal power

dissipation.

As a worst-case example, compute the maximum TJ

using an OPA2673 QFN-16 in the circuit of Figure 76

operating at the maximum specified ambient

temperature of +85°C with both outputs driving a

grounded 20Ωload to +2.5V.

PD= 12V × 32mA + 2 × [52/(4 × [20Ω535Ω])]

= 1.03W

Maximum TJ= +85°C + (1.03 × 45°C/W) = 131°C

Although this value is still well below the specified

maximum junction temperature, system, reliability

considerations may require lower tested junction

temperatures.The highest possible internal dissipation

occurs if the load requires current to be forced into

Figure 86. Supply Power Control Circuit the output for positive output voltages, or sourced

from the output for negative output voltages. This

space condition puts a high current through a large internal

drop in the output transistors. The output V-I plot in

space the Typical Characteristics (Figure 6) includes a

boundary for 2W maximum internal power dissipation

under these conditions.

Product Folder Link(s): OPA2673

OPA2673

www.ti.com

SBOS382F –JUNE 2008–REVISED MAY 2010

BOARD LAYOUT GUIDELINES peaked frequency response. The 402Ωfeedback

resistor used in the Typical Characteristics at a gain

Achieving optimum performance with a of +4V/V on ±6V supplies is a good starting point for

high-frequency amplifier such as the OPA2673 design. Note that a 511Ωfeedback resistor, rather

requires careful attention to board layout parasitic and than a direct short, is recommended for the unity-gain

external component types. Recommendations that follower application. A current-feedback op amp

optimize performance include: requires a feedback resistor even in the unity-gain

follower configuration to control stability.

a) Minimize parasitic capacitance to any ac ground

for all of the signal I/O pins. Parasitic capacitance on d) Connections to other wideband devices on the

the output and inverting input pins can cause board may be made with short direct traces or

instability; on the noninverting input, it can react with through onboard transmission lines. For short

the source impedance to cause unintentional band connections, consider the trace and the input to the

limiting. To reduce unwanted capacitance, a window next device as a lumped capacitive load. Relatively

around the signal I/O pins should be opened in all of wide traces (50mils to 100mils, or 1,27mm to

the ground and power planes around those pins. 2,54mm) should be used, preferably with ground and

Otherwise, ground and power planes should be power planes opened up around them. Estimate the

unbroken elsewhere on the board. total capacitive load and set RSfrom the plot of

Differential RSvs Capacitive Load (Figure 27). Low

b) Minimize the distance (< 0.25in, or 6,350mm) parasitic capacitive loads (< 5pF) may not need an

from the power-supply pins to high-frequency 0.1mFRSbecause the OPA2673 is nominally compensated

decoupling capacitors. At the device pins, the ground to operate with a 2pF parasitic load. If a long trace is

and power-plane layout should not be in close required, and the 6dB signal loss intrinsic to a

proximity to the signal I/O pins. Avoid narrow power doubly-terminated transmission line is acceptable,

and ground traces to minimize inductance between implement a matched impedance transmission line

the pins and the decoupling capacitors. The using microstrip or stripline techniques (consult an

power-supply connections (on pins 7 and 14 for a ECL design handbook for microstrip and stripline

QFN package) should always be decoupled with layout techniques). A 50Ωenvironment is normally

these capacitors. An optional supply decoupling not necessary onboard. In fact, a higher impedance

capacitor across the two power supplies (for bipolar environment improves distortion; see the distortion

operation) improves second-harmonic distortion versus load plots. With a characteristic board trace

performance. Larger (2.2mF to 6.8mF) decoupling impedance defined based on board material and

capacitors, effective at a lower frequency, should also trace dimensions, a matching series resistor into the

be used on the main supply pins. These can be trace from the output of the OPA2673 is used, as well

placed somewhat farther from the device and may be as a terminating shunt resistor at the input of the

shared among several devices in the same area of destination device. Remember also that the

the PCB. terminating impedance is the parallel combination of

c) Careful selection and placement of external the shunt resistor and the input impedance of the

components preserve the high-frequency destination device.

performance of the OPA2673. Resistors should be This total effective impedance should be set to match

of a very low reactance type. Surface-mount resistors the trace impedance. The high output voltage and

work best and allow a tighter overall layout. Metal film current capability of the OPA2673 allows multiple

and carbon composition axially-leaded resistors can destination devices to be handled as separate

also provide good high-frequency performance. transmission lines, each with respective series and

Again, keep the leads and PCB trace length as short shunt terminations. If the 6dB attenuation of a

as possible. Never use wire-wound type resistors in a doubly-terminated transmission line is unacceptable,

high-frequency application. Although the output pin a long trace can be series-terminated at the source

and inverting input pin are the most sensitive to end only. Treat the trace as a capacitive load in this

parasitic capacitance, always position the feedback case, and set the series resistor value as shown in

and series output resistor, if any, as close as possible the plot of Differential RSvs Capacitive Load

to the output pin. Other network components, such as (Figure 27). However, this approach does not

noninverting input termination resistors, should also preserve signal integrity as well as a

be placed close to the package. Where double-side doubly-terminated line. If the input impedance of the

component mounting is allowed, place the feedback destination device is low, there is some signal

resistor directly under the package on the other side attenuation because of the voltage divider formed by

of the board between the output and inverting input the series output into the terminating impedance.

pins. The frequency response is primarily determined

by the feedback resistor value as described

previously. Increasing the value reduces the

bandwidth, whereas decreasing it gives a more

Product Folder Link(s): OPA2673

External

+VCC

-VCC

Internal

Circuitry

OPA2673

SBOS382F –JUNE 2008–REVISED MAY 2010

www.ti.com

e) Socketing a high-speed part such as the These diodes provide moderate protection to input

OPA2673 is not recommended. The additional lead overdrive voltages above the supplies as well. The

length and pin-to-pin capacitance introduced by the protection diodes can typically support 30mA

socket can create an extremely troublesome parasitic continuous current. Where higher currents are

network, which can make it almost impossible to possible (for example, in systems with ±15V supply

achieve a smooth, stable frequency response. Best parts driving into the OPA2673), current-limiting

results are obtained by soldering the OPA2673 series resistors should be added into the two inputs.

directly onto the board. Keep these resistor values as low as possible,

because high values degrade both noise performance

and frequency response.

INPUT AND ESD PROTECTION

The OPA2673 is built using a high-speed

complementary bipolar process. The internal junction

breakdown voltages are relatively low for these very

small geometry devices and are reflected in the

Absolute Maximum Ratings table. All device pins

have limited ESD protection using internal diodes to

the power supplies, as shown in Figure 87.

Figure 87. ESD Steering Diodes

empty for space

empty for space REVISION HISTORY

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (April, 2010) to Revision F Page

• Added minimum operating voltage (single supply) parameter ............................................................................................. 5

Changes from Revision D (January, 2010) to Revision E Page

• Revised Absolute Maximum Ratings table; deleted lead temperature specification, changed storage temperature

range from –40°C to –65°C .................................................................................................................................................. 2

Product Folder Link(s): OPA2673

PACKAGING INFORMATION

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

OPA2673IRGVR ACTIVE VQFN RGV 16 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA2673IRGVRG4 ACTIVE VQFN RGV 16 2500 Green (RoHS &

no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA2673IRGVT ACTIVE VQFN RGV 16 250 Green (RoHS &

no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

OPA2673IRGVTG4 ACTIVE VQFN RGV 16 250 Green (RoHS &

no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com 5-May-2010

Addendum-Page 1

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

OPA2673IRGVR VQFN RGV 16 2500 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2

OPA2673IRGVT VQFN RGV 16 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

OPA2673IRGVR VQFN RGV 16 2500 367.0 367.0 35.0

OPA2673IRGVT VQFN RGV 16 250 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 2

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