1
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
SP3239E
Intelligent +3.0V to +5.5V RS-232 Transceivers
The SP3239E device is an RS-232 transceiver solution intended for portable or hand-held
applications such as notebook and palmtop computers. The SP3239E uses an internal
high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V
operation. This charge pump and Sipex's driver architecture allow the SP3239E device to
deliver compliant RS-232 performance from a single power supply ranging from +3.0V to
+5.5V. The SP3239E is a 5-driver/3-receiver device, ideal for laptop/notebook computer and
PDA applications. The SP3239E includes one complementary receiver that remains alert to
monitor an external device's Ring Indicate signal while the device is shutdown.
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■ Minimum 250Kbps data rate under load
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ Enhanced ESD Specifications:
+15KV Human Body Model
+15KV IEC1000-4-2 Air Discharge
+8KV IEC1000-4-2 Contact Discharge
DESCRIPTION
SELECTION TABLE
Applicable U.S. Patents - 5,306,954; and other patents pending.
®
Part Power RS-232 RS-232 External AUTO ON-LINE™ TTL Number
Number Supplies Drivers Receivers Components Circuitry 3-State of Pins
SP3223E +3.0V to +5.5V 2 2 4 capacitors YES YES 20
SP3243E +3.0V to +5.5V 3 5 4 capacitors YES YES 28
SP3238E +3.0V to +5.5V 5 3 4 capacitors YES YES 28
SP3239E +3.0V to +5.5V 5 3 4 capacitors NO YES 28
SP3249E +3.0V to +5.5V 5 3 4 capacitors NO NO 24
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
2
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
|V+| + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, SHUTDOWN, ...........................-0.3V to +6.0V
RxIN...................................................................+25V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT,......................................-0.3V to (VCC + 0.3V)
Short-Circuit Duration
TxOUT.....................................................Continuous
Storage Temperature......................-65°C to +150°C
Power Dissipation per package
28-pin SSOP
(derate 11.2mW/oC above +70oC).................900mW
28-pin TSSOP
(derate 13.2mW/oC above +70oC)...............1100mW
SPECIFICATIONS
VCC = +3.0 to +5.5, C1 -C4 = 0.1µF (tested at 3.3V + 5%), C1-C4 = 0.22µF (tested at 3.3V + 10%), C1 = 0.047µF, and C2-C4 = 0.33µF (tested at 5.0V
+ 10%), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
Note 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
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SCITSIRETCARAHCCD nwodtuhS,tnerruCylppuS 0.101µADNG=NWODTUHS VroDNG=NIxT
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STUPTUOREVIECERDNASTUPNICIGOL
dlohserhTcigoLtupnI
4.2 8.0V
V
CC
,NIxT,V0.5+roV3.3+= NWODTUHS
tnerruCegakaeLtupnI+
10.0+0.1 µANWODTUHS,NIxT
T
A
C°52=
tnerruCegakaeLtuptuO+
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3
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
SPECIFICATIONS
VCC = +3.0 to +5.5, C1 -C4 = 0.1µF (tested at 3.3V + 5%), C1-C4 = 0.22µF (tested at 3.3V + 10%), C1 = 0.047µF, and C2-C4 = 0.33µF (tested at 5.0V
+ 10%), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DRIVER OUTPUTS
Output Voltage Swing ±5.0 ±5.4 V All driver outputs loaded with 3KΩ
to GND
Output Resistance 300 ΩVCC = V+ = V- = 0V, VOUT = ±2V
Output Short-Circuit Current ±35 ±60 mA VOUT = GND
RECEIVER INPUTS
Input Voltage Range -25 25 V
Input Threshold LOW 0.6 1.2 V VCC = 3.3V
Input Threshold LOW 0.8 1.5 V VCC = 5.0V
Input Threshold HIGH 1.5 2.4 V VCC = 3.3V
Input Threshold HIGH 1.8 2.4 V VCC = 5.0V
Input Hysteresis 0.5 V
Input Resistance 3 5 7 kΩ
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
4
SPECIFICATIONS
VCC = +3.0 to +5.5, C1 -C4 = 0.1µF (tested at 3.3V + 5%), C1-C4 = 0.22µF (tested at 3.3V + 10%), C1 = 0.047µF, and C2-C4 = 0.33µF (tested at 5.0V
+ 10%), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
RETEMARAP.NIM.PYT.XAMSTINUSNOITIDNOC
SCITSIRETCARAHCGNIMIT
etaRataDmumixaM052spbkR
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wekSrevirD001sntI
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rate, all drivers loaded with 3kΩ, 0.1µF charge
pump capacitors, and TAMB = +25°C.
TRANSMITTER OUTPUT vs. LOAD CAPACITANCE
-6
-4
-2
0
2
4
6
0 1000 2000 3000 4000 5000
pF
VOH
VOL
SLEW RATE vs. LOAD CAPACITANCE
0
5
10
15
20
25
0 1000 2000 3000 4000 5000
pF
POS. SR
NEG SR
Figure 3. Supply Current vs. Load Capacitance when
Transmitting Data
SUPPLY CURRENT vs LOAD CAPACITANCE
0
10
20
30
40
50
60
0 1000 2000 3000 4000 5000
pF
250Kbps
120Kbps
20Kbps
Figure 1. Transmitter Output vs. Load Capacitance Figure 2. Slew Rate vs. Load Capacitance
5
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
Table 1. Device Pin Description
PIN DESCRIPTION
EMANNOITCNUF NIP .ON.ON .ON .ON.ON
+2C.roticapacpmup-egrahcgnitrevniehtfolanimretevitisoP 1
DNG.dnuorG 2
-2C.roticapacpmup-egrahcgnitrevniehtfolanimretevitageN 3
-V.pmupegrahcehtybdetarenegtuptuoV5.5-detalugeR 4
T
1
TUO.tuptuorevird232-SR 5
T
2
TUO.tuptuorevird232-SR 6
T
3
TUO.tuptuorevird232-SR 7
R
1
NI.tupnireviecer232-SR 8
R
2
NI.tupnireviecer232-SR 9
T
4
TUO.tuptuorevird232-SR 01
R
3
NI.tupnireviecer232-SR 11
T
5
TUO.tuptuorevird232-SR 21
CN.tcennocoN 31
NWODTUHS.pmupegrahcdnasrevirdnwodtuhsotWOLcigolylppA 41
CN.noitarepolamronrofHGIHeitrotcennocoN 51
R
1
TUO.nwodtuhsnievitca,tuptuo1-reviecergnitrevni-noN 61
T
5
NI.tupnirevirdSOMC/LTT 71
R
3
TUO.tuptuoreviecerSOMC/LTT 81
T
4
NI.tupnirevirdSOMC/LTT 91
R
2
TUO.tuptuoreviecerSOMC/LTT 02
R
1
TUO.tuptuoreviecerSOMC/LTT 12
T
3
NI.tupnirevirdSOMC/LTT 22
T
2
NI.tupnirevirdSOMC/LTT 32
T
1
NI.tupnirevirdSOMC/LTT 42
-1C .roticapacpmup-egrahcrelbuodegatlovehtfolanimretevitageN 52
V
CC
.egatlovylppusV5.5+otV0.3+ 62
+V.pmupegrahcehtybdetarenegtuptuoV5.5+detalugeR 72
+1C .roticapacpmup-egrahcrelbuodegatlovehtfolanimretevitisoP 82
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
6
Figure 5. SP3239E Typical Operating Circuit
Figure 4. SP3239E Pinout Configuration
T4IN
1
2
3
425
26
27
28
5
6
7
24
23
22
SHUTDOWN
C2-
V-
R1IN
R2IN
R3IN
NC
C2+
C1-
GND
V
CC
V+
T1IN
8
9
10
11 18
19
20
21
12
13
14
17
16
15
T1OUT
T2OUT
T3OUT T3IN
T2IN
T5IN
R3OUT
R2OUT
R1OUT
R1OUT
SP3239E
C1+
T4OUT
T5OUT
NC
SP3239E
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
14
V
CC
V
CC
2
SHUTDOWN
5kΩ
5kΩ
5kΩ
16
21
20
18
8
9
11
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R
1
OUT R
1
IN
R
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
24
23
22
5
6
7RS-232
OUTPUTS
TTL/CMOS
INPUTS
T
1
IN
T
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
19
17
10
12
T
4
OUT
T
4
IN
T
5
IN T
5
OUT
7
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
DESCRIPTION
The SP3239E device meets the EIA/TIA-232 and
ITU-T V.28/V.24 communication protocols and
can be implemented in battery-powered, por-
table, or hand-held applications such as
notebook or palmtop computers. The SP3239E
device features Sipex's proprietary and patented
(U.S. #5,306,954) on-board charge pump
circuitry that generates ±5.5V RS-232 voltage
levels from a single +3.0V to +5.5V power
supply. The SP3239E device can operate at
a data rate of 250kbps fully loaded.
The SP3239E is a 5-driver/3-receiver device,
ideal for portable or hand-held applications.
The SP3239E includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
The SP3238E device is an ideal choice for
power sensitive designs.
THEORY OF OPERATION
The SP3239E device is made up of three basic
circuit blocks: 1. Drivers, 2. Receivers, and
3. the Sipex proprietary charge pump.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232F and all
previous RS-232 versions. Unused driver inputs
should be connected to VCC or GND.
The drivers can guarantee a data
rate of 250kbps fully loaded with 3kΩ in
parallel with 1000pF, ensuring compatibility
with PC-to-PC communication software.
The slew rate of the driver output is internally
limited to a maximum of 30V/µs in order to
meet the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded
output from HIGH to LOW also meets the
monotonicity requirements of the standard.
Figure 7 shows a loopback test circuit used to test
the RS-232 Drivers. Figure 8 shows the test
results of the loopback circuit with all five driv-
ers active at 120kbps with typical RS-232 loads
in parallel with 1000pF capacitors. Figure 6 shows
the test results where one driver was active at
250kbps and all five drivers loaded with an RS-
232 receiver in parallel with a 1000pF capacitor.
A solid RS-232 data transmission rate of 120kbps
provides compatibility with many designs in
personal computer peripherals and LAN appli-
cations.
Figure 6. Interface Circuitry Controlled by
Microprocessor Supervisory Circuit
SP3239E
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
14
V
CC
2
SHUTDOWN
µP
Supervisor
IC
V
CC
VIN
RESET
5kΩ
5kΩ
5kΩ
24
23
22
16
21
20
18
5
6
7
8
9
11
RS-232
OUTPUTS
RS-232
INPUTS
T1IN
R1OUT R1IN
T2OUT
R1OUT
T2IN
T3IN T3OUT
T1OUT
R2IN
R3IN
R2OUT
R3OUT
UART
or
Serial µC
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RI
19
17
10
12
T4OUT
T4IN
T5IN T5OUT
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
8
Receivers
The receivers convert ±5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels.
The truth table logic of the driver and receiver
outputs can be found in Table 2.
The SP3239E includes an additional non-
inverting receiver with an output R1OUT.
R1OUT is an extra output that remains active and
monitors activity while the other receiver outputs
are forced into high impedance. This allows
Ring Indicator (RI) from a peripheral to be
monitored without forward biasing the TTL/
CMOS inputs of the other devices connected to
the receiver outputs.
Since receiver input is usually from a transmission
line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 500mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5kΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Figure 7. Loopback Test Circuit for RS-232 Driver Data
Transmission Rates
Charge Pump
The charge pump is a Sipex–patented design
(U.S. #5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
Figure 8. Loopback Test Circuit Result at 120kbps
(All Drivers Fully Loaded) Figure 9. Loopback Test Circuit result at 250kbps
(All Drivers Fully Loaded)
SP3239E
TxIN TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1µF
0.1µF
LOGIC
INPUTS
V
CC
5kΩ
RxIN
RxOUT
LOGIC
OUTPUTS
SHUTDOWN
GND
V
CC
1000pF
9
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
provides output voltages 5.5V regardless of the
input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. This oscillator controls the four phases
of the voltage shifting (Figure 12). A descrip-
tion of each phase follows.
Phase 1 (Figure 10)
— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to VCC. Cl+ is
then switched to GND and the charge in C1– is
transferred to C2–. Since C2+ is connected to
VCC, the voltage potential across capacitor C2 is
now 2 times VCC.
Phase 2 (Figure 11)
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to
GND.
Phase 3 (Figure 13)
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at VCC, the
voltage potential across C2 is 2 times VCC.
Phase 4 (Figure 14)
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 500kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
10
Figure 11. Charge Pump — Phase 2
V
CC
= +5V
–10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
–
–
––
V
CC
= +5V
–5V –5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
–
–
––
Figure 10. Charge Pump — Phase 1
Figure 12. Charge Pump Waveforms
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V
2
1T
T[]
T
2
+6V
a) C
2+
b) C
2
-
-6V
0V
0V
Figure 13. Charge Pump — Phase 3
V
CC
= +5V
–5V
+5V
–5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
–
–
––
Figure 14. Charge Pump — Phase 4
VCC = +5V
+10V
VSS Storage Capacitor
VDD Storage Capacitor
C1C2
C3
C4
+
+
++
–
–
––
11
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
Figure 15. Circuit for the connectivity of the SP3239E with a DB-9 connector
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
6
7
8
9
1
2
3
4
5
DB-9
Connector
26
V
CC
0.1µF
C5
+
0.1µF
0.1µF
V
CC
GND
2
8
9
11
5kΩ
5kΩ
5kΩ
16
21
20
18
5
6
7
R
1
OUT R
1
IN
R
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
10
12
24
23
22
T
1
IN
T
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
19
17
T
4
OUT
T
4
IN
T
5
IN T
5
OUT
SP3239E
28
25
3
1
27
4
C3
C4
+
+
C1+
C1-
C2+
C2-
V+
V-
0.1µF
0.1µF
+
C2
C1 +
14
V
CC
SHUTDOWN
Table 2. Shutdown Logic
NWODTUHS TUPNITUPNI TUPNI TUPNITUPNI TALANGIS232-SR TUPNIREVIECERTUPNIREVIECER TUPNIREVIECER TUPNIREVIECERTUPNIREVIECER T
X
TUOR
X
TUOR
1
TUO REVIECSNART SUTATSSUTATS SUTATS SUTATSSUTATS
HGIHSEYevitcAevitcAevitcA lamroN noitarepO
WOLSEYZ-hgiHZ-hgiHevitcAnwodtuhS
WOLONZ-hgiHZ-hgiHevitcAnwodtuhS
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
12
ESD TOLERANCE
The SP3239E device incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications
and environments sensitive to electrostatic
discharges and associated transients. The
improved ESD tolerance is at least +15kV
without damage nor latch-up.
There are different methods of ESD testing
applied: a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 16. This method will test the
IC’s capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
with IEC1000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipment that are accessible to personnel during
normal usage. The transceiver IC receives most
of the ESD current when the ESD source is
applied to the connector pins. The test circuit for
IEC1000-4-2 is shown on Figure 20. There are
two methods within IEC1000-4-2, the Air
Discharge method and the Contact Discharge
method.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
through air. This simulates an electrically charged
person ready to connect a cable onto the rear of
the system only to find an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the system.
This energy, whether discharged directly or
through air, is predominantly a function of the
discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be directly
discharged to the equipment from a person already
holding the equipment. The current is transferred
on to the keypad or the serial port of the equipment
directly and then travels through the PCB and finally
to the IC.
Figure 16. ESD Test Circuit for Human Body Model
R
C
C
S
R
S
SW1 SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
13
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
DEVICE PIN HUMAN BODY IEC1000-4-2
TESTED MODEL Air Discharge Direct Contact Level
Driver Outputs ±15kV ±15kV ±8kV 4
Receiver Inputs ±15kV ±15kV ±8kV 4
The circuit model in Figures 16 and 17 represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kW an 100pF, respectively. For IEC-1000-4-
2, the current limiting resistor (RS) and the source
capacitor (CS) are 330W an 150pF, respectively.
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the test
point.
Figure 18. ESD Test Waveform for IEC1000-4-2
t=0ns t=30ns
0A
15A
30A
t ➙
i ➙
Figure 17. ESD Test Circuit for IEC1000-4-2
Table 3. Transceiver ESD Tolerance Levels
R
S
and
R
V
add up to 330Ω for IEC1000-4-2.
R
S
and
R
V
add up to 330Ω for IEC1000-4-2.
Contact-Discharge Module
R
V
R
C
C
S
R
S
SW1 SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
V
Contact-Discharge Module
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
14
D
EH
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
Ø
L
Be
A
A1
B
D
E
e
H
L
Ø
28–PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0°/8°
(0°/8°)
15
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
Gage
Plane
1.0 OIA
e
0.169 (4.30)
0.177 (4.50)
0.252 BSC (6.4 BSC)
0’-8’12’REF
0.039 (1.0)
e/2
0.039 (1.0)
0.126 BSC (3.2 BSC)
D
0.007 (0.19)
0.012 (0.30)
0.033 (0.85)
0.037 (0.95)
0.002 (0.05)
0.006 (0.15)
0.043 (1.10) Max
(θ3)
1.0 REF
0.020 (0.50)
0.026 (0.75) (θ1)
0.004 (0.09) Min
0.004 (0.09) Min
0.010 (0.25)
(θ2)
0.008 (0.20)
DIMENSIONS
in inches (mm)
Minimum/Maximum
Symbol 28 Lead
D 0.378/0.386
(9.60/9.80)
e 0.026 BSC
(0.65 BSC)
PACKAGE: PLASTIC THIN SMALL
OUTLINE (TSSOP)
Rev.4/08/02 SP3239E Intelligent +3.0V to +5.5V RS-232 Transceivers © Copyright 2002 Sipex Corporation
16
Model Temperature Range Package Types
SP3239ECA 0°C to +70°C 28-pin SSOP
SP3239ECY 0°C to +70°C 28-pin TSSOP
SP3239EEA -40°C to +85°C 28-pin SSOP
SP3239EEY -40°C to +85°C 28-pin TSSOP
○○○○○○○○○○○○○○○ ○○○○○○○○○○○○○○○
○○○○○○○○○○○○○○
○○○○○○○○○○○○○○
○○○○○○○○○○○○○○
○○○○○○○○○○○○○○○
○○○ ○○○○○○○○○○○○
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ORDERING INFORMATION
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600