The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 D Package Options Include Plastic D Dependable Texas Instrument Quality and Reliability 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1A 2Y 2A 1 14 2 13 3 12 VCC 3A 3Y 4A 4 11 5 10 6 9 7 8 1Y 6A 6Y GND 5Y 5A 4Y SN54LS05, SN54S05 . . . FK PACKAGE (TOP VIEW) 1Y 1A NC VCC 6A SN5405, SN54LS05, SN54S05 . . . J PACKAGE SN7405 . . . N PACKAGE SN74LS05 . . . D, DB, N, OR NS PACKAGE SN74S05 . . . D, N, OR NS PACKAGE SN54LS05, SN54S05 . . . W PACKAGE (TOP VIEW) (TOP VIEW) 2A NC 2Y NC 3A 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 6Y NC 5A NC 5Y 3Y GND NC 4Y 4A Small-Outline (D, NS), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs NC - No internal connection description/ordering information These devices contain six independent inverters. To perform correctly, the open-collector outputs require pullup resistors. These devices may be connected to other open-collector outputs to implement active-low wired-OR or active-high wire-AND functions. Open-collector devices often are used to generate high VOH levels. ORDERING INFORMATION PDIP - N 0C to 70C -55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - D Tube SN7405N SN74LS05N SN74LS05N SN74S05N SN74S05N SN74LS05D Tape and reel SN74LS05DR Tube SN74S05D Tape and reel SN74S05DR Tape and reel SSOP - DB Tape and reel CDIP - J Tube CDIP - W Tube LCCC - FK SN7405N Tube SOP - NS Tube TOP-SIDE MARKING LS05 S05 SN74LS05NSR 74LS05 SN74S05NSR 74S05 SN74LS05DBR LS05 SNJ54LS05J SNJ54LS05J SNJ54S05J SNJ54S05J SNJ54LS05W SNJ54LS05W SNJ54S05W SNJ54S05W SNJ54LS05FK SNJ54LS05FK SNJ54S05FK SNJ54S05FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated ! "#$ ! %#&'" ($) (#"! " !%$""! %$ *$ $! $+! !#$! !(( ,-) (#" %"$!!. ($! $"$!!'- "'#($ $!. '' %$$!) %(#"! "%' / 0121 '' %$$! $ $!$( #'$!! *$,!$ $() '' *$ %(#"! %(#" %"$!!. ($! $"$!!'- "'#($ $!. '' %$$!) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 FUNCTION TABLE (each inverter) INPUT A OUTPUT Y H L L H logic diagram (positive logic) 1A 1 2 1Y 2A 3 4 2Y 3A 5 6 3Y 4A 9 8 4Y 5A 11 10 5Y 6A 13 12 6Y Y=A Pin numbers shown are for the D, DB, J, N, and NS packages. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 schematic (each inverter) '05 'LS05 VCC 4 k VCC 1.6 k 8 k 20 k Input A Input A Output Y 1 k Output Y 4.5 k GND GND 'S05 VCC 2.8 k 900 Input A Output Y 250 500 Resistor values shown are nominal. absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage, VCC (see Note 1): '05, 'LS05, 'S05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: '05, 'S05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V 'LS05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Off-state output voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Voltage values are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 recommended operating conditions SN5405 SN7405 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 0.8 High-level output voltage 5.5 5.5 V IOL TA Low-level output current 16 16 mA 70 C High-level input voltage 2 Operating free-air temperature 2 -55 125 V V 0 V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS PARAMETER VIK VCC = MIN, MIN SN5405 TYP MAX II = -12 mA IOH VCC = MIN, VOH = 5.5 V VOL II VCC = MIN, VCC = MAX, VIH = 2 V, VI = 5.5 V IIH IIL VCC = MAX, VCC = MAX, VI = 2.4 V VI = 0.4 V ICCH ICCL VCC = MAX, VCC = MAX, VI = 0 V VI = 4.5 V MIN SN7405 TYP -1.5 VIL = 0.8 V VIL = 0.7 V MAX -1.5 UNIT V 0.25 mA 0.25 IOL = 16 mA 0.2 0.4 0.2 0.4 V 1 1 mA 40 40 A -1.6 -1.6 mA 6 12 mA 18 33 18 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC = 5 V, TA = 25C. 33 mA 6 12 switching characteristics, VCC = 5 V, TA = 25C (see Figure 1) PARAMETER tPLH tPHL 4 FROM (INPUT) TO (OUTPUT) A Y POST OFFICE BOX 655303 TEST CONDITIONS RL = 4 k RL = 400 * DALLAS, TEXAS 75265 CL = 15 pF MIN TYP MAX 40 55 8 15 UNIT ns The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 recommended operating conditions SN54LS05 SN74LS05 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.7 0.8 High-level output voltage 5.5 5.5 IOL TA Low-level output current 4 8 mA 70 C High-level input voltage 2 Operating free-air temperature 2 -55 125 V V 0 V V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LS05 TYP MAX TEST CONDITIONS PARAMETER VIK IOH VCC = MIN, VCC = MIN, II = -18 mA VIL = MAX, VOL VCC = MIN, VIH = 2 V II IIH VCC = MAX, VCC = MAX, VI = 7 V VI = 2.7 V IIL ICCH VCC = MAX, VCC = MAX, VI = 0.4 V VI = 0 V MIN VOH = 5.5 V IOL = 4 mA SN74LS05 TYP MAX MIN UNIT -1.5 -1.5 V 0.1 0.1 mA 0.25 0.4 IOL = 8 mA 0.25 0.4 0.35 0.5 V 0.1 0.1 mA 20 20 A -0.4 -0.4 mA 1.2 2.4 mA ICCL VCC = MAX, VI = 4.5 V 3.6 6.6 3.6 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC = 5 V, TA = 25C. 6.6 mA 1.2 2.4 switching characteristics, VCC = 5 V, TA = 25C (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y POST OFFICE BOX 655303 TEST CONDITIONS RL = 2 k, CL = 15 pF * DALLAS, TEXAS 75265 MIN TYP MAX 17 32 15 28 UNIT ns 5 The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 recommended operating conditions SN54S05 SN74S05 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 0.8 High-level output voltage 5.5 5.5 V IOL TA Low-level output current 20 20 mA 70 C High-level input voltage 2 Operating free-air temperature 2 -55 125 V V 0 V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS PARAMETER VIK VCC = MIN, MIN SN54S05 TYP MAX II = -18 mA IOH VCC = MIN, VOH = 5.5 V VOL II VCC = MIN, VCC = MAX, VIH = 2 V, VI = 5.5 V IIH IIL VCC = MAX, VCC = MAX, VI = 2.7 V VI = 0.5 V ICCH ICCL VCC = MAX, VCC = MAX, VI = 0 V VI = 4.5 V MIN SN74S05 TYP MAX -1.2 VIL = 0.8 V VIL = 0.7 V -1.2 UNIT V 0.25 mA 0.25 IOL = 20 mA 0.5 0.5 1 1 mA 50 50 A -2 V -2 mA 9 19.8 mA 30 54 30 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC = 5 V, TA = 25C. 54 mA 9 19.8 switching characteristics, VCC = 5 V, TA = 25C (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL 6 FROM (INPUT) TO (OUTPUT) TEST CONDITIONS CL = 15 pF A Y RL = 280 * DALLAS, TEXAS 75265 TYP MAX 2 5 7.5 2 4.5 7 UNIT ns 7.5 CL = 50 pF POST OFFICE BOX 655303 MIN 7 ns The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 PARAMETER MEASUREMENT INFORMATION SERIES 54/74 AND 54S/74S DEVICES VCC RL From Output Under Test Test Point CL (see Note A) LOAD CIRCUIT 3V 1.5 V Input 1.5 V 0V tPLH High-Level Pulse 1.5 V VOH In-Phase Output 1.5 V 1.5 V 1.5 V VOL tPHL tw Low-Level Pulse tPHL 1.5 V 1.5 V tPLH VOH Out-of-Phase Output 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS PULSE WIDTHS NOTES: A. CL includes probe and jig capacitance. B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , and: For Series 54/74, tr 7 ns, tf 7 ns. For Series 54S/74S, tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 The SN5405 is obsolete and no longer is supplied. SDLS030A - DECEMBER 1983 - REVISED NOVEMBER 2003 PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES VCC RL From Output Under Test Test Point CL (see Note A) LOAD CIRCUIT 3V 1.3 V Input 1.3 V 0V tPLH High-Level Pulse 1.3 V 1.3 V 1.3 V 1.3 V tPLH VOH Out-of-Phase Output 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES CL includes probe and jig capacitance. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 1.5 ns, tf 2.6 ns. The outputs are measured one at a time with one input transition per measurement. Figure 2. Load Circuit and Voltage Waveforms 8 1.3 V VOL tPHL VOLTAGE WAVEFORMS PULSE WIDTHS NOTES: A. B. C. D. VOH In-Phase Output 1.3 V tw Low-Level Pulse tPHL POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MCFP002A - JANUARY 1995 - REVISED FEBRUARY 2002 W (R-GDFP-F14) CERAMIC DUAL FLATPACK Base and Seating Plane 0.260 (6,60) 0.235 (5,97) 0.045 (1,14) 0.026 (0,66) 0.008 (0,20) 0.004 (0,10) 0.080 (2,03) 0.045 (1,14) 0.280 (7,11) MAX 1 0.019 (0,48) 0.015 (0,38) 14 0.050 (1,27) 0.390 (9,91) 0.335 (8,51) 0.005 (0,13) MIN 4 Places 7 8 0.360 (9,14) 0.250 (6,35) 0.360 (9,14) 0.250 (6,35) 4040180-2 / C 02/02 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only. Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B - OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL MPDI002C - JANUARY 1995 - REVISED DECEMBER 20002 N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PINS SHOWN PINS ** 14 16 18 20 A MAX 0.775 (19,69) 0.775 (19,69) 0.920 (23,37) 1.060 (26,92) A MIN 0.745 (18,92) 0.745 (18,92) 0.850 (21,59) 0.940 (23,88) MS-100 VARIATION AA BB AC DIM A 16 9 0.260 (6,60) 0.240 (6,10) 1 C AD 8 0.070 (1,78) 0.045 (1,14) 0.045 (1,14) 0.030 (0,76) D D 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gauge Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.430 (10,92) MAX 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 14/18 PIN ONLY 20 pin vendor option D 4040049/E 12/2002 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A). D. The 20 pin end lead shoulder width is a vendor option, either half or full width. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSOI002B - JANUARY 1995 - REVISED SEPTEMBER 2001 D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 8 PINS SHOWN 0.020 (0,51) 0.014 (0,35) 0.050 (1,27) 8 0.010 (0,25) 5 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 1 4 0.010 (0,25) 0- 8 A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.010 (0,25) 0.004 (0,10) 0.069 (1,75) MAX PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047/E 09/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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