MC74LVX132 Quad 2-Input NAND Schmitt Trigger The MC74LVX132 is an advanced high speed CMOS Schmitt NAND trigger fabricated with silicon gate CMOS technology. Pin configuration and function are the same as the MC74LVX00, but the inputs have hysteresis. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. Features * * * * * * * * http://onsemi.com MARKING DIAGRAMS 14 SOIC-14 D SUFFIX CASE 751A 14 High Speed: tPD = 5.8 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C Power Down Protection Provided on Inputs Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V These Devices are Pb-Free and are RoHS Compliant 1 LVX132G AWLYWW 1 14 14 1 TSSOP-14 DT SUFFIX CASE 948G 1 LVX 132 ALYWG G 14 14 1 LVX132 ALYWG SOEIAJ-14 M SUFFIX CASE 965 1 LVX132 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (c) Semiconductor Components Industries, LLC, 2011 May, 2011 - Rev. 3 1 Publication Order Number: MC74LVX132/D MC74LVX132 A1 1 3 B1 A2 VCC 14 B4 13 A4 12 Y4 11 B3 10 A3 9 Y3 8 Y2 1 2 3 4 5 6 7 A1 B1 Y1 A2 B2 Y2 GND 2 4 6 B2 Y1 5 Figure 2. Pin Connection (Top View) A3 9 8 B3 A4 FUNCTION TABLE 12 11 B4 Y3 10 A Input B Input Y Output L L H H L H L H H H H L Y4 13 Figure 1. Logic Diagram ORDERING INFORMATION Package Shipping SOIC-14 (Pb-Free) 2500 Tape & Reel MC74LVX132DTG TSSOP-14* 96 Units / Rail MC74LVX132DTR2G TSSOP-14* 2500 Tape & Reel MC74LVX132MG SOEIAJ-14 (Pb-Free) 50 Units / Rail MC74LVX132MELG SOEIAJ-14 (Pb-Free) 2000 Tape & Reel Device MC74LVX132DR2G For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 2 MC74LVX132 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage *0.5 to )7.0 V VIN DC Input Voltage *0.5 to )7.0 V *0.5 to VCC )0.5 V VI < GND *20 mA VO < GND $20 mA VOUT DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IOUT DC Output Sink Current $25 mA ICC DC Supply Current per Supply Pin $50 mA *65 to )150 _C 260 _C TSTG Storage Temperature Range TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature under Bias )150 _C qJA Thermal Resistance SOIC TSSOP 250 _C/W PD Power Dissipation in Still Air at 85_C SOIC TSSOP 250 mW MSL Moisture Sensitivity FR Flammability Rating VESD ILatchup Level 1 Oxygen Index: 30% - 35% ESD Withstand Voltage Latchup Performance UL 94-V0 @ 0.125 in Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) > 2000 > 200 N/A V Above VCC and Below GND at 85_C (Note 4) $300 mA Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22-A114-A. 2. Tested to EIA/JESD22-A115-A. 3. Tested to JESD22-C101-A. 4. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage TA Operating Free-Air Temperature Dt/DV Input Transition Rise or Fall Rate (Note 5) (HIGH or LOW State) VCC = 3.0 V $0.3 V 5. Unused inputs may not be left open. All inputs must be tied to a high- or low-logic input voltage level. http://onsemi.com 3 Min Max Unit 2.0 3.6 V 0 5.5 V 0 5.5 V *40 )125 _C 0 100 ns/V MC74LVX132 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIII IIIII IIIIIIIII IIIIII IIIII IIII IIIIIIII IIIIII III III III III III III III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII IIIIII III III III III III III III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII IIIIII III III III III III III III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIII IIIIIIIIIIIIII IIIIIIIII IIIIII IIIIII IIIIII IIIIII IIIIII IIIIII IIIIII IIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIII IIIII IIIIIIIII IIIIII IIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIII IIIIIIIII III III III III III III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII DC ELECTRICAL CHARACTERISTICS VCC V TA = 25C TA = 85C TA = 125C Min Typ Max Min Max Min Max Unit VT+ Positive Threshold Voltage (Figure 5) 2.0 3.0 3.6 1.15 1.50 1.70 1.31 1.82 2.12 1.60 2.25 2.60 1.15 1.50 1.70 1.60 2.25 2.60 1.15 1.50 1.70 1.60 2.25 2.60 V VT- Negative Threshold Voltage (Figure 5) 2.0 3.0 3.6 0.30 0.75 1.00 0.64 1.13 1.46 0.9 1.45 1.90 0.30 0.75 1.00 0.90 1.45 1.90 0.30 0.75 1.00 0.90 1.45 1.90 V VH Hysteresis Voltage (Figure 5) 2.0 3.0 3.6 0.30 0.30 0.35 0.70 0.76 0.69 1.30 1.50 1.60 0.30 0.30 0.35 1.30 1.50 1.60 0.30 0.30 0.35 1.30 1.50 1.60 V 1.9 2.9 2.58 2.0 3.0 Symbol Parameter Test Conditions VOH Minimum High-Level Output Voltage VIN = VIH or VIL IOH = - 50 mA IOH = - 50 mA IOH = - 4 mA 2.0 3.0 3.0 VOL Maximum Low-Level Output Voltage VIN = VIH or VIL IOL = 50 mA IOL = 50 mA IOL = 4 mA 2.0 3.0 3.0 Iin Maximum Input Leakage Current Vin = 5.5 V or GND ICC Maximum Quiescent Supply Current Vin = VCC or GND 1.9 2.9 2.48 0.0 0.0 1.9 2.9 2.34 V 0.1 0.1 0.36 0.1 0.1 0.44 0.1 0.1 0.52 V 3.6 0.1 1.0 1.0 mA 3.6 2.0 20 20 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) TA = 25C Symbol tPLH, tPHL tOSHL, tOSLH Cin Parameter Min Test Conditions TA = 85C TA = 125C Typ Max Min Max Min Max Unit ns Maximum Propagation Delay, A or B to Y VCC = 2.7V CL = 15pF CL = 50pF 7.0 10.0 11.0 16.0 1.0 1.0 13.0 18.7 1.0 1.0 15.0 20.0 VCC = 3.3 0.3V CL = 15pF CL = 50pF 5.8 8.3 10.6 15.4 1.0 1.0 12.5 17.5 1.0 1.0 14.5 19.5 Output to Output Skew (Note 6) VCC = 2.7V CL = 50pF 1.5 1.5 1.5 VCC = 3.3 0.3V CL = 50pF 1.5 1.5 1.5 10 10 10 Maximum Input Capacitance 4 ns pF Typical @ 25C, VCC = 5.0 V CPD 11 Power Dissipation Capacitance (Note 6) pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per gate). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0 V) TA = 25C Symbol Typ Characteristic Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V VOLV Quiet Output Minimum Dynamic VOL -0.3 -0.5 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.8 V http://onsemi.com 4 MC74LVX132 VCC A 50% GND tPLH Y tPHL 50% VCC Figure 3. Switching Waveforms TEST POINT OUTPUT DEVICE UNDER TEST CL* *Includes all probe and jig capacitance VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) Figure 4. Test Circuit 4 3 (VT+) 2 VHtyp (VT-) 1 2 2.5 3 3.5 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT+ typ) - (VT- typ) 4 Figure 5. Typical Input Threshold, VT+, VT- versus Power Supply Voltage http://onsemi.com 5 MC74LVX132 VH Vin VCC VCC VH VT+ VT- VT+ VT- Vin GND GND VOH VOH Vout Vout VOL VOL (a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt-Trigger Offers Maximum Noise Immunity Figure 6. Typical Schmitt-Trigger Applications INPUT Figure 7. Input Equivalent Circuit http://onsemi.com 6 MC74LVX132 PACKAGE DIMENSIONS SOIC-14 D SUFFIX CASE 751A-03 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. -A- 14 8 -B- P 7 PL 0.25 (0.010) B M 7 1 G -T- D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 _ C SEATING PLANE M S SOLDERING FOOTPRINT 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS http://onsemi.com 7 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 MC74LVX132 PACKAGE DIMENSIONS TSSOP-14 DT SUFFIX CASE 948G-01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B -U- L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S S DETAIL E K A -V- EEE CCC CCC EEE K1 J J1 SECTION N-N -W- C 0.10 (0.004) -T- SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS http://onsemi.com 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74LVX132 PACKAGE DIMENSIONS SOEIAJ-14 CASE 965-01 ISSUE B 14 LE 8 Q1 E HE M_ L 7 1 DETAIL P Z D VIEW P A e DIM A A1 b c D E e HE L LE M Q1 Z A1 b 0.13 (0.005) c M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). 0.10 (0.004) MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --1.42 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.056 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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