FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES MICROMACHINE MicroMachine devices are complete 8-bit micro- computers on single MOS integrated circuits. The family can execute the F8 instruction set of more than 70 commands, allowing expansion into multi-chip con- figurations with software compatibility. The devices feature read only memory, 64 bytes of scratchpad RAM, a programmable binary timer, 32 bits of 1/O, anda single +5 V power supply requirement. Members of the family differ in memory type and size. The F3870 has.2048 bytes of mask programmed ROM while the F38E70 has 2048 bytes of PROM. The F3872 has 3K bytes of masked ROM plus 64 bytes of RAM. The additional RAM is addressed from the program and data counters, not the ISAR. The F3874 contains 4096 bytes of masked programmed ROM. Utilizing ion-implanted, n-channel silicon-gate tech- nology and advanced circuit design techniques, Fair- child's single-chip microcomputers offer maximum cost effectiveness in a wide range of control and logic replacement applications. DEVELOPMENT SUPPORT The Formulator family of development equipment sup- ports the F3870, the one-chip micromachine manufac- tured by Fairchild. The Formulator Operating System, Utility Programs, and the Fairbug Monitor are totally compatible with the F3870, since it shares the same instruction set with the Formulator. A Simulation (Quad 1/0) Module and an in-Circuit Emulation (ICE) cable are available to extend the Formulator features to the users prototype or production breadboard. This creates a powerful design tool for creating the users own F3870 software. In addition, the F3870 Emulator, a single stand-alone module for emulating the final F3870 soft- ware in PROMs, is available for building prototype systems. F3870 SIMULATION The non-microprocessor elements of the users hard- ware configuration can be assembled on a breadboard and connected to Mark 1, II, IIFD, Hi or HIFD via the ICE cable plugged into a 40-pin socket on the users board. STROBE oa o> 8-BIT VO port | | 8-BIT i/O PORT +5 V | ALU 64x8 GND +| ae | ACCUMULATOR | PROGRAM [ ISAR | | COUNTER | TEST }+! TEST SEQUENCER | | stack REGISTER DATA COUNTER | DATA COUNTER 2 2048 x 8 ROM RESET }-| POWER-ON Reser | XTL1f [| CLOCK L xTL2 | LOCK LoGic TIMER See Fig. 3 EXT INT }~ INTERRUPT 8-BIT 1/0 PORT 8-BiT 1/0 PORT LE The cable connector on the Processor Module in the Formulator provides I/O ports 0 and 1, while the Simu- lation (Quad 1/0) Module provides 1/O ports 4 and 5. This system provides real-world simulation of the users components in their actual environment with the vital microprocessor signals, including the compiete soft- ware debugging features of the Formulator, cabled to the external breadboard. F3870 EMULATOR After F3870 ROM codes are frozen, asmaller, easier-to- handle and less expensive tool is required. To accom- plish this design-in task, Fairchild has developed the F3870 Emulator. The F3870 Emulator contains sockets for two 2708s or two 2716 EROMs in place of the F3870 on-chip ROM so ROM codes can be verified and easily changed. The F3870 Emulator plugs directly into the F3870 40-pin socket in the production prototype using a short Emulator cable. The printed circuit module is approximately 5 by 7. 11-3FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES FEATURES F3870 F38E70* F3872* F3874* Micro- Micro- Micro- Micro- FUNCTION Machine Machine Machine Machine Arithmetic Unit Yes Yes Yes Yes Accumulator Yes Yes Yes Yes 64-byte Scratchpad RAM Yes Yes Yes Yes Power On Detect Yes Yes Yes Yes Clock Circuits Yes Yes Yes Yes Interrupt Logic Yes Yes Yes Yes instruction Register Yes Yes Yes Yes \/O Ports (8 tines each) 4 4 . 4 4 ROM (K bytes) 2K 3K 4K EROM (K bytes) ~ 2K ~ ~ 64-byte RAM = Yes Program Counter Yes Yes Yes Yes Stack Register Yes Yes Yes Yes Data Counters 2 2 2 2 Programmable Timer Yes Yes Yes Yes External Interrupt Yes Yes Yes Yes Pulse Width Measure Yes Yes Yes Yes Event Counter Yes Yes Yes Yes Vectured Interrupts Yes Yes Yes Yes +5V required Yes Yes Yes Yes Power mW (Typ) 275 325 310 285 Maximum # in system 1 1 1 1 Logic/Connection Diagram PQ P9 P9 Pg Package(s) 61,8P _ 61,8P 61,8P To be announced Note: The F3872 has an optional power down feature that allows the 64 byte RAM to be saved with a +2 V. Supply that will dissipate 2.5 mW. Two I/O port pins are traded for this function.FAIRCHILD MICROCOMPUTERS MICROCOMPUTER TRAINING COURSES Fairchild offers training courses which are aimed at the design engineer who must learn to design the microprocessor into a working system. Both software (instruction sets) and hardware related instruction is given. Emphasis is placed on hands-on instruction with microprocessor development systems. To achieve this understanding, the courses cover the details of I/O ports, use of subroutines and interrupts, where and how the ROM and RAMs are attached to the CPU and how to interface with static or dynamic memories. Two separate four day courses are offered. One covers the F8 device family and the Micromachine series hardware and software design. The other course covers the F6800 device family in the same manner. An optional fifth day allows instruction in the alternate microprocessor. F8 MICROPROCESSOR FAMILY ry F3899 1K PSU F3es7) | 10 bape Lt SMI/PSU 2K Faeso : | TIMER/INT v0 > | 8TaTic | MEMORY g g a F3853 g F2854 V0 su ofa] omesu) LJ 3 vo Leet ADDRESS TIMER/INT & TIMER/INT AND CONTROL 5 ; BUSSES 8 : i Jel F3856 10 he 3852 2 2k PSU ow os 10 bce 5 Lj DYNAMIC = TIMER/INT OR STATIC | MEMORY : F3861 V0 Fseas4 po PIO DMA LL To 8 TIMER/ANT _ 8 F3871 VO -e DATA BUS PIO i, TIMERINT [VOFAIRCHILD MICROCOMPUTERS F8 MICROPROCESSOR FAMILY FEATURES F3850 | F3851 | F3852 | F3853 | F3854| F3856| F3857 | F3861 | F3871 | F3899 FUNCTION cpu | psu | DMI | SMI | DMA| PSU | PSU/SMI| PIO PIO | ROM Arithmetic Unit Yes Accumulator Yes 64-byte Scratchpad RAM ; Yes Power on Detect Yes Clock Circuits Yes Interrupt Logic Yes Yes Yes Yes Yes Yes Yes Instruction Register Yes 1/0 Ports (8 lines each) 2 2 2 2 2 ROM ({K bytes) 1K 2K 2k 1K Data Bus (8 lines) | Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Address Bus (16 lines) Yes Yes Yes Yes Control Bus (5 lines) Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Program Counter Yes Yes Yes Yes Yes Yes Stack Register Yes Yes Yes Yes Yes Yes Data Counters 1 2 2 2 2 1 Programmable Timer Yes Yes Yes Yes Yes Yes External Interrupt Yes Yes Yes Yes Yes Yes Pulse Width Measure Yes Yes Yes Event Counter Yes Yes Yes Vectured Interrupts Yes Yes Yes Yes Yes Yes Memory Refresh Control Yes DMA Control Yes Yes +5V required Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes +12V required Yes Yes Yes Yes | Yes Yes Yes Yes Yes Yes Power mW (Typ) 330 | 270 330 330 280 785 785 270 270 270 Maximum # in System 1 63 1 1 4 31 1 62 62 63 Logic/Connection Diagram P1 P2 P3 P4 P5 P6 P7 P2 P6 P8 Package(s) 61,8P | 61,8P | 61,8P | 6I,8P | 6I,8P | 61,8P 61,8P 61,8P | 6I,8P | 61,8P Number of ports in System is timited by addressing. The maximum is 256 Port Adresses (each F8 device uses 4 Port Addresses). Maximum memory is 64K bytes RAM/ROM/PROM. The F38T56 and F38T57 incorporate the F387 1-type of timer logic and strobe logic. These devices will be available 3rd quarter 1978. 11-62th PORT ADDRESSING F8 MICROPROCESSOR FAMILY DEVICE PORTA PORT B PORT C PORT D TIMER INTERRUPT Item) NO. ADDR. FUNC. | ADDR. FUNC. ADDR. | FUNC. ADDR. FUNC. | VECTOR ADDRESS | PORT TYPES 1 |F3850 0 1/0 1 vo Standard 2 |F3851 = |XXXXXX00 VO |XXXXXX01 1/0 XXXXXX10] Control | XXXXXX11| Timer Mask Option Mask Option 3 | F3851A 4 VO 5 /O 6 Control 7 Timer H0020 Standard 4 |F3852 HOC H'OD Control HOE' H'OF 5 |F3852/ HEC HED Control HEE H'EF SL31116 6 |F3853 HOC Interrupt | HOD Interrupt | H'OE Control H'OF Timer Software Vector Vector Programmable Addr. Lo Addr.Hi 7 |F3854 = 11111YYOO IDMA Mem. 1111YY01 |DMA Mem11111YY10 | Control | 1111Y11] Lo Count Addr. Lo Addr. Hi Hi Count 8 |F3856 |XXXXXX00 VO |XXXXXY01 /O XXXXXX10) Control | XXXXXX11} Timer Mask Option Mask Option 9 |F38T56 |XXXXXX00 WO |XXXXXYO1 1/0 XXXXXX10] Control | XXXXXX11] Timer Mask Option Mask Option 10 |F3856A 8 1/0 9 1/0 HOA Control H'OB Timer H'0024 Standard 11 |F3857 XXXXXX10] Control | XXXXXX11} Timer Mask Option Mask Option 12 |F3861A 4 VO 5 VO 6 Control 7 Timer H0600 Standard 13 | F3861B 8 VO 9 /O HA Control HB Timer H'0340 Standard 14 | F3861C H'20' 1/0 H'21 1/0 H22 Control H'23 Timer H0320 Standard 15 |F3861D H'24 /O H25 /O H'26" Control H'27' Timer H0360 Standard 16 |F3861E 4 1/0 5 0 6 Control 7 Timer H'0020 Standard 17 | F3871E 4 /O 5 /O 6 Control 7 Timer H0020 Standard 18 |F3871F 4 VO 5 1/0 6 Control 7 Timer H0020 Direct Drive 19 |F3871G 4 VO 5 VO 6 Control 7 Timer H0020 Open Drain 20 |F3871H 4 VO 5 1/0 6 Control 7 Timer H'0420 Standard 1. XXXXXX.is a Mask Option 4. Three different types of timers and control ports exist. For further detail see 2. YY is a Pin Strap Option (1111YY00) Figures 1, 2, and 3. 3. The External Interrupt Address Vector is the Timer Address + H'0080 5. F38T56 and F38T57 have F3871-type timer and strobe logic. k SYSLNdWODOYDIW ATHOYIVAFAIRCHILD MICROCOMPUTERS F8 MICROPROCESSOR FAMILY {> o- F3850 CENTRAL PROCESSING UNIT [Ske 8 8-BIT VO PORT (CPU) sv Co mara The CPU is an 8-bit arithmetic device with 70 instruc- voy saxs tions. It contains a64-byte RAM, an instruction register, an accumulator, two parallel 1/O ports, an interrupt GND.+ control, power on reset and clock generation logic. The [san | CPU provides communication control lines to the other members of the family. arn L| Power-on The F8 offers several alternatives for connecting mem- xmx ory to the system. These may be used individually, orin xTty EI exon various combinations, depending upon the require- Re CONTROL Locic ments. WTS INTERRUPT 1 | | | V4 o WRITE F3850 CPU ~ > 5 iT | ud Boer Seer F3851 PROGRAM STORAGE UNIT (PSU) sv| [_egsnes os Bus The F3851 PSU contains 1024 bytes of mask program- ev mable ROM, a program counter and a data counter. It enn -| [neat | also has two parallel I/O ports, an 8-bit data port, astack register, an incrementer/adder, a programmable timer and an interrupt control. Several F3851 circuits may be put in one system, thus increasing the ROM, I/O, and yom. interrupt capability of the system. The F3851 program storage unit may be used alone, or in combination with one of the memory interface circuits. a TIMER A See Fig. 1 CONTROL PRI IN Locic =a fe PRI OUT +F INTERRUPT EXT INT - INT REQ 5 o WRITE CONTROL BUS F3851 PSUFAIRCHILD MICROCOMPUTERS F8 MICROPROCESSOR FAMILY F3852 DYNAMIC MEMORY INTERFACE (DMI) The DMI provides an appropriate interface for either static or dynamic memory components. When dynamic RAM circuits are used the DMI provides the necessary refresh controls required to maintain memory integrity. Another function of the DMI is to provide contro! for the F3854 DMA circuit. The dynamic memory refresh cy- cles and the DMA transfers are performed without slowing the central processor. The DMI also contains a program counter, data counter, an auxiliary data coun- ter, stack register, incrementer/adder, an 8-bit data bus and a 16-bit address bus for communication with exter- nal memory. The DM! may be used solely with the CPU, or in conjunction with the F3851 PSU device. +5 V me] +12 | GND -| CPU SLOT CYCLE AEG [4 MEM IDLE ADDRESS BUS PROGRAM COUNTER STACK REGISTER Qo > 16 AT: COUNTER 1 DATA COUNTER 2 DMA CONTROL Tit MEMORY CONTROL REFRESH CONTROL CONTROL Logic od WRITE 4 + | 5 CONTROL BUS F3852 DMI P CPU READ DATA Bus REG DA RAM WRITE F3853 STATIC MEMORY INTERFACE (SMI) The SMI is the second of three alternative devices in the F8 family which may be used with the 3850 CPU for memory interface. The SMI provides the necessary control for static memory components such as the 2102 RAM, 2708 EPROM, or 93448 PROM. The SMI also contains a program counter, data counter, an auxiliary data counter, stack register, incrementer/adder, a pro- grammablie timer, an 8-bit data bus and a 16-bit address bus for communication with external memory. The F3853 may be used solely with the CPU, or in conjunc- tion with F8 PSU devices. +5 Ve +12: V | GND + ADDRESS BUS PROGRAM COUNTER STACK REGISTER 9 > 16 8 DATA COUNTER 1 AT: COUNTER 2 MEMORY CONTROL A= TIMER A SEE FIG. 1 CONTROL 7AON LOGIC INT REO = INTERRUPT ExT INT Tf WRITE CONTROL BUS F3853 SMI DATA BUS REG DR CPU READ RAM WRITE 11-9FAIRCHILD MICROCOMPUTERS F8 MICROPROCESSOR FAMILY F3854 DIRECT MEMORY ACCESS UNIT (DMA) The DMA circuit allows memory access from an exter- nal device during periods when the CPU is not using the memory. The F3852 DMI provides a control line which indicates periods when the memory is idle. During these periods the DMA transfers data between an external device and the memory. This operation is performed without slowing the central processor. In addition, the DMA contains a 16-bit memory address bus, an 8-bit data bus, programmable address vector and data Jength counter. ADDRESS BUS | ff ADDRESS BYTE Vv! REGISTER COUNTER H12V| GND=| Y DATA C BUS XFER REG MEM (DLE t2) DMA STROBES] CONTROL DMA SLOT ENABLE}{ CONTROL DIRECTION 7] - REGISTER CONTROL pt Loic pe | | WAITE LOAD READ REG REG F3854 DMA F3856 PROGRAM STORAGE UNIT (PSU) tt is important to note that Fairchilds program storage unit is not just a conventional read only memory. In addition to containing 2048 bytes of mask program- mable ROM for program and constant storage, the F3856 includes the addressing logic for memory refer- encing, a program counter, an indirect address register (the data counter) and a stack register. A complete vectored interrupt level, including an external interrupt line to alert the central processor, is provided. All of the logic necessary to request, acknowledge and reset the interrupt is on the F3856. The 8-bit programmable timer is especially useful for generating real time delays. The PSU has an additional 16 bits of TTL compatible, bidirectional, fully latched I/O lines. Systems requiring more program storage may be ex- panded by adding more PSU circuits. For example, one F3850 and two F3856 PSUs will produce a microproc- essor system complete with 64 bytes of RAM, 4096 bytes of ROM, 48 I/O bits, two interrupt levels, and two programmable timers. This complete system will re- quire only three IC packages. The F38T56 incorporates the F3871-type timer and strobe logic. STROBE | 8-BIT VO POR VO PORT a SOATA \ Bus PROGRAM DATA COUNTER 1 COUNTER > oo Uo Qo A +5V| +12 V DATA COUNTER 2 STACK REGISTER ib GND ~| 2048 x 6 ROM TIMER B See Fig. 2 PALIN PRI OUT = INTERRUPT EXT INT INT REQ CONTROL Li SHOR Loaic 5 {ie o WRITE CONTROL BUS F3856 PSU 11-10FAIRCHILD MICROCOMPUTERS F8 MICROPROCESSOR FAMILY F3857 PROGRAM STORAGE UNIT/STAT- IC MEMORY INTERFACE (PSU/SMI) The F3857 is the third alternative device in the F8 family which may be used with the F3850 CPU for memory interface. The PSU/SMI provides the necessary control for static memory components such as the 2102 RAM or F2708 EPROM. The PSU/SMI also contains a program counter, data counter, an auxiliary data counter, stack register, incrementer/adder, a programmable timer, an 8-bit data bus and a 16-bit address bus for communica- tion with external memory. The F3857 may be used solely with the CPU, or in conjunction with other members of the F8 family. The F3857 differs from the ADDRESS BUS 1 7 8 DATA BUS DATA COUNTER 1 PROGRAM COUNTER 15 | 12V~ STACK DATA GND *) REGISTER COUNTER 2 blk 2048 x 8 ROM F3853 in that a 2048 byte mask programmable ROM is TIMER B ||. oeoR also included. seers? contro. [| _. ceu reap in Locic PT RAM WRITE The F38T57 incorporates the F3871-type timer and Sitar py] INTERRUPT strobe logic. | | 5 o& WRITE CONTROL BUS F3857 PSU/SMI Ef 8 BIT 8 BIT VO PORT VO PORT Lo +5v e DATA BUS H2V ol F3861 PERIPHERAL I/O DEVICE (PIO) cnp The PIO is an expansion unit for [/O ports, interrupts and timers. It contains two 8-bit I/O ports, one interrupt control, and one programmable timer. Depending on the application requirements, multiple PlOs may be added to the system to expand the functions at low cost. TIMER A PAIN See Fig. 1 CONTROL Bc S| tenner ee INT REQ 4 = 5 d WRITE CONTROL BUS F3861 PIO 11-11FAIRCHILD MICROCOMPUTERS F8 MICROPROCESSOR FAMILY or or es oe: 8 BIT sBit VO PORT WO PORT F3871 PERIPHERAL I/O DEVICE (PIO) sv C) BUS The PiO is an expansion unit for I/O ports, interrupts M2 el and timers. It contains two 8-bit !1/O ports, one interrupt GND | control, and one programmable timer. Depending on the application requirements, multiple PIOs may be added to the system to expand the functions atiow cost. The versatile timer/interrupt circuit has the ability to measure external pulse widths, or count external pulses in addition to providing a timer with resolution of 1.0us at 2.0MHz. TIMER C PRIN See Fig. 3 CONTROL rarOuT = INTERRUPT Loaic INT REG 4 5 d WRITE CONTROL BUS F3871 PIO PROGRAM OATA +5 COUNTER BUS +12 V | _ STACK pane F3899 PROGRAM STORAGE UNIT (PSU) [atte The F3899 PSU contains 1024 bytes of mask program- mable ROM, a program counter, stack register, and a yo2t x8 data counter. The F3899 provides a low cost ROM ROM memory to augment the F8 family. | TIMER CONTROL =e Logic 7 oBpR 5 o WRITE CONTROL BUS F3899 PSU 11-12FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY TIMERS a cLocK TIMER PRESCALER B-BIT POLYNOMIAL [mj TIMER INTERRUTY +8 COUNTER INTERRUPT CONTROL EXTERNAL INTERRUPT REQUEST LATCH 0~ SIT NUMBER 1 / 0 0 NO INTERRUPTS ~ 0 1 ENABLE EXTERNAL INTERRUPT NOT 1 1 ENABLE TIMER INTERRUPT USEO + 0 NO INTERRUPTS Fig. 1 Timer and Interrupt Control for F3851, F3853 and F3861 0 PRESCALER cLocK 8-BIT DOWN TIMER INTERRUPT +2, 8, 32, or 128 COUNTER REQUEST LATCH INTERRUPT CONTROL EXTERNAL INTERRUPT, REQUEST LATCH O<- SIT NUMBER : 1 ~-" 9 0 ~ (NO INTERRUPTS NOT USED 0 1 ENABLE EXTERNAL INTERRUPT 1 1 ENABLE TIMER INTERRUPT 1 PULSE WIDTH 0 ENABLE BOTH INTERRUPTS EDGE DETECT 1 +2 PRESCALEA STOP TIMER _- t +8 PRESCALER 0 0 +32 PRESCALER +128 PRESCALER soon 1 Fig. 2 Timer and Interrupt Control for F3856 and F3857 EXTERNAL o PRESCALER GLOCK TIMER TIME 8-BIT DOWN COUNTER BASE (PORT 7) +2, 5, 10, 20, 40, 100, or 200 MODULO-N REGISTER INTERRUPT S-BITS CONTROL PORT +20] +5 | +2 (PORT 6} 7 6 S 4 3 2 1 O-~~BITNO. EXTERNAL EXTERNAL INTERRUPT ENABLE INTERRUPT EVENT COUNTER MODE < REQUEST + LE TIMER INTERRUPT ENABLE LATCH +40 PRESCALE + 200 PRESCALE EXT INT ACTIVE LEVEL START/STOP TIMER ji PULSE WIDTH/INTERVAL TIMER tHET TT Fig. 3 Timer and [Interrupt Control for F3870 and F3871 11-13FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS The microprocessor system designer can now create his own hardware and software development systems by selecting modular subassemblies from Fairchilds Formulator design aids. He may start development with a Mark | singleboard system, then expand to more sophisticated Mark Il or Mark I[FD development sys- tems that can handle both software and hardware development. Or, he may graduate to a complete For- mulator Mark Ill with intelligent front panel, power supply, and accessories or to the top of the line Formu- lator Mark IIIFD with floppy disk drives. Three growth packages plus a selection of optional modules provide a practical method for upgrading the single-board Mark I to either the Mark Il or Mark IIFD or to the maximum system configuration Mark II] or Mark IIFD. Using the growth packages, the designer can begin sophisticated system application programs at very low cost and then upgrade his development tools in relatively inexpensive steps. FORMULATOR MARK I The first member of the Formulator family, the Formula- tor Mark J, is a basic microcomputer development tool providing the hardware necessary to build prototype systems. Included in the basic system is the Formulator Processor Module with the F8 CPU, Static Memory Interface, Dynamic Memory Interface, and Program Storage Unit devices. The Fairbug debug program, a 1K-byte monitor debug package, is included in the Program Storage Unit on the Processor Module. Fair- bug provides the Mark | with sufficient debug capability to load a program, examine registers, monitor and alter memory locations, store a program on an external file, and generate a tape suitable for burning PROM memo- ry devices. The Mark | also comes equipped with a 13- slot card cage and motherboard for attaching the modular Formulator printed circuit boards. Cables and documentation are also included in the F8 Formulator Mark | system, including a peripheral interface cable which can connect the Mark | toa Teletype ASR33 or TI Silent 733 for external communication. Hardware Formulator Processor Module Formulator Card Cage and Motherboard Processor Module to Peripheral Cable Power Cable Cable Kit Software Fairbug Debug Program Documentation Formulator Users Guide Formulator Hardware Reference Manual Formulator Mark | Systems Coverage Manual Formulator Utilities Manual FORMULATOR MARK II The second member is the Formulator Mark fH. This unit is a low cost microcomputer software and hardware development tool. It includes the basic hardware re- quired to develop a system, as well as the necessary software tools to develop object code. The Mark I! consists of all the components of the Mark }, namely the Processor Module, card cage and motherboard, cable kit, and the Fairbug debug program, as well as an additional 16K-byte RAM module. Also a part of the Mark I! is the Formulator Operating System, including the editor, relocating assembler, and debug package to allow the generation of source code and to create and check out object code. Peripheral interfaces are also available to connect the Mark I) to a Tt Silent 733 or Teletype ASR33. Hardware Formulator Processor Module 16K-Byte RAM Module Formulator Card Cage and Motherboard Processor Module to Peripheral Cable Power Cable Cable Kit Software Formulator Operating System Documentation Formulator Users Guide Formulator Hardware Reference Manual Formulator Mark 1) Systems Coverage Manual Formulator Utilities Manual 11-14FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS FORMULATOR MARK IIFD The third member is the Formulator Mark IIFD, a floppy-disk based low-cost microcomputer software and hardware development tool. It includes the basic hardware required to develop a system, as well as the necessary software tools to develop programs. The Mark IIFD consists of all the components of the Mark |, namely the Processor Module, card cage and mother- board, cable kit, and the Fairbug debug program, as well as an additional 16K-byte RAM Module. The F8- DOS-iII is also a part of the Mark IIFD. It includes a floppy-disk file manager, editor, relocating assembler, and debug package to generate source code and to create and check out object code. The Mark IIFD can communicate with teletype ASR33 and other standard RS232 CRT or printing terminals. FORMULATOR MARK III The fourth level of microprocessor development equip- ment is the Formulator Mark Ill, offering all of the design assistance required to develop microprocessor systems. The combination of hardware, software, and firmware offered by the Mark II! assists the designer from the generation of source programs through the development of a prototype system. The Mark lll is a modular microcomputer that accommodates a variety of memory, input/output, and communication configu- rations to form a new and powerful development syst- em. It contains all of the components of the Mark Ilthe Processor Module, card cage and motherboard, cable kit, the Fairbug debug program, 16K bytes of RAM, and the Formulator Operating System. In adclition, the Mark III includes a Quad 1/O Module with four I/O ports and two interrupts, a Communications Module with an on- board UART, a universal breadboard for building user hardware configurations, an extender module, and an intelligent operator's panel. Power supplies for the Mark Itl may be either 100 volts, 115 volts, or 220 volts at 50/60Hz. Peripheral interfaces are available to connect the Mark Il! with a TI Silent 733, a Teletype ASR33, or an HP 2645A Mini-Data Station. FORMULATOR MARK IIIFD The top of the line in microprocessor development equipment is the floppy-disk-based Formulator Mark IHFD, offering all of the design assistance required to develop microprocessor based systems. The combina- tion of hardware, software, and firmware offered by the Mark IIIFD assists the designer from the generation of source programs through the development of a proto- type system. The Mark IIIFD is amodular microcompu- ter that accommodates a variety of memory, input/out- put, and communication configurations to form a new and powerful development system. It contains all of the components of the Mark IJIFD, the Processor Module, Hardware Parallel interface Module Prom Boot Loader Module Formulator Processor Module 16K-Byte RAM Module Formulator Card Cage and Motherboard Processor Module to Peripheral Cable Power Cable Cable Kit Software F8-DOS-III Floppy Disk Operating System Documentation Formulator Users Guide Formulator Hardware Reference Manual Formulator Mark I! Systems Coverage Manual Formulator Utilities Manual Hardware Formulator Mainframe Designers Console with Firmware Formulator Processor Module 16K-Byte RAM Module Quad I/O Port Module Communications Module Universal Breadboard Extender Module Cable Kit User I/O Cable Assembly Communications Module to Peripheral Cable Software Fairbug Debug Program Formulator Operating System Documentation Formutator Users Guide Formulator Hardware Reference Manual Formulator Mark III Systems Coverage Manual Formulator Utilities Manual card cage and motherboard, cable kit, the Fairbug debug program, parallel interface, PROM boot loader, 16K bytes of RAM, and the F8-DOS-III disk operating system. In addition, the Mark IIIFD includes a quad 1/0 module with four I/O ports and two interrupts, a com- munications module with an on-board UART, a univer- sal breadboard for building user hardware configura- tions, an extender module, and an intelligent operators panel. Power supplies for the Mark ItIFD may be either 100 volts, 115 volts or 220 volts at 50/60Hz. The Mark II!1FD can communicate with teletype ASR33 or other standard RS232 glass or printing terminals. 11- 15FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS FORMULATOR MARK IIIFD (Contd) Hardware Formulator Mainframe User I/O Cable Assembly Designer's Console with Firmware Communications Module to Peripheral Cable Formulator Processor Module Parallel Interface Module PROM Boot Loader Module 16K-Byte RAM Module Quad I/O Port Module Communications Module Universal Breadboard Extender Module Cable Kit Software F8-DOS-II! Floppy Disk Operating System Documentation Formulator Users Guide Formulator Hardware Reference Manual Formulator Mark III Systems Coverage Formulator Utilities Manual F8-DOS-III DESCRIPTION F8-DOS-III provides a powerful and complete develop- The Formulator F8-DOS-III operating system provides ment software package with batch operation, linking floppy-disk bulk storage capability for Fairchilds For- loader, and relocating assembler, and provides an easy mulator Mark HFD and Mark IIIFD F8 microcomputers _ to use, reliable, fast and extremely efficient capability when used with up to four plug-compatible iCOM for auxiliary program and data storage during F8 and series FD 360, FD3700 and Frugal Floppies providing F3870 software development or in end-user applica- for over one megabyte of total storage capacity. tions. iCOM Advertised F8-DOS-II| SUMMARY FD3700 Series Features Disk Monitor Editor Relocating Assembler|Real-Time Debugger Fully IBM 3740 media and Assemble Move Line No-List Option Symbolic Debugging format compatible (Relocating) Copy Line |No-Object Option Set Up to 8 Breakpoint Full formatter and controller |Load (Linking) |Bottom Error Messages Clear Breakpoint built-in List Directory |Change Invalid Labet Clear All Breakpoints Full sector Read/Write buffers] Print File Delete Duplicate Label Continue Execution allow asynchronous or DMA | Rename File File invalid Op Code Go To Location data transfer Create File Find String |Operand Error Return to Monitor Drive and diskette Write Pro- | Delete File Insert Syntax Error Single Step tect capability Copy File Locate String]Undefined Symbol Trace On Long Positive latching door Copy Disk Next Expression Storage |Trace On Short mechanism GenMod Replace Overflow Trace Off Up to 4 drives with no soft- (Created Tab Relocatability Display Memory ware or hardware modifi- Linked File) Top Error Display Register cations Edit Mode MTBF in excess of 2300 hours Type Pseudo Operand Display Port (FD 3712 dual drive) Load (Absolute) |Up Error Store Memory Plug-in convenience allows |DeBug Mode Cross Reference Store Register MTTR of 18 minutes Assign Virtual I/O Store Port Front panel LED status Burn PROM indicators Convert LED drive select indicators ROM Dump Fully retracting head and pressure pad for maximum diskette life 50 pin flat ribbon cable with 3M interface connector FD 360 compatible 11-16FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS FORMULATOR GROWTH PACKAGES The Mark I, Mark Il, and Mark lil Formulator systems previously described are all upwards compatible. The Mark | can be expanded to become a Mark II; likewise, the Mark Ii may be developed into a Mark III. In addition, a Mark || can be expanded to a Mark IIFD and a Mark III into a Mark HIFD. This means that a microprocessor system designer may enter the microcomputer design at a level which best matches the needs at hand amount of available money, time, microprocessor experienceand be able to increase the Formulators capabilities as his needs grow. Three growth packages are available to Formulator product owners. Growth Package 1 converts a Mark | system to a Mark II; Growth Package 2 extends the capabilities of the Mark II into the Formulator Mark Ill, and Growth Package 3 extends a Mark II or II into a Mark IIFD or IIIFD. Growth Package | 16K-Byte RAM Module Mark I] Formutator Operating System Growth Package 2 Quad I/O Module Communications Module Power.Supply Fan Console Control Modules Internal Cable Wiring Universal Breadboard Extender Module 1/O Cable Assembly Communications Moduie to Peripheral Cable Mark IIf Formulator Operating System Growth Package 3 Parallel Interface Module PROM Boot Loader Module F8-DOS-III System Diskette PERIPHERAL OPTIONS The Formulator Mark Il systems interface with either a Teletype ASR33 with the auto reacd//auto punch option oraT! Silent 733 ASR with the ADC option. The teletype terminal provides a paper tape based system, while the 733 allows file storage on magnetic tape cassettes. To decrease load times, a Remex high speed paper-tape reader (or equivalent) may be used with either peripher- al unit. The Formulator Mark Ill provides an interface for the HP Mini-Data Station as well. This high speed unit combines the efficiency of the magnetic tape cartridges with an intelligent terminal and thermal line printer to allow the rapid development and debugging of applica- tion programs. The Formulator Mark IIFD and IIIFD systems interface with any standard RS232 terminal and printer or prin- ting terminal to offer maximum peripheral cost/speed flexibility. HP MINI-DATA STATION The HP 2645A Mini-Data Station features an interactive CRT Terminal with high resolution display and a fully integrated mass storage capability, making it easy to use both on- and off-line. It uses 2-1/2 x 3-1/4 x 1/2 magnetic cartridges which store up to 110 kilobytes of formatted data. The Mini-Data Station has two mini cartridge drives, allowing for a total of 220 kilobytes of data storage on magnetic tape. Thus, all filesboth operating system and user filesare resident on the magnetic tape. Loading and storing files is accom- plished by reading and writing onto the cartridge. The user's time is decreased and efficiency increased when the magnetic tapes are used. The 2645 Mini-Data Station comes equipped with three data cartridges, an Owners Manual, and an Installation and Service Manual. HP 9866A PRINTER SUBSTATION The HP 9866A line printer is a moderately priced, high performance companion to the HP 2645A Mini-Data Station, providing a permanent record of the contents of the Mini-Data Station display and memory for future use. The printer operates at up to 240 lines per minute with a maximum line width of 80 characters. The char- acter set consists of 64 alphanumeric characters gener- ated by a 5 x 7 dot matrix. Since a thermal printing mechanism is used to make this printer quiet enough for normal office use, thermal sensitive paper is re- quired. This paper is 8-3/4 inches wide and available in 250 foot rolls. The 9866A thermal printer comes equipped with two rolls of paper, a power cord, an interface card and cable, and an instruction Manual. 11-17FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS iCOM F3712 DUAL FLOPPY DISK The iCOM FD3700 Series Floppy Disk System for microcomputers continues the tradition of the iCOM FD360. The FD3700 brings to the OEM, and to the development lab, proven reliability and popular fea- tures, while incorporating advanced styling and new convenience items. The iCOM FD3700 Series features the following: @ Futly IBM 3740 media and format compatible e Full formatter and controller built in e Full sector read/write buffers allow asynchro- nous or DMA data transfer Drive and diskette write-protect capability e Positive latching door mechanism e Up to four drives with no software or hardware modifications e MTBF in excess of 2300 hours (FD3712 dual drive) e Plug-in convenience allows MTTR of 18 minutes Front panel LED status indicators LED drive select indicators e Fully retracting head and pressure pad for maxi- mum diskette life e 50-pin flat ribbon cable with 3M_ interface connectorFD360 compatible iCOM Performance features are as follows: e Disk speed 360 RPM + 1.5% e 10 ms track-to-track access time e 40 ms head load time e 5ms sector read/write time 83 ms average latency time e 700 ms automatic head unload time 1 ms interrecord time Power Requirements Are: 110-125 Vac, 60Hz, 200 W max Optional 220-240 Vac, 50Hz, 200 W is avaitable OPTIONAL FORMULATOR MODULES Expansion of the Formulator microcomputers need not occur along the path indicated by the growth packages. Optional Formulator modules are available to expand RAM, PROM 1/0, and communications, so. the user can develop a custom system which is perfectly suited to his specific needs. These optional modules may be at- tached to the Formulator via the 13 card slots in the motherboard. The first three slots are dedicated to front panel operations of the Mark Il. Another slot is re- served for the Processor Module. The remaining nine slots are linked on a common bus whose signals are compatible with the modules themselves. Additional system functions may be easily added to any Formuta- tor system by simply plugging in one of the modules. Thus, the initial Formulator investment is preserved. Nothing needs to be discarded as demands upon the system increase. Unless otherwise noted, all of the following optional modules are available to update any Mark 1, Mark If, Mark !IFD, Mark IH, or Mark IIFD system to meet expanded requirements. Optional Modules 4K-Byte RAM Module 16K-Byte RAM Module Quad I/O Port Module 4K-Byte PROM Module Communications Module Byte Parallel Interface Module ROM Simulation Module Universal breadboard Extender Module I/O Light Display Board PROM PROGRAMMER The ability to easily program permanent memory de- vices is essential to any microprocessor design. The Formulator PROM Programmer connects to a Quad I/O Module within either a Formulator Mark Il ora Formula- tor Mark III, permitting the programming of any of the following fuseable link or ultraviolet tight eraseable PROMs from a pattern stored in the Formulator memo- ry. The 11 x 12 x 4" PROM Programmer is driven by a utility program contained within the Formulator Oper- ating System and features a simple, easy to use com- mand set. The commands, entered into the PROM Programmer from the Formulator peripheral via the keyboard, allow the user to transfer data from a PROM to memory, burn a PROM, verify a PROM pattern, manually enter a single byte of data, and display PROM locations using the system software. The programming idiosyncrasies of each PROM are contained in software look-up tables to relieve the user of intricate repetitious set-up. The procedure is simply to identify the PROM type (like 93448) and the PROM parameter look-up table is automatically invoked, defining such things as num- ber of words, word bit length, burn time, wait time, retry conditions, etc. The programming is convenient 11-18FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS PROM PROGRAMMER (Cont'd) enough to allow the PROM Programmer to be used ina production environment. Included in the basic system are two socket boards, one for the Fairchild 93436/93446 PROMs and one for the 93438/93448 PROMs. Socket boards for the ultraviolet eraseable devices are also available. A cable to the Quad I/O Module and a power cord are also included in the basic unit. Fairchild Fusible Link PROMS Ultraviolet Eraseable PROMs 93436 (512 x 4) 93446 (512 x 4) 93438 (512 x 8) 93448 (512 x 8) 2704 (512 x 8) 2708 (1024 x 8) OCM-1 ONE-CARD MICROCOMPUTER The OCM-1 is a complete microcomputer system con- tained on a single printed circuit board and offering the following features: . 64-byte scratch pad memory 1K-byte RAM 8K-byte ROM (1K supplied, sockets provided for balance) 4K-byte EPROM (sockets provided) 4K-byte PROM (sockets provided) Up to four programmable timers Up to four programmable interrupts RS232 interface (current loop optional) 2MHz clock Self-contained Fairbug teletype operating sys- tem Up to 64 individually programmable, bidirection- al, latched 1/O lines. The unit is based on the F8 microcomputer and is fully supported by the Formulator family of program clevel- opment aids. In addition, the OCM-1 contains a built-in teletype operating system, called Fairbug I, contained in the F3851A Program Storage Unit. Using an OCM-1- to-TTY cable assembly, the board can be directly coupled to a teletype or RS232 terminal to display or alter memory location, to load and punch paper tape, or to make entries from the keyboard or by program instruction. An alternative built-in operating system, K- D Bug, contained in the F3856A PSU is also available. It provides all of the Fairbug | functions plus a resident monitor to facilitate operation with a low-cost calculator-style keyboard and LED display. A Fairbug users guide is provided with the OCM-1. The K-D Bug should be ordered as a separate item. TTY CABLE 1/0 CABLE t 1/0 CABLE 4 tf { ' ' 1 \ to) LV bet ote 0 1 | a851A TTY PSU INTER- 3861 1/0 3861 10 (FAIR- | FACE (OPT.) (OPT.) 3880 BUG) cIRCUITS| CPU T . DATA BUS } 1a ADORESS BUS 3853 XTAL SMI 2K BYTE 2K BYTE FUSIBLE LINK PROM = UV PROM SN (ema ema. : : 2708 2102 93448 aaa | BREADBOARD | | 1K BYTE rom PROM ptom SPACE RAM [-] [1 (OPT.) (OPT.) PREDRILLED . 2708 93448 | enon UV PROM L_] (OPT,) PROM (OPT.) 11-19FAIRCHILD MICROCOMPUTERS MICROMACHINE SERIES AND F8 FAMILY DESIGN AIDS ONE CARD MICROCOMPUTER (Cont'd) The OCM-1 processor section includes the 3850 Cen- tral Processing Unit, the F3853 Static Memory Inter- face, a 2MHz clock, and reset circuitry. The OCM-1 memory section contains the capability for the use of five different types of storage including 64 bytes of scratch pad, 1K bytes of RAM, sockets for 2K bytes of EROM (2708), sockets for 2K bytes of fusible link PROM (93448), and the Fairbug | operating system. The !/O portion of the system is contained in the F3850 Central Processing Unit and a F3851A Program Stor- age Unit, each containing two 8-bit I/O ports. Two sockets are provided for inserting standard F8 PIO circuits (F3861 or F3871) or, if more ROM is required, standard PSUs (F3851 or F3856) may be inserted. In either case, four additional I/O ports are provided bringing the maximum total to eight I/O ports (64 lines). Only single-byte instructions are required to individual- ly program these lines for either input or output func- tions. Latches on each line reduce external hardware cost. A circuit on the board gives the OCM-1 the capability of communicating with a teletype, RS232 device or 20mA current loop. In its standard configuration, the OCM-1 contains two interrupts and two timers, one in the F3851A PSU and one in the F3853 SMI. Two additional interrupts and timers may be added by plugging the two additional PIOs into their sockets. A daisy-chained priority system determines which interrupt will be serviced if two or more requests are made simultaneously. The OCM-t1 requires three power supply voltages: +12V @ 0.255 A, -5V @ 0.4 A and -5V @ 0.09 A. The -5V supply is used only for the 2708 EROM devices. All supply voltages are +5% maximum. The entire microcomputer is contained on a single board (epoxy glass with solder mask) measuring ap- proximately 7.5 inches by 10.5 inches. It includes a 2- inch by 4-inch pre-drilled breadboarding area for users who want to develop unique system configurations. In addition, a Formulator-compatible 100-pin edge con- nector, aspecial connector for TTY or terminal, and two 44-pin edge connectors for F8 signals, are contained on the board. A switch to enable the Fairbug operating system is also provided. The OCM-1 is delivered com- pleted with OCM-1 Users Manual, Fairbug Users Guide and F8 Guide to Programming. FORMULATOR SUPPORT In addition to the optional boards, peripherals, cables, and other accessories, the Mark I, Mark tl, and Mark III Formulator systems are supported by a wide range of documentation, and an intensive training program. FORMULATOR DOCUMENTATION The Formulator user has access to a full range of reference and instructional manuats to aid him in his system design and programming. F8 USERS GUIDE The F8 User's Guide is a detailed description of the F8 family of microprocessor devices. Microprocessor systems are discussed, with the configurations of the F8 circuits examined in depth. The Users Guide also outlines the F8 instruction set. Detailed specifications of each member of the F8 microprocessor family is given, including functional descriptions, logic dia- grams, signal toad levels, and timing diagrams for each circuit. Typical F8 system configurations are also pre- sented. . MICROMACHINE USERS GUIDE The Micromachine 2 Users Guide is a detailed descrip- tion of the F3870, F38T70, F3872 and F3874 Microma- chines. This manual covers programming and systems design with emphasis on application implementation. GUIDE TO PROGRAMMING The Guide to Programming is written for logic design- ers with little or no background in computer program- ming. It introduces machine and assembly language programming to the potential user of microprocessors and microcomputer systems. Introductory topics in- clude flowcharting, memory allocation, source and object programs, and assembly language. More ad- vanced topics include programmed 1/O, interrupts, programmable timers, subroutines, macros, data manipulation, and programmed direct memory access channels. Numerous examples of these programming techniques are given. FORMULATOR USERS GUIDE The Formulator Users Guide fully describes the opera- tion of the Formulator Development system. It covers the Mark I, Mark II, and Mark IH hardware configura- tions and contains a detailed description of the Formu- lator softwarethe monitor, the editor, the assembler, and the debug program. The F8 DOS-III Users Guide is also available for Mark IIFD and Mark IIIFD systems. FORMULATOR HARDWARE REFERENCE MANUAL This book presents an in-depth technical description of the F8 Formulator System, its component subsystems, and options. The technical description includes gener- al functional characteristics, theory of operation, and detailed description of interface signals. 11-20