PRELIMINARY
1www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-8
EPD TVS Diode Array
For ESD and Latch-Up Protection
Description Features
Circuit Diagram (Each Line) Schematic & PIN Configuration
Revision 1/18/2008
The SLV series of transient voltage suppressors are
designed to protect low voltage, state-of-the-art CMOS
semiconductors from transients caused by electro-
static discharge (ESD), cable discharge events (CDE),
lightning and other induced voltage surges.
The devices are constructed using Semtech’s propri-
etary EPD process technology. The EPD process pro-
vides low standoff voltages with significant reductions
in leakage currents and capacitance over silicon-
avalanche diode processes. The SLVU2.8-8 features
integrated low capacitance compensation diodes that
reduce the maximum capacitance to 8pF per line.
This, combined with low leakage current, means signal
integrity is preserved in high-speed applications such
as 10/100 Ethernet.
The SLVU2.8-8 is in an SO-8 package and may be used
to protect four high-speed line pairs. The layout of the
device minimizes trace inductance and reduces voltage
overshoot associated with ESD events. The low
clamping voltage of the SLVU2.8-8 minimizes the
stress on the protected IC.
The SLV series TVS diodes will meet the surge require-
ments of IEC 61000-4-2 (ESD), IEC61000-4-5 (Light-
ning), and ETSI ETS 300 386.
Applications
Mechanical Characteristics
10/100 Ethernet
WAN/LAN Equipment
Switching Systems
DSLAMs
Desktops, Servers, & Notebooks
Instrumentation
Base Stations
Analog Inputs
600 Watts peak pulse power (tp = 8/20µs)
Transient protection for high speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp = 5/50ns)
IEC 61000-4-5 (Lightning) 24A (tp = 8/20µs)
Protects four line pairs (eight lines)
Comprehensive pin out for easy board layout
Low capacitance
High peak pulse current (30A, 8/20µs)
Low leakage current
Low operating and clamping voltages
Solid-state EPD TVS process technology
JEDEC SO-8 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
SO-8 (Top View)
2 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-8
Absolute Maximum Rating
Electrical Characteristics (T=25oC)
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3 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-8
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
0
10
20
30
40
50
60
70
80
90
100
110
0 25 50 75 100 125 150
Ambient Temperature - TA (oC)
% of Rated Power or IPP
Power Derating Curve
Pulse Waveform Clamping Voltage vs. Peak Pulse Current
0
10
20
30
40
50
60
70
80
90
100
110
0 5 10 15 20 25 30
Time (µs)
Percent of IPP
e-t
td = IPP/2
Waveform
Parameters:
tr = 8µs
td = 20µs
Normalized Capacitance vs. Reverse Voltage
0
4
8
12
16
0 5 10 15 20 25 30 35
Peak Pulse Current Ipp - (A)
Clamping Voltage Vc - (V)
Waveform
Parameters:
tr = 8µs
td = 20µs
CH1 S21 LOG 10 dB/ REF 0 dB
START .030 000 MHz STOP 3 000.000 000 MHz
Insertion Loss S21
0.01
0.1
1
10
0.1 1 10 100 1000
Pulse Duration - tp (µs)
Peak Pulse Power - PPP (kW)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
00.511.522.53
Reverse Voltage - VR (V)
CJ(VR) / CJ(VR=0)
f = 1 MHz
4 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-8
SLVU2.8-8 Circuit Diagram
Differential Protection of Four Line Pairs
Device Connection for Protection of Eight Data Lines
Electronic equipment is susceptible to transient distur-
bances from a variety of sources including: ESD to an
open connector or interface, direct or nearby lightning
strikes to cables and wires, and charged cables “hot
plugged” into I/O ports. The SLVU2.8-8 is designed to
protect sensitive components from damage and latch-
up which may result from such transient events. The
SLVU2.8-8 can be configured to protect four high-
speed line pairs differentially, or four lines to ground
(common mode). The device is connected as follows:
1. Differential Protection of four line pairs:
Line pairs are connected at pins 1 and 2, 3 and 4,
5 and 6, and 7 and 8.
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
zPlace the device near the input terminals or con-
nectors to restrict transient coupling.
zMinimize the path length between the TVS and the
protected line.
zMinimize all conductive loops including power and
ground loops.
zThe ESD transient return path to ground should be
kept as short as possible.
zNever run critical signals near board edges.
zUse ground planes whenever possible.
Applications Information
1
2
3
45
6
7
8
From Connector
5 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-8
Typical Applications
One SLVU2.8.8 Protecting Two 10/100 Ethernet Port
6 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-8
Applications Information (continued)
IPP
ISB
IPT
IR
V
RWM VV PT VC
VBRR
IBRR
SB
EPD TVS VI Characteristic Curve
EPD TVS™ Characteristics
The SLVU2.8-8 is constructed using Semtech’s propri-
etary EPD technology. The structure of the EPD TVS is
vastly different from the traditional pn-junction devices.
At voltages below 5V, high leakage current and junction
capacitance render conventional avalanche technology
impractical for most applications. However, by utilizing
the EPD technology, the SLVU2.8-8 can effectively
operate at 2.8V while maintaining excellent electrical
characteristics.
The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in tradi-
tional silicon-avalanche TVS diodes. The EPD mecha-
nism is achieved by engineering the center region of
the device such that the reverse biased junction does
not avalanche, but will “punch-through” to a conduct-
ing state. This structure results in a device with supe-
rior dc electrical parameters at low voltages while
maintaining the capability to absorb high transient
currents.
The IV characteristic curve of the EPD device is shown
in Figure 1. The device represents a high impedance
to the circuit up to the working voltage (VRWM). During a
transient event, the device will begin to conduct as it is
biased in the reverse direction. When the punch-
through voltage (VPT) is exceeded, the device enters a
low impedance state, diverting the transient current
away from the protected circuit. When the device is
conducting current, it will exhibit a slight “snap-back” or
negative resistance characteristic due to its structure.
This must be considered when connecting the device
to a power supply rail. To return to a non-conducting
state, the current through the device must fall below
the snap-back current (approximately < 50mA).
7 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-8
Applications Information - SPICE Model
SLVU2.8-8 Spice Model
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8 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-8
Land Pattern - SO-8
Outline Drawing - SO-8
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3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
-B-
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
DATUMS AND TO BE DETERMINED AT DATUM PLANE
NOTES:
1.
2. -A- -H-
REFERENCE JEDEC STD MS-012, VARIATION AA.
4.
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.236 BSC
8
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.150
.189
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DIM MIN
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DIMENSIONS
INCHES
MIN MAX MAXNOM
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INCHES
DIMENSIONS
Z
P
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X
DIM
C
G
MILLIMETERS
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
NOTES:
1.
REFERENCE IPC-SM-782A, RLP NO. 300A.
2.
9 2008 Semtech Corp. www.semtech.com
PROTECTION PRODUCTS PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-8
Contact Information
Semtech Corporation
Protection Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
Ordering Information
SC YYWW
SLVU2.8
-8
1
Marking
Note:
(1) yyww = Date Code
Top View
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Note:
(1) Lead-Free Product
