DATA SH EET
Product specification
File under Integrated Circuits, IC04 January 1995
INTEGRATED CIRCUITS
HEF4053B
MSI
Triple 2-channel analogue
multiplexer/demultiplexer
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
DESCRIPTION
The HEF4053B is a triple 2-channel analogue
multiplexer/demultiplexer with a common enable input (E).
Each multiplexer/demultiplexer has two independent
inputs/outputs (Y0and Y1), a common input/output (Z),
and select inputs (Sn). Each also contains two-bidirectional
analogue switches, each with one side connected to an
independent input/output (Y0and Y1) and the other side
connected to a common input/output (Z).
With E LOW, one of the two switches is selected (low
impedance ON-state) by Sn. WithE HIGH, all switches are
in the high impedance OFF-state, independent of SAto SC.
VDD and VSS are the supply voltage connections for the
digital control inputs (SAto SC and E).
The VDD to VSS range is 3 to 15 V. The analogue
inputs/outputs (Y0,Y
1
and Z) can swing between VDD as a
positive limit and VEE as a negative limit. VDD−VEE may not
exceed 15 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to VSS (typically ground).
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
Fig.1 Functional diagram.
January 1995 3
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
HEF4053BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4053BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4053BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
Y0A to Y0C independent inputs/outputs
Y1A to Y1C independent inputs/outputs
SAto SCselect inputs
E enable input (active LOW)
ZAto ZCcommon inputs/outputs
INPUTS CHANNEL
ON
ES
n
LL Y
0n−Zn
LH Y
1n−Zn
H X none
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Note
1. To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may
not exceed VDD or VEE.
Supply voltage (with reference to VDD)V
EE −18 to +0,5 V
Fig.3 Schematic diagram (one switch).
January 1995 4
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
Fig.4 Logic diagram.
January 1995 5
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
DC CHARACTERISTICS
Tamb =25°C
V
DD−VEE
VSYMBOL TYP. MAX. CONDITIONS
5 350 2500 ΩVis = 0 to VDD−VEE
see Fig.6
ON resistance 10 RON 80 245 Ω
15 60 175 Ω
5 115 340 ΩVis =0
see Fig.6
ON resistance 10 RON 50 160 Ω
15 40 115 Ω
5 120 365 ΩVis =V
DD−VEE
see Fig.6
ON resistance 10 RON 65 200 Ω
15 50 155 Ω
‘∆’ ON resistance 5 25 −Ω V
is = 0 to VDD−VEE
see Fig.6
between any two 10 ∆RON 10 −Ω
channels 15 5 −Ω
OFF-state leakage 5 −−nA E at VDD
current, all 10 IOZZ −−nA
channels OFF 15 −1000 nA
OFF-state leakage 5 −−nA E at VSS
current, any 10 IOZY −−nA
channel 15 −200 nA
Fig.5 Operating area as a function of the supply voltages.
January 1995 6
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
Fig.6 Test set-up for measuring RON.
Fig.7 Typical RON as a function of input voltage.
Iis = 200 µA
VSS =V
EE =0V
January 1995 7
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
AC CHARACTERISTICS
VEE =V
SS = 0 V; Tamb =25°C; input transition times ≤20 ns
AC CHARACTERISTICS
VEE =V
SS = 0 V; Tamb =25°C; input transition times ≤20 ns
VDD
VTYPICAL FORMULA FOR P (µW)
Dynamic power 5 2 500 fi+∑(foCL)×VDD2where
dissipation per 10 11 500 fi+∑(foCL)×VDD2fi= input freq. (MHz)
package (P) 15 29 000 fi+∑(foCL)×VDD2fo= output freq. (MHz)
CL= load capacitance (pF)
∑(foCL) = sum of outputs
VDD = supply voltage (V)
VDD
VSYMBOL TYP. MAX.
Propagation delays
Vis →Vos 51020ns
note 1HIGH to LOW 10 tPHL 510ns
15 5 10 ns
51530ns
note 1LOW to HIGH 10 tPLH 510ns
15 5 10 ns
Sn→Vos 5 200 400 ns note 2HIGH to LOW 10 tPHL 85 170 ns
15 65 130 ns
5 275 555 ns note 2LOW to HIGH 10 tPLH 100 200 ns
15 65 130 ns
Output disable times
E→Vos 5 200 400 ns note 3HIGH 10 tPHZ 115 230 ns
15 110 220 ns
5 200 400 ns note 3LOW 10 tPLZ 120 245 ns
15 110 215 ns
Output enable times
E→Vos 5 260 525 ns note 3HIGH 10 tPZH 95 190 ns
15 65 130 ns
5 280 565 ns note 3LOW 10 tPZL 105 205 ns
15 70 140 ns
January 1995 8
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
Notes
Vis is the input voltage at a Y or Z terminal, whichever is assigned as input.
Vos is the output voltage at a Y or Z terminal, whichever is assigned as output.
1. RL= 10 kΩto VEE; CL= 50 pF to VEE;E=V
SS; Vis =V
DD (square-wave); see Fig.8.
2. RL= 10 kΩ; CL= 50 pF to VEE;E=V
SS; Sn=V
DD (square-wave); Vis =V
DD and RLto VEE for tPLH; Vis =V
EE and
RLto VDD for tPHL; see Fig.8.
3. RL= 10 kΩ; CL= 50 pF to VEE;E=V
DD (square-wave);
Vis =V
DD and RLto VEE for tPHZ and tPZH;
Vis =V
EE and RLto VDD for tPLZ and tPZL; see Fig.8.
4. RL= 10 kΩ; CL= 15 pF; channel ON; Vis =1⁄2VDD (p-p) (sine-wave, symmetrical about 1⁄2VDD);
fis = 1 kHz; see Fig.9.
5. RL=1 kΩ; Vis =1⁄2VDD (p-p) (sine-wave, symmetrical about 1⁄2VDD);
6. RL= 10 kΩto VEE; CL= 15 pF to VEE; E or Sn=V
DD (square-wave); crosstalk is Vos(peak
value); see Fig.8.
7. RL=1 kΩ; CL= 5 pF; channel OFF; Vis =1⁄2VDD (p-p) (sine-wave, symmetrical about 1⁄2VDD);
8. RL=1 kΩ; CL= 5 pF; channel ON; Vis =1⁄2VDD (p-p) (sine-wave, symmetrical about 1⁄2VDD);
Distortion, sine-wave 5 0,25 % note 4response 10 0,04 %
15 0,04 %
Crosstalk between 5 −MHz note 5any two channels 10 1 MHz
15 −MHz
Crosstalk; enable 5 −mV note 6or address input 10 50 mV
to output 15 −mV
OFF-state 5 −MHz note 7feed-through 10 1 MHz
15 −MHz
ON-state frequency 5 13 MHz note 8response 10 40 MHz
15 70 MHz
VDD
VSYMBOL TYP. MAX.
20 log Vos
Vis
--------- 50 dB; see Fig. 10.–=
20 log Vos
Vis
--------- 50 dB; see Fig. 9.–=
20 log Vos
Vis
--------- 3 dB; see Fig. 9.–=
January 1995 9
Philips Semiconductors Product specification
Triple 2-channel analogue
multiplexer/demultiplexer HEF4053B
MSI
Fig.8 Fig.9
APPLICATION INFORMATION
Some examples of applications for the HEF4053B are:
•Analogue multiplexing and demultiplexing.
•Digital multiplexing and demultiplexing.
•Signal gating.
NOTE
If break before make is needed, then it is necessary to use the enable input.
Fig.10
(a) (b)
