TRF1222
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FEATURES KEY SPECIFICATIONS
DESCRIPTION
RFO
LOP
LON
BPF
RFI
IFIP
IFIN
UCATTN
VDD
−VNEG
UCEN
RF AMPLIFIER Mixer
BALUN
MXRO
VGA
Power
Supply LO Buffer
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
3.5-GHz Integrated Up-Converter
•RF Frequency Range: 3300-3800 MHz•Performs Up-Conversion in 3.5-GHz Radios(3300-3800 MHz)
•18 dB of Gain with 16-dB Digital Attenuator•Output P-1dB: +14 dBm, Typical•Integrated IF amplifier, Mixer and LO BufferAmplifier
•Output IP3: +24 dBm, Typical•LO Drive Level = 0 dBm, Typical•Provision for external Image Reject /Band-Pass Filter•TTL Switched Attenuator For Gain Control•TTL Controlled Amplifier Power Down
The TRF1222 up-converts a UHF IF signal to an RF signal in the 3300 to 3800 MHz range for 3.5-GHz radioapplications. The TRF1222 has 18 dB of gain and an output P-1dB of 14 dBm, typical. A TTL compatible, 1-bit16-dB digital attenuator is provided for gain control and the IF and RF amplifiers can be shut off via a TTL controlsignal for power critical or TDD applications. In order to provide system requirements for LO/spurious rejection,the TRF1222 offers a signal path to an off-chip band-pass filter. Specifications are provided assuming an in-band2-dB insertion loss filter.
The TRF1222 is designed to complete the second up-conversion in Texas Instruments complete 3.5-GHz chipset. The linear nature of the up-converter makes it ideal for complex modulations schemes such as high orderQAM or OFDM.
Figure 1. Block Diagram
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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DEVICE INFORMATION
LPCC−32 PACKAGE
(TOP VIEW)
MXRADJ
UCEN
MXRO
GND
IFIN
IFIP
VDDIFP
VDDIFN
IADJ
VDD2
GND
UCATTN
GND
RFO
LOADJ1
VNEG
GND
VDD1
GND
GND
GND
RFI
VDDIF
IFADJ
GND
LOADJ2
GND
LOP
LON
VDDLO
GND
GND
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
3132 30 29 28 27 26 25
109 11 12 13 14 15 16
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
TERMINAL FUNCTIONS
TERMINAL
I/O TYPE DESCRIPTIONNO. NAME
Not connected for normal operation. Amplifier bias adjustment. Do not ground this pin1 IADJ
or connect to any other pin.2 VDD2 I Power RF amplifier bias 5 V3, 5, 9,11, 15,16, 21, GND Ground28,29,
30, 324 UCATTN I Digital Logic high is high gain; logic low reduces gain by 16 dB. Normally set high.6 RFO O Analog RF output from RF amplifierNot connected for normal operation. LO common gate bias adjustment. Do not7 LOADJ1
ground this pin or connect to any other pin.Negative bias used for enable circuitry -5 V. This pin can be grounded if the user8 VNEG I Power does not use the UCEN pin to turnoff the amplifier. If the VNEG is grounded theUCEN pin should be tied high.Not connected for normal operation. LO amplifier bias adjustment. Do not ground this10 LOADJ2
pin or connect to any other pin.12 LOP I Analog LO input, positive, internally ac-coupled13 LON I Analog LO input, negative, internally ac-coupled14 VDDLO I Power Positive power for LO amplifier, 5 V17 VDDIFN I Analog VDD supply for IF amplifier, negative, 5 V18 VDDIFP I Analog VDD supply for IF amplifier, positive, 5 V19 IFI P I Analog IF input, positive, dc-coupled, typical dc voltage is 1.2 V
2
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ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O TYPE DESCRIPTIONNO. NAME
20 IFI N I Analog IF input, negative, dc-coupled typical dc voltage is 1.2 V22 MXRO O Analog Output of mixer (after balun) 50- Ωimpedance with high impedance dc ground.23 UCEN I Digital Set high to enable IF amplifier and RF amplifiers24 MXRADJ O Analog Normally grounded. Provide 0- Ωjumper to ground.Not connected for normal operation. IF amplifier bias adjustment. Do not ground this25 IFADJ
pin or connect to any other pin.26 VDDIF I Power Positive supply for IF bias circuitry 5 V27 RFI I Analog Input to RF amplifier, 50- Ωimpedance, internally ac-coupled31 VDD1 I Power RF amplifier bias 5 VBack of package has metal base that must be grounded for thermal and RFBack GND
performance.
over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
VDD Positive dc supply voltage 0 to 5.5 V-VDD Negative dc supply voltage -5.5 to 0 VP
IN
RF input power 10 dBmT
J
Junction temperature 200 °CP
D
Power dissipation 1 WDigital input pins -0.3 to 5.5 Vθ
jc
Thermal resistance junction-to-case
(1)
9.01 °C/WT
stg
Storage temperature -40 to 105 °CT
op
Operating temperature -40 to 85 °CLead temperature (40 Sec Max) 260 °C
(1) Thermal resistance is junction to ambient assuming thermal pad with 16 thermal vias under package metal base. See the recommendedPCB layout.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC CHARACTERISTICS
V
DD
Positive supply voltage 4.75 5 5.25 VI
DD
Positive supply current (total) 175 200 mAV
NEG
Negative supply voltage -5.25 -5 -4.75 VI
NEG
Negative supply current 3 6 mAI
VDD2
Supply current RF 2, pin 2 50 mAI
LO
Supply current, LO, pin 14 50 mAI
IF
Supply current, IF Pin 17, 18, and 26 combined 47 mAI
VDD1
Supply current RF1, pin 31 28 mAV
IH
Input high voltage 2.5 5 VV
IL
Input low voltage 0.8 VI
IH
Input high current 300 µAI
IL
Input low current –50 µA
3
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ELECTRICAL CHARACTERISTICS
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
Unless otherwise stated V
DD
= 5 V, FRF = 3500 MHz, I
DD
= 160 mA, VNEG = -5 V, FRF = 3.5 GHz, T
A
= 25 °C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
F
IF
IF input frequency 325 MHz
IRF
RF output frequency 3300 3800 MHzG Gain UCATTN = TTL high, input IF impedance is 22 dB100- Ωdifferential∆
ATTN
Switched attenuator range UCATTN from high-to-low 16 dBG
NB
Gain flatness / 6 MHz 0.2 dBOutput power at 1-dB compression, high UCATTN = TTL high 14OP-1dB dBmgain
Output 3rd order intercept point, high UCATTN = TTL high 24OIP3 dBmgain
Gain - IF to MXRO UCATTN = TTL high 1 dBGain - RFI to RFO UCATTN = TTL high 21 dBP
LO
LO input power Referenced to 100- Ωdifferential -3 0 3 dBLO to RFO leakage
(1)
LO input = 0 dBm -5 dBm
(1) Performance is sensitive to impedance termination and board layout.
4
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APPLICATION INFORMATION
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
A typical application schematic is shown in Figure 3 .
The PCB material recommendations are shown in Table 1 and Figure 2 .
Table 1. PCB Recommendations
Board Material FR4Board Material Core Thickness 10 milCopper Thickness (starting) 1 ozPrepreg Thickness 8 milRecommended Number of Layers 4Via Plating Thickness ½ ozFinal Plate White immersion tinFinal Board Thickness 33–37 mil
5
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0.25 TYP
0.50 TYP
SOLDER MASK: NO SOLDERMASK UNDER CHIP, ON LEAD PADS
OR ON GROUND CONNECTIONS.
16 VIA HOLES, EACH 0.38 mm.
DIMENSIONS in mm
DIA 0.38
TYP
PIN 1
3.50
3.50
1.00
1.00
0.60 TYP 3.75 0.23 TYP
3.75
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
NOTE: Top and bottom surface finish: copper flash with 50–70 µin white tin immersion.
Figure 2. PCB Construction and Via Cross Section
6
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1
2
5
4
3
6
7
8
9 10 131211 14 15 16
17
18
19
20
IADJ
VDD2
GND
UCATTN
GND
GND
LOADJ2
LON
BASE
21
22
24
2526272829303132
RFO
LOADJ1
VNEG
GND
LOP
VDDLO
GND
GND
VDDIFN
VDDIFP
IFIP
IFIN
GND
MXRO
UCEN
MXRADJ
IFADJ
VDDIF
RFI
GND
GND
GND
VDD1
GND
100pF
LO IN P
100pF
LO IN N
100pF
23
BPF
VDD
IF IN N
IF IN P
100pF
100pF
UCEN
VDD
RF OUT
UCATTN
−VNEG
Place 100pF capacitors as close as possible to package pins.
100pF
1000pF
1000pF
0(A)
33 nH(B)
33 nH(B)
0.01 F
1 F
0.01 F
0.01 FZ = 50
0.01 F
0.01 F
TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
A. Connect pin 24 to ground through a 0- Ωresistor.B. Place 33-nH inductors close to package pins.C. Place 100-pF capacitors close as possible to package pins.
Figure 3. Recommended Application Schematic
7
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TRF1222
SLWS171A – APRIL 2005 – REVISED DECEMBER 2005
Figure 4. Package Outline 5 mm x 5 mm LPCC 32-Pin Leadless Package
8
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jul-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TRF1222IRTMR ACTIVE VQFN RTM 32 3000 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
TRF1222IRTMRG3 ACTIVE VQFN RTM 32 3000 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
TRF1222IRTMT ACTIVE VQFN RTM 32 250 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
TRF1222IRTMTG3 ACTIVE VQFN RTM 32 250 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TRF1222IRTMR VQFN RTM 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
TRF1222IRTMT VQFN RTM 32 250 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TRF1222IRTMR VQFN RTM 32 3000 338.1 338.1 20.6
TRF1222IRTMT VQFN RTM 32 250 338.1 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Jul-2012
Pack Materials-Page 2
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