LMC6024IMNOPB - NATIONAL SEMICONDUCTOR

LM98555

LM98555 CCD Driver

Literature Number: SNAS290C

August 2007

LM98555

CCD Driver

General Description

The LM98555 is a highly integrated driver circuit intended for

CCD driving applications. It combines 25 drivers of varying

drive strengths into one chip to provide a complete CCD driv-

ing solution. Due to this one-chip integration, optimal skew

control is achieved for this demanding application.

Features

■All CCD drivers integrated into one package

■High strength drivers designed specifically for CCD loads

■Ability to scale clock driver strength

■Skew specifications guaranteed

■Separate input and output power supplies

■CMOS process technology

■64-pin TSSOP package with extended power handling

capability

Key Specifications

Supply Voltage Inputs 3.0 to 5.5V

Drivers 4.5 to 5.8V

Maximum Output Skew Between P1A

and P2A

outputs

0.5 ns

Maximum Power

Handling

2.0W

Functional Description

20126401

FIGURE 1. Functional Block Diagram

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

LM98555 CCD Driver

Ordering Information

Commercial Temperature

Range

NS Package

LM98555CCMH 64-Pin Exposed Pad TSSOP

Connection Diagram

20126402

FIGURE 2. TSSOP Package Pinout

www.national.com 2

LM98555

Pin Descriptions

Symbol Pin Type Description

Driver inputs

P2BIN 8 Input CMOS logic input for the P2B driver.

RSIN 9 Input CMOS logic input for the RS driver.

CPIN 10 Input CMOS logic input for the CP driver.

P1AIN 15 Input CMOS logic input for the P1A ganged (8) driver set.

P2AIN 18 Input CMOS logic input for the P2A ganged (8) driver set.

SHIN 21 Input CMOS logic input for the SH ganged (3) driver set.

AFEIN 22 Input CMOS logic input for the AFE driver.

MCLIN 23 Input CMOS logic input for the MCL driver.

SHDIN 24 Input CMOS logic input for the SHD driver.

Driver Outputs

SHDOUT 28 Output; Low-

Strength

Driver output for the SHDIN input signal.

MCLOUT 30 Output; Low-

Strength

Driver output for the MCLIN input signal.

AFEOUT 31 Output; Low-

Strength

Driver output for the AFEIN input signal.

CPOUT 2 Output; Low-

Strength

Driver output for the CPIN input signal. Typically used to drive the Clamp Gate

input of the CCD.

RSOUT 3 Output; Low-

Strength

Driver output for the RSIN input signal. Typically used to drive the Reset Gate

input of the CCD.

P2BOUT 5 Output; Low-

Strength

Driver output for the P2BIN input signal.

P2AOUT0 47 Output; TRI-

STATE®; High-

Strength

Ganged driver outputs for the P2AIN input. Typically the user may join together

these outputs to drive the φ2 clock input of the CCD. Some of these outputs

may be disabled using the EN(1:0) inputs - see the Functional Description

section.

P2AOUT1 46

P2AOUT2 43

P2AOUT3 42

P2AOUT4 39

P2AOUT5 38

P2AOUT6 35

P2AOUT7 34

P1AOUT0 50 Output; TRI-

STATE; High-

Strength

Ganged driver outputs for the P1AIN input. Typically the user may join together

these outputs to drive the φ1 clock input of the CCD. Some of these outputs

may be disabled using the EN(1:0) inputs - see the Functional Description

section.

P1AOUT1 51

P1AOUT2 54

P1AOUT3 55

P1AOUT4 58

P1AOUT5 59

P1AOUT6 62

P1AOUT7 63

SHOUT0 26 Output; Low-

Strength

Ganged driver outputs for the SHIN input signal. Typically used to drive the

Shift Gate input of the CCD.

SHOUT1 27

SHOUT2 6

Logic Inputs

EN0 11 Input Driver enable control. Some of the P1A and P2A drivers can be disabled using

these inputs. See the Functional Description section.

EN1 12

3 www.national.com

LM98555

Symbol Pin Type Description

Power & Ground Pins

VDDI 14

Power VDD for pre-drivers.

VDDO 1

Power VDD for final-stage driver.

GNDI13

Ground Ground connection for all circuitry other than the Final-Stage Drivers.

GNDO4

Ground Ground connection for the Final-Stage Drivers.

www.national.com 4

LM98555

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage −0.5V to 6.2V

Package Power Rating at 25°C

(Note 2) 2.0 Watts

Voltage on Any Input or Output Pin −0.5V to VDD+0.5V

DC Input Current at Any Pin 25 mA

DC Package Input Current 50 mA

Storage Temperature −65°C to +150°C

Lead temperature (Soldering, 10 sec.) 300°C

ESD Susceptibility

Human Body Model 2000V

Machine Model 200V

Operating Conditions

Supply Voltage

VDDI +3.0V to +5.5V

Supply Voltage

VDDO +4.5V to +5.8V

Supply Sequencing(Note 3) VDDI < VDDO+0.2V

Ambient Temperature (TA)0 to 70°C

Operating Frequency 30 MHz

Power Dissipation (Note 4) 2.0W

Package Thermal Resistances

Package θJ-A

(Note 5)

θJ-PAD

(Thermal Pad)

64-Lead Exposed

Pad TSSOP

36.8°C / W 6.2°C / W

DC Electrical Characteristics

The following specifications apply for GND = 0V, VDDI = 3.3V, VDDO = 5.0V, unless noted otherwise. Boldface limits apply for

TA= TMIN to TMAX; all other limits TA= 25°C

Symbol Parameter Conditions Min Typical Max Units

IILogic 1 Input Current VI = VDDI -1 0.004 1µA

Logic 0 Input Current VI = GNDI-1 0.006 1µA

VIT Input Threshold VDDI = 3.3V 1.41 1.57 1.75 V

Input Threshold VDDI = 5.0V 2.48 V

Input Threshold Hysteresis VDDI = 3.3V -72 11 100 mV

ΔVIT Input Threshold Variation Between P1A, P2A inputs -100 100 mV

ROOutput Impedance P1A and P2A

Outputs

ILOAD = 525 mA

6.1 9.9 Ω

RO = (VDDO - VO)/IOH or

RO = VO/IOL

ROOutput Impedance All Other

Outputs

ILOAD = 280 mA

10.2 17.4 Ω

RO = (VDDO - VO)/IOH or

RO = VO/IOL

5 www.national.com

LM98555

AC Electrical Characteristics

The following specifications apply for GND = 0V, VDDI = 3.3V, VDDO = 5.0V, unless noted otherwise. Boldface limits apply for

TA= TMIN to TMAX; all other limits TA= 25°C

Symbol Parameter Conditions Min Typical Max Units

tPHL Prop Delay: High-to-Low

P1A and P2A Outputs

CL = 220 pF, RL = 10Ω

(Note 6)

3.06 4.6 6.55 ns

tPHL Prop Delay: High-to-Low

CP, RS, P2B Outputs

CL = 82 pF, RL = 10Ω

(Note 6)

(Note 8)

4.1 ns

tPLH Prop Delay: Low-to-High

P1A and P2A Outputs

CL = 220 pF, RL = 10Ω

(Note 7)

3.38 4.9 6.68 ns

tPLH Prop Delay: Low-to-High

CP, RS, P2B Outputs

CL = 82 pF, RL = 10Ω

(Note 7)

(Note 8)

4.2 ns

tSKEW Prop Delay Skew High-to-Low Between any P1A or P2A Outputs

on a Single Unit

CL = 220 pF, RL = 10Ω

109 387 ps

Prop Delay Skew Low-to-High 157 490

Important Note: Not all drivers can be loaded to the highest specified load at the same time without violating the maximum power dissipation limit. The system

design must guarantee that the maximum power dissipation specification is never exceeded.

Note 1: Absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device

should be operated at these limits.

Note 2: Package power rating assumes the exposed thermal pad is soldered to the printed circuit board as recommended, with significant heat spreading provided

by vias to internal or bottom heat dissipation planes or pad. If this is not the case, then the package power rating should be reduced. See the Thermal Guidelines

in the applications section for more information.

Note 3: When powering up and down, transient voltage levels on VDDI must be lower than (VDDO + 0.2V)

Note 4: This is the power dissipated on-chip due to all currents flowing through the device - both DC and AC. This operating condition will be violated if all driver

outputs are fully loaded and operating at the same time at the rated FMAX. The system design must constrain the chip's operating conditions (loads, power supply,

number of parallel drivers enabled, frequency of operation) to make certain that this limit is never exceeded.

Note 5: Package thermal resistance for junction to ambient is based on a 5.5 inch by 3 inch, 4 layer printed circuit board, with thermal vias connecting the heat

sinking pad to a full internal ground plane. Tests were done in still air, with a power dissipation of 2.0 W, at an ambient temperature of 22°C.

Note 6: Propagation Delay High-to-Low with output low trigger voltage at VDDO*0.75.

Note 7: Propagation Delay Low-to-High with output high trigger voltage at VDDO*0.25.

Note 8: Typical values determined from characterization testing only. Not production tested or guaranteed.

Test Conditions

20126403

FIGURE 3. AC Test Conditions

www.national.com 6

LM98555

Application Information

The LM98555 is a fully integrated clock driver/buffer for high

speed CCD applications. It provides high performance low

impedance drivers, with optimized low skew performance of

the P1 and P2 outputs. Enable inputs allow use of two, four,

six, or all eight P1 and P2 drivers to optimize the amount of

drive for the application. The 64 pin thermally enhanced

TSSOP provides excellent power handling through the use of

an exposed heat transfer pad on the underside of the pack-

age.

THERMAL GUIDELINES

The LM98555's maximum power dissipation limit, shown in

the Operating Conditions section, must be strictly adhered to.

The product's multiple high-strength drivers, with their ability

to drive a wide-range of loads, make it possible to be within

spec on each output and yet violate the aggregate maximum

power dissipation limit for the total product. Special caution

must be paid to this by limiting the chip's operating conditions

(loads, power supply, number of parallel drivers enabled, fre-

quency of operation) to make certain that the maximum power

dissipation limit is never exceeded.

Thermal characterization of the device has been done to pro-

vide reference points under specific conditions. θ junction to

ambient was measured using a 5.5 inch by 3 inch, 4 layer

PCB. The thermal contact pad on the board was connected

using vias to a full ground plane on one of the internal layers.

The recommended thermal pad is shown in Figure 4.

20126406

FIGURE 4. Exposed Pad Land Pattern

The vias shown provide a path for heat to flow from the pad

to a heat sinking or dissipating area of the printed circuit

board. The following figures show several typical examples of

how this can be done, and illustrate how heat is conducted

away from the IC to larger areas where it is dissipated.

20126407

FIGURE 5. 4 Layer PCB - Example 1

20126409

FIGURE 6. 4 Layer PCB - Example 2

20126408

FIGURE 7. 2 Layer PCB

7 www.national.com

LM98555

In multi-layer board applications, one or more internal planes

are usually dedicated as a ground plane. Connecting the ther-

mal pad to this ground plane with vias will usually provide

adequate heat management. In 2 layer boards, it is important

to provide a large heat spreading pad on the opposite side of

the board. The vias will provide a good thermal connection

between the pad under the IC, and the heat spreading pad on

the bottom of the board. Thermal modelling can be done using

the θ junction to pad information provided, to calculate the

required area of copper based on the ambient temperature of

the system, and the calculated amount of thermal dissipation

in the LM98555.

POWER DISSIPATION

The amount of power dissipated in the device can be deter-

mined by considering the following factors:

•Power dissipated delivering energy to the load

capacitance

•Power dissipated delivering energy to parasitic

capacitance

•Power dissipated due to leakage in the IC

The amount of power dissipated due to leakage is very small

in this CMOS device. Most of the power will be due to the load

capacitance being switched, with a small additional amount

caused by the parasitic capacitance of the output circuitry,

output pins, and PCB traces. A typical parasitic capacitance

would be on the order of 5 pF. Since the load capacitance will

be on the order of 100 pF or more, this usually dominates the

power dissipation calculation. The following equation can be

used to calculate the power dissipation due to capacitive

switching of the loads:

P = Sum[Output Frequency x Load Capacitance x Output

Voltage Squared] (summed for all outputs)

INPUT SIGNALS

Care should be taken to match the trace lengths between

timing signals that require low skew. Usually, the P1A and

P2A signals will be the most critical. In some applications, the

timing of P2B with respect to P1A and P2A can also be im-

portant, and that input trace should also be carefully de-

signed.

Trace shape and width should also be carefully controlled.

The trace geometry will determine the characteristic

impedance of each trace. The impedance should be set to

give reasonable immunity to noise coupling into the trace.

With a known trace impedance, the signals can be terminated

using a series resistor at the source that is equal to the char-

acteristic impedance. This will provide a signal with minimum

overshoot and ringing, and will contribute to better perfor-

mance of the final signal reaching the CCD.

OUTPUT CONNECTIONS AND LOADING EXAMPLES

The LM98555 can be used with a wide variety of different

CCD sensors. The P1Aoutx and P2Aoutx outputs can be se-

lectively enabled to provide 2, 4, 6, or 8 drivers. This allows

the available drive strength to be optimized for the sensor and

application. Connecting multiple outputs together in parallel

as shown in the typical application circuit provides lower drive

impedance as needed to suit the load being driven. When

driving smaller loads, lower switching noise will be generated

if the minimum necessary outputs are enabled and used.

The output signal traces should also be designed for a known

impedance. Source terminating resistors should be used in

series with each output to provide good matching to the trace

characteristic impedance. The resistors should be located as

close as possible to each output pin. If multiple outputs will be

combined to drive a single load pin, the output signals should

be combined after the termination resistors. This will provide

the best summing of adjacent outputs. The combined signal

should then pass through an EMI type ferrite bead. This com-

ponent can be selected to change the bandwidth or shape of

the clocking signal to achieve the best CCD transfer efficien-

cy.

Several other techniques will also help maintain signal quality,

and minimize timing differences between critical signals. Vias

should not be used for critical timing signals. These can add

impedance discontinuities that will affect the waveform qual-

ity. Traces should have gradual bends and avoid sharp

changes in direction that can also introduce impedance dis-

continuities.

SELECTIVE DRIVER ENABLING

With the Enable pins, the user has the capability to enable

only the drivers that are required for the application, thus

eliminating unnecessary outputs switching. The following ta-

ble shows the details.

EN1 EN0 Driver-set State

0 0 P1Aout(1:0) and P2Aout(1:0) are enabled; all

others disabled.

0 1 P1Aout(3:0) and P2Aout(3:0) are enabled; all

others disabled.

1 0 P1Aout(5:0) and P2Aout(5:0) are enabled; all

others disabled.

1 1 All P1Aout and P2Aout drivers are enabled.

Note: The disabled drivers' outputs are in TRI-STATE.

POWER SUPPLY SEQUENCING

During device power-up and power-down, VDDI must be main-

tained less than (VDDO + 0.2V) to prevent excessive current

flow through the internal ESD protection circuitry. Since most

applications will involve 3V on VDDI and 5V on VDDO, this can

be easily met. If this voltage relationship cannot be met, then

the DC pin and package limits for input current must be main-

tained by controlling the source impedance of the VDDI supply.

POWER AND GROUND - PLANES VERSUS BUSES

The best performance will be achieved by using planes rather

than traces for power and ground. Planes provide lower elec-

trical and thermal impedance. Ground bounce and ringing are

reduced, electromagnetic emissions are minimized and the

best thermal performance will be realized.

A single common ground plane should be used for all power

and signal domains.

Another circuit board layer can be used to provide power to

the various circuitry. Different power buses can be provided

by isolated planes within this layer of the circuit board.

EMI MANAGEMENT

Good EMI control will be achieved by addressing the following

items:

•Provide proper source termination of output signals

•Limit length of output traces

•Ensure adequate power supply decoupling

•Provide power and ground planes as much as possible

•Provide common ground plane for all signals, especially

between LM98555 outputs and load CCD

•Enable and use the minimum number of outputs needed

www.national.com 8

LM98555

Physical Dimensions inches (millimeters) unless otherwise noted

64-TSSOP

NS Package Number MXD64A

9 www.national.com

LM98555

Notes

LM98555 CCD Driver

THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION

(“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY

OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO

SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS,

IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS

DOCUMENT.

TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT

NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL

PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR

APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND

APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE

NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS.

EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO

LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE

AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR

PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY

RIGHT.

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR

SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and

whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected

to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform

can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.

National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other

brand or product names may be trademarks or registered trademarks of their respective holders.

For the most current product information visit us at www.national.com

National Semiconductor

Americas Customer

Support Center

Email:

new.feedback@nsc.com

Tel: 1-800-272-9959

National Semiconductor Europe

Customer Support Center

Fax: +49 (0) 180-530-85-86

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 69 9508 6208

English Tel: +49 (0) 870 24 0 2171

Français Tel: +33 (0) 1 41 91 8790

National Semiconductor Asia

Pacific Customer Support Center

Email: ap.support@nsc.com

National Semiconductor Japan

Customer Support Center

Fax: 81-3-5639-7507

Email: jpn.feedback@nsc.com

Tel: 81-3-5639-7560

www.national.com

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are

sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,

or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information

published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a

warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual

property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied

by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive

business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional

restrictions.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all

express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not

responsible or liable for any such statements.

TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably

be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing

such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products

and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be

provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in

such safety-critical applications.

TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are

specifically designated by TI as military-grade or "enhanced plastic."Only products designated by TI as military-grade meet military

specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at

the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are

designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated

products in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products Applications

Audio www.ti.com/audio Communications and Telecom www.ti.com/communications

Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers

Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps

DLP®Products www.dlp.com Energy and Lighting www.ti.com/energy

DSP dsp.ti.com Industrial www.ti.com/industrial

Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical

Interface interface.ti.com Security www.ti.com/security

Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community Home Page e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265